1/*
2 * OMAP2xxx clockdomains
3 *
4 * Copyright (C) 2008-2009 Texas Instruments, Inc.
5 * Copyright (C) 2008-2010 Nokia Corporation
6 *
7 * Paul Walmsley, Jouni H��gander
8 *
9 * This file contains clockdomains and clockdomain wakeup dependencies
10 * for OMAP2xxx chips.  Some notes:
11 *
12 * A useful validation rule for struct clockdomain: Any clockdomain
13 * referenced by a wkdep_srcs must have a dep_bit assigned.  So
14 * wkdep_srcs are really just software-controllable dependencies.
15 * Non-software-controllable dependencies do exist, but they are not
16 * encoded below (yet).
17 *
18 * 24xx does not support programmable sleep dependencies (SLEEPDEP)
19 *
20 * The overly-specific dep_bit names are due to a bit name collision
21 * with CM_FCLKEN_{DSP,IVA2}.  The DSP/IVA2 PM_WKDEP and CM_SLEEPDEP shift
22 * value are the same for all powerdomains: 2
23 *
24 * XXX should dep_bit be a mask, so we can test to see if it is 0 as a
25 * sanity check?
26 * XXX encode hardware fixed wakeup dependencies -- esp. for 3430 CORE
27 */
28
29/*
30 * To-Do List
31 * -> Port the Sleep/Wakeup dependencies for the domains
32 *    from the Power domain framework
33 */
34
35#include <linux/kernel.h>
36#include <linux/io.h>
37
38#include "soc.h"
39#include "clockdomain.h"
40#include "prm2xxx_3xxx.h"
41#include "cm2xxx_3xxx.h"
42#include "cm-regbits-24xx.h"
43#include "prm-regbits-24xx.h"
44
45/*
46 * Clockdomain dependencies for wkdeps
47 *
48 * XXX Hardware dependencies (e.g., dependencies that cannot be
49 * changed in software) are not included here yet, but should be.
50 */
51
52/* Wakeup dependency source arrays */
53
54/* 2430-specific possible wakeup dependencies */
55
56/* 2430 PM_WKDEP_CORE: DSP, GFX, MPU, WKUP, MDM */
57static struct clkdm_dep core_2430_wkdeps[] = {
58	{ .clkdm_name = "dsp_clkdm" },
59	{ .clkdm_name = "gfx_clkdm" },
60	{ .clkdm_name = "mpu_clkdm" },
61	{ .clkdm_name = "wkup_clkdm" },
62	{ .clkdm_name = "mdm_clkdm" },
63	{ NULL },
64};
65
66/* 2430 PM_WKDEP_MPU: CORE, DSP, WKUP, MDM */
67static struct clkdm_dep mpu_2430_wkdeps[] = {
68	{ .clkdm_name = "core_l3_clkdm" },
69	{ .clkdm_name = "core_l4_clkdm" },
70	{ .clkdm_name = "dsp_clkdm" },
71	{ .clkdm_name = "wkup_clkdm" },
72	{ .clkdm_name = "mdm_clkdm" },
73	{ NULL },
74};
75
76/* 2430 PM_WKDEP_MDM: CORE, MPU, WKUP */
77static struct clkdm_dep mdm_2430_wkdeps[] = {
78	{ .clkdm_name = "core_l3_clkdm" },
79	{ .clkdm_name = "core_l4_clkdm" },
80	{ .clkdm_name = "mpu_clkdm" },
81	{ .clkdm_name = "wkup_clkdm" },
82	{ NULL },
83};
84
85/*
86 * 2430-only clockdomains
87 */
88
89static struct clockdomain mpu_2430_clkdm = {
90	.name		= "mpu_clkdm",
91	.pwrdm		= { .name = "mpu_pwrdm" },
92	.flags		= CLKDM_CAN_HWSUP_SWSUP,
93	.wkdep_srcs	= mpu_2430_wkdeps,
94	.clktrctrl_mask = OMAP24XX_AUTOSTATE_MPU_MASK,
95};
96
97/* Another case of bit name collisions between several registers: EN_MDM */
98static struct clockdomain mdm_clkdm = {
99	.name		= "mdm_clkdm",
100	.pwrdm		= { .name = "mdm_pwrdm" },
101	.flags		= CLKDM_CAN_HWSUP_SWSUP,
102	.dep_bit	= OMAP2430_PM_WKDEP_MPU_EN_MDM_SHIFT,
103	.wkdep_srcs	= mdm_2430_wkdeps,
104	.clktrctrl_mask = OMAP2430_AUTOSTATE_MDM_MASK,
105};
106
107static struct clockdomain dsp_2430_clkdm = {
108	.name		= "dsp_clkdm",
109	.pwrdm		= { .name = "dsp_pwrdm" },
110	.flags		= CLKDM_CAN_HWSUP_SWSUP,
111	.dep_bit	= OMAP24XX_PM_WKDEP_MPU_EN_DSP_SHIFT,
112	.wkdep_srcs	= dsp_24xx_wkdeps,
113	.clktrctrl_mask = OMAP24XX_AUTOSTATE_DSP_MASK,
114};
115
116static struct clockdomain gfx_2430_clkdm = {
117	.name		= "gfx_clkdm",
118	.pwrdm		= { .name = "gfx_pwrdm" },
119	.flags		= CLKDM_CAN_HWSUP_SWSUP,
120	.wkdep_srcs	= gfx_24xx_wkdeps,
121	.clktrctrl_mask = OMAP24XX_AUTOSTATE_GFX_MASK,
122};
123
124/*
125 * XXX add usecounting for clkdm dependencies, otherwise the presence
126 * of a single dep bit for core_l3_24xx_clkdm and core_l4_24xx_clkdm
127 * could cause trouble
128 */
129static struct clockdomain core_l3_2430_clkdm = {
130	.name		= "core_l3_clkdm",
131	.pwrdm		= { .name = "core_pwrdm" },
132	.flags		= CLKDM_CAN_HWSUP,
133	.dep_bit	= OMAP24XX_EN_CORE_SHIFT,
134	.wkdep_srcs	= core_2430_wkdeps,
135	.clktrctrl_mask = OMAP24XX_AUTOSTATE_L3_MASK,
136};
137
138/*
139 * XXX add usecounting for clkdm dependencies, otherwise the presence
140 * of a single dep bit for core_l3_24xx_clkdm and core_l4_24xx_clkdm
141 * could cause trouble
142 */
143static struct clockdomain core_l4_2430_clkdm = {
144	.name		= "core_l4_clkdm",
145	.pwrdm		= { .name = "core_pwrdm" },
146	.flags		= CLKDM_CAN_HWSUP,
147	.dep_bit	= OMAP24XX_EN_CORE_SHIFT,
148	.wkdep_srcs	= core_2430_wkdeps,
149	.clktrctrl_mask = OMAP24XX_AUTOSTATE_L4_MASK,
150};
151
152static struct clockdomain dss_2430_clkdm = {
153	.name		= "dss_clkdm",
154	.pwrdm		= { .name = "core_pwrdm" },
155	.flags		= CLKDM_CAN_HWSUP,
156	.clktrctrl_mask = OMAP24XX_AUTOSTATE_DSS_MASK,
157};
158
159static struct clockdomain *clockdomains_omap243x[] __initdata = {
160	&wkup_common_clkdm,
161	&mpu_2430_clkdm,
162	&mdm_clkdm,
163	&dsp_2430_clkdm,
164	&gfx_2430_clkdm,
165	&core_l3_2430_clkdm,
166	&core_l4_2430_clkdm,
167	&dss_2430_clkdm,
168	NULL,
169};
170
171void __init omap243x_clockdomains_init(void)
172{
173	if (!cpu_is_omap243x())
174		return;
175
176	clkdm_register_platform_funcs(&omap2_clkdm_operations);
177	clkdm_register_clkdms(clockdomains_omap243x);
178	clkdm_complete_init();
179}
180
181