1/*
2 * Copyright 2014 Freescale Semiconductor, Inc.
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
7 */
8
9#include <linux/irqchip.h>
10#include <linux/of_platform.h>
11#include <linux/phy.h>
12#include <linux/regmap.h>
13#include <linux/mfd/syscon.h>
14#include <linux/mfd/syscon/imx6q-iomuxc-gpr.h>
15#include <asm/mach/arch.h>
16#include <asm/mach/map.h>
17
18#include "common.h"
19#include "cpuidle.h"
20
21static int ar8031_phy_fixup(struct phy_device *dev)
22{
23	u16 val;
24
25	/* Set RGMII IO voltage to 1.8V */
26	phy_write(dev, 0x1d, 0x1f);
27	phy_write(dev, 0x1e, 0x8);
28
29	/* introduce tx clock delay */
30	phy_write(dev, 0x1d, 0x5);
31	val = phy_read(dev, 0x1e);
32	val |= 0x0100;
33	phy_write(dev, 0x1e, val);
34
35	return 0;
36}
37
38#define PHY_ID_AR8031   0x004dd074
39static void __init imx6sx_enet_phy_init(void)
40{
41	if (IS_BUILTIN(CONFIG_PHYLIB))
42		phy_register_fixup_for_uid(PHY_ID_AR8031, 0xffffffff,
43					   ar8031_phy_fixup);
44}
45
46static void __init imx6sx_enet_clk_sel(void)
47{
48	struct regmap *gpr;
49
50	gpr = syscon_regmap_lookup_by_compatible("fsl,imx6sx-iomuxc-gpr");
51	if (!IS_ERR(gpr)) {
52		regmap_update_bits(gpr, IOMUXC_GPR1,
53				   IMX6SX_GPR1_FEC_CLOCK_MUX_SEL_MASK, 0);
54		regmap_update_bits(gpr, IOMUXC_GPR1,
55				   IMX6SX_GPR1_FEC_CLOCK_PAD_DIR_MASK, 0);
56	} else {
57		pr_err("failed to find fsl,imx6sx-iomux-gpr regmap\n");
58	}
59}
60
61static inline void imx6sx_enet_init(void)
62{
63	imx6sx_enet_phy_init();
64	imx6sx_enet_clk_sel();
65}
66
67static void __init imx6sx_init_machine(void)
68{
69	struct device *parent;
70
71	parent = imx_soc_device_init();
72	if (parent == NULL)
73		pr_warn("failed to initialize soc device\n");
74
75	of_platform_populate(NULL, of_default_bus_match_table, NULL, parent);
76
77	imx6sx_enet_init();
78	imx_anatop_init();
79	imx6sx_pm_init();
80}
81
82static void __init imx6sx_init_irq(void)
83{
84	imx_gpc_check_dt();
85	imx_init_revision_from_anatop();
86	imx_init_l2cache();
87	imx_src_init();
88	irqchip_init();
89	imx6_pm_ccm_init("fsl,imx6sx-ccm");
90}
91
92static void __init imx6sx_init_late(void)
93{
94	imx6sx_cpuidle_init();
95
96	if (IS_ENABLED(CONFIG_ARM_IMX6Q_CPUFREQ))
97		platform_device_register_simple("imx6q-cpufreq", -1, NULL, 0);
98}
99
100static const char * const imx6sx_dt_compat[] __initconst = {
101	"fsl,imx6sx",
102	NULL,
103};
104
105DT_MACHINE_START(IMX6SX, "Freescale i.MX6 SoloX (Device Tree)")
106	.init_irq	= imx6sx_init_irq,
107	.init_machine	= imx6sx_init_machine,
108	.dt_compat	= imx6sx_dt_compat,
109	.init_late	= imx6sx_init_late,
110MACHINE_END
111