1/* 2 * linux/arch/arm/common/icst307.c 3 * 4 * Copyright (C) 2003 Deep Blue Solutions, Ltd, All Rights Reserved. 5 * 6 * This program is free software; you can redistribute it and/or modify 7 * it under the terms of the GNU General Public License version 2 as 8 * published by the Free Software Foundation. 9 * 10 * Support functions for calculating clocks/divisors for the ICST307 11 * clock generators. See http://www.idt.com/ for more information 12 * on these devices. 13 * 14 * This is an almost identical implementation to the ICST525 clock generator. 15 * The s2div and idx2s files are different 16 */ 17#include <linux/module.h> 18#include <linux/kernel.h> 19#include <asm/div64.h> 20#include <asm/hardware/icst.h> 21 22/* 23 * Divisors for each OD setting. 24 */ 25const unsigned char icst307_s2div[8] = { 10, 2, 8, 4, 5, 7, 3, 6 }; 26const unsigned char icst525_s2div[8] = { 10, 2, 8, 4, 5, 7, 9, 6 }; 27EXPORT_SYMBOL(icst307_s2div); 28EXPORT_SYMBOL(icst525_s2div); 29 30unsigned long icst_hz(const struct icst_params *p, struct icst_vco vco) 31{ 32 u64 dividend = p->ref * 2 * (u64)(vco.v + 8); 33 u32 divisor = (vco.r + 2) * p->s2div[vco.s]; 34 35 do_div(dividend, divisor); 36 return (unsigned long)dividend; 37} 38 39EXPORT_SYMBOL(icst_hz); 40 41/* 42 * Ascending divisor S values. 43 */ 44const unsigned char icst307_idx2s[8] = { 1, 6, 3, 4, 7, 5, 2, 0 }; 45const unsigned char icst525_idx2s[8] = { 1, 3, 4, 7, 5, 2, 6, 0 }; 46EXPORT_SYMBOL(icst307_idx2s); 47EXPORT_SYMBOL(icst525_idx2s); 48 49struct icst_vco 50icst_hz_to_vco(const struct icst_params *p, unsigned long freq) 51{ 52 struct icst_vco vco = { .s = 1, .v = p->vd_max, .r = p->rd_max }; 53 unsigned long f; 54 unsigned int i = 0, rd, best = (unsigned int)-1; 55 56 /* 57 * First, find the PLL output divisor such 58 * that the PLL output is within spec. 59 */ 60 do { 61 f = freq * p->s2div[p->idx2s[i]]; 62 63 if (f > p->vco_min && f <= p->vco_max) 64 break; 65 i++; 66 } while (i < 8); 67 68 if (i >= 8) 69 return vco; 70 71 vco.s = p->idx2s[i]; 72 73 /* 74 * Now find the closest divisor combination 75 * which gives a PLL output of 'f'. 76 */ 77 for (rd = p->rd_min; rd <= p->rd_max; rd++) { 78 unsigned long fref_div, f_pll; 79 unsigned int vd; 80 int f_diff; 81 82 fref_div = (2 * p->ref) / rd; 83 84 vd = (f + fref_div / 2) / fref_div; 85 if (vd < p->vd_min || vd > p->vd_max) 86 continue; 87 88 f_pll = fref_div * vd; 89 f_diff = f_pll - f; 90 if (f_diff < 0) 91 f_diff = -f_diff; 92 93 if ((unsigned)f_diff < best) { 94 vco.v = vd - 8; 95 vco.r = rd - 2; 96 if (f_diff == 0) 97 break; 98 best = f_diff; 99 } 100 } 101 102 return vco; 103} 104 105EXPORT_SYMBOL(icst_hz_to_vco); 106