1/* 2 * Device Tree include file for Armada 385 based Linksys boards 3 * 4 * Copyright (C) 2015 Imre Kaloz <kaloz@openwrt.org> 5 * 6 * 7 * This file is dual-licensed: you can use it either under the terms 8 * of the GPL or the X11 license, at your option. Note that this dual 9 * licensing only applies to this file, and not this project as a 10 * whole. 11 * 12 * a) This file is licensed under the terms of the GNU General Public 13 * License version 2. This program is licensed "as is" without 14 * any warranty of any kind, whether express or implied. 15 * 16 * Or, alternatively, 17 * 18 * b) Permission is hereby granted, free of charge, to any person 19 * obtaining a copy of this software and associated documentation 20 * files (the "Software"), to deal in the Software without 21 * restriction, including without limitation the rights to use, 22 * copy, modify, merge, publish, distribute, sublicense, and/or 23 * sell copies of the Software, and to permit persons to whom the 24 * Software is furnished to do so, subject to the following 25 * conditions: 26 * 27 * The above copyright notice and this permission notice shall be 28 * included in all copies or substantial portions of the Software. 29 * 30 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 31 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES 32 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND 33 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT 34 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, 35 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING 36 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 37 * OTHER DEALINGS IN THE SOFTWARE. 38 */ 39 40#include <dt-bindings/gpio/gpio.h> 41#include <dt-bindings/input/input.h> 42#include "armada-385.dtsi" 43 44/ { 45 model = "Linksys boards based on Armada 385"; 46 compatible = "linksys,armada385", "marvell,armada385", 47 "marvell,armada380"; 48 49 chosen { 50 stdout-path = "serial0:115200n8"; 51 }; 52 53 memory { 54 device_type = "memory"; 55 reg = <0x00000000 0x20000000>; /* 512 MB */ 56 }; 57 58 soc { 59 ranges = <MBUS_ID(0xf0, 0x01) 0 0xf1000000 0x100000 60 MBUS_ID(0x01, 0x1d) 0 0xfff00000 0x100000 61 MBUS_ID(0x09, 0x09) 0 0xf1100000 0x10000 62 MBUS_ID(0x09, 0x05) 0 0xf1110000 0x10000>; 63 64 internal-regs { 65 66 spi@10600 { 67 status = "disabled"; 68 }; 69 70 i2c@11000 { 71 pinctrl-names = "default"; 72 pinctrl-0 = <&i2c0_pins>; 73 status = "okay"; 74 75 tmp421@4c { 76 compatible = "ti,tmp421"; 77 reg = <0x4c>; 78 }; 79 80 pca9635@68 { 81 #address-cells = <1>; 82 #size-cells = <0>; 83 compatible = "nxp,pca9635"; 84 reg = <0x68>; 85 }; 86 }; 87 88 /* J10: VCC, NC, RX, NC, TX, GND */ 89 serial@12000 { 90 status = "okay"; 91 }; 92 93 ethernet@70000 { 94 status = "okay"; 95 phy-mode = "rgmii-id"; 96 fixed-link { 97 speed = <1000>; 98 full-duplex; 99 }; 100 }; 101 102 ethernet@34000 { 103 status = "okay"; 104 phy-mode = "sgmii"; 105 fixed-link { 106 speed = <1000>; 107 full-duplex; 108 }; 109 }; 110 111 mdio { 112 status = "okay"; 113 }; 114 115 sata@a8000 { 116 status = "okay"; 117 }; 118 119 /* USB part of the eSATA/USB 2.0 port */ 120 usb@58000 { 121 status = "okay"; 122 }; 123 124 usb3@f8000 { 125 status = "okay"; 126 usb-phy = <&usb3_phy>; 127 }; 128 129 flash@d0000 { 130 status = "okay"; 131 num-cs = <1>; 132 marvell,nand-keep-config; 133 marvell,nand-enable-arbiter; 134 nand-on-flash-bbt; 135 136 partition@0 { 137 label = "u-boot"; 138 reg = <0x0000000 0x200000>; /* 2MB */ 139 read-only; 140 }; 141 142 partition@100000 { 143 label = "u_env"; 144 reg = <0x200000 0x40000>; /* 256KB */ 145 }; 146 147 partition@140000 { 148 label = "s_env"; 149 reg = <0x240000 0x40000>; /* 256KB */ 150 }; 151 152 partition@900000 { 153 label = "devinfo"; 154 reg = <0x900000 0x100000>; /* 1MB */ 155 read-only; 156 }; 157 158 /* kernel1 overlaps with rootfs1 by design */ 159 partition@a00000 { 160 label = "kernel1"; 161 reg = <0xa00000 0x2800000>; /* 40MB */ 162 }; 163 164 partition@1000000 { 165 label = "rootfs1"; 166 reg = <0x1000000 0x2200000>; /* 34MB */ 167 }; 168 169 /* kernel2 overlaps with rootfs2 by design */ 170 partition@3200000 { 171 label = "kernel2"; 172 reg = <0x3200000 0x2800000>; /* 40MB */ 173 }; 174 175 partition@3800000 { 176 label = "rootfs2"; 177 reg = <0x3800000 0x2200000>; /* 34MB */ 178 }; 179 180 /* 181 * 38MB, last MB is for the BBT, not writable 182 */ 183 partition@5a00000 { 184 label = "syscfg"; 185 reg = <0x5a00000 0x2600000>; 186 }; 187 188 /* 189 * Unused area between "s_env" and "devinfo". 190 * Moved here because otherwise the renumbered 191 * partitions would break the bootloader 192 * supplied bootargs 193 */ 194 partition@180000 { 195 label = "unused_area"; 196 reg = <0x280000 0x680000>; /* 6.5MB */ 197 }; 198 }; 199 }; 200 201 pcie-controller { 202 status = "okay"; 203 204 pcie@1,0 { 205 /* Marvell 88W8864, 5GHz-only */ 206 status = "okay"; 207 }; 208 209 pcie@2,0 { 210 /* Marvell 88W8864, 2GHz-only */ 211 status = "okay"; 212 }; 213 }; 214 }; 215 216 usb3_phy: usb3_phy { 217 compatible = "usb-nop-xceiv"; 218 vcc-supply = <®_xhci0_vbus>; 219 }; 220 221 reg_xhci0_vbus: xhci0-vbus { 222 compatible = "regulator-fixed"; 223 pinctrl-names = "default"; 224 pinctrl-0 = <&xhci0_vbus_pins>; 225 regulator-name = "xhci0-vbus"; 226 regulator-min-microvolt = <5000000>; 227 regulator-max-microvolt = <5000000>; 228 enable-active-high; 229 gpio = <&gpio1 18 GPIO_ACTIVE_HIGH>; 230 }; 231 232 gpio_keys { 233 compatible = "gpio-keys"; 234 #address-cells = <1>; 235 #size-cells = <0>; 236 pinctrl-0 = <&keys_pin>; 237 pinctrl-names = "default"; 238 239 button@1 { 240 label = "WPS"; 241 linux,code = <KEY_WPS_BUTTON>; 242 gpios = <&gpio0 24 GPIO_ACTIVE_LOW>; 243 }; 244 245 button@2 { 246 label = "Factory Reset Button"; 247 linux,code = <KEY_RESTART>; 248 gpios = <&gpio0 29 GPIO_ACTIVE_LOW>; 249 }; 250 }; 251 252 gpio-leds { 253 compatible = "gpio-leds"; 254 pinctrl-0 = <&power_led_pin &sata_led_pin>; 255 pinctrl-names = "default"; 256 257 power { 258 gpios = <&gpio1 23 GPIO_ACTIVE_HIGH>; 259 default-state = "on"; 260 }; 261 262 sata { 263 gpios = <&gpio1 22 GPIO_ACTIVE_LOW>; 264 default-state = "off"; 265 }; 266 }; 267 268 dsa@0 { 269 compatible = "marvell,dsa"; 270 #address-cells = <2>; 271 #size-cells = <0>; 272 273 dsa,ethernet = <ð2>; 274 dsa,mii-bus = <&mdio>; 275 276 switch@0 { 277 #address-cells = <1>; 278 #size-cells = <0>; 279 reg = <0x0 0>; /* MDIO address 0, switch 0 in tree */ 280 281 port@0 { 282 reg = <0>; 283 label = "lan4"; 284 }; 285 286 port@1 { 287 reg = <1>; 288 label = "lan3"; 289 }; 290 291 port@2 { 292 reg = <2>; 293 label = "lan2"; 294 }; 295 296 port@3 { 297 reg = <3>; 298 label = "lan1"; 299 }; 300 301 port@4 { 302 reg = <4>; 303 label = "wan"; 304 }; 305 306 port@5 { 307 reg = <5>; 308 label = "cpu"; 309 }; 310 }; 311 }; 312}; 313 314&pinctrl { 315 keys_pin: keys-pin { 316 marvell,pins = "mpp24", "mpp29"; 317 marvell,function = "gpio"; 318 }; 319 320 power_led_pin: power-led-pin { 321 marvell,pins = "mpp55"; 322 marvell,function = "gpio"; 323 }; 324 325 sata_led_pin: sata-led-pin { 326 marvell,pins = "mpp54"; 327 marvell,function = "gpio"; 328 }; 329 330 xhci0_vbus_pins: xhci0-vbus-pins { 331 marvell,pins = "mpp50"; 332 marvell,function = "gpio"; 333 }; 334}; 335