1Platform DesignWare HS OTG USB 2.0 controller 2----------------------------------------------------- 3 4Required properties: 5- compatible : One of: 6 - brcm,bcm2835-usb: The DWC2 USB controller instance in the BCM2835 SoC. 7 - rockchip,rk3066-usb: The DWC2 USB controller instance in the rk3066 Soc; 8 - "rockchip,rk3188-usb", "rockchip,rk3066-usb", "snps,dwc2": for rk3188 Soc; 9 - "rockchip,rk3288-usb", "rockchip,rk3066-usb", "snps,dwc2": for rk3288 Soc; 10 - snps,dwc2: A generic DWC2 USB controller with default parameters. 11- reg : Should contain 1 register range (address and length) 12- interrupts : Should contain 1 interrupt 13- clocks: clock provider specifier 14- clock-names: shall be "otg" 15Refer to clk/clock-bindings.txt for generic clock consumer properties 16 17Optional properties: 18- phys: phy provider specifier 19- phy-names: shall be "usb2-phy" 20Refer to phy/phy-bindings.txt for generic phy consumer properties 21- dr_mode: shall be one of "host", "peripheral" and "otg" 22 Refer to usb/generic.txt 23- g-use-dma: enable dma usage in gadget driver. 24- g-rx-fifo-size: size of rx fifo size in gadget mode. 25- g-np-tx-fifo-size: size of non-periodic tx fifo size in gadget mode. 26- g-tx-fifo-size: size of periodic tx fifo per endpoint (except ep0) in gadget mode. 27 28Example: 29 30 usb@101c0000 { 31 compatible = "ralink,rt3050-usb, snps,dwc2"; 32 reg = <0x101c0000 40000>; 33 interrupts = <18>; 34 clocks = <&usb_otg_ahb_clk>; 35 clock-names = "otg"; 36 phys = <&usbphy>; 37 phy-names = "usb2-phy"; 38 }; 39