1Renesas Bus State Controller (BSC)
2==================================
3
4The Renesas Bus State Controller (BSC, sometimes called "LBSC within Bus
5Bridge", or "External Bus Interface") can be found in several Renesas ARM SoCs.
6It provides an external bus for connecting multiple external devices to the
7SoC, driving several chip select lines, for e.g. NOR FLASH, Ethernet and USB.
8
9While the BSC is a fairly simple memory-mapped bus, it may be part of a PM
10domain, and may have a gateable functional clock.
11Before a device connected to the BSC can be accessed, the PM domain
12containing the BSC must be powered on, and the functional clock
13driving the BSC must be enabled.
14
15The bindings for the BSC extend the bindings for "simple-pm-bus".
16
17
18Required properties
19  - compatible: Must contain an SoC-specific value, and "renesas,bsc" and
20		"simple-pm-bus" as fallbacks.
21                SoC-specific values can be:
22		"renesas,bsc-r8a73a4" for R-Mobile APE6 (r8a73a4)
23		"renesas,bsc-sh73a0" for SH-Mobile AG5 (sh73a0)
24  - #address-cells, #size-cells, ranges: Must describe the mapping between
25		parent address and child address spaces.
26  - reg: Must contain the base address and length to access the bus controller.
27
28Optional properties:
29  - interrupts: Must contain a reference to the BSC interrupt, if available.
30  - clocks: Must contain a reference to the functional clock, if available.
31  - power-domains: Must contain a reference to the PM domain, if available.
32
33
34Example:
35
36	bsc: bus@fec10000 {
37		compatible = "renesas,bsc-sh73a0", "renesas,bsc",
38			     "simple-pm-bus";
39		#address-cells = <1>;
40		#size-cells = <1>;
41		ranges = <0 0 0x20000000>;
42		reg = <0xfec10000 0x400>;
43		interrupts = <0 39 IRQ_TYPE_LEVEL_HIGH>;
44		clocks = <&zb_clk>;
45		power-domains = <&pd_a4s>;
46	};
47