1* CoreSight Components:
2
3CoreSight components are compliant with the ARM CoreSight architecture
4specification and can be connected in various topologies to suit a particular
5SoCs tracing needs. These trace components can generally be classified as
6sinks, links and sources. Trace data produced by one or more sources flows
7through the intermediate links connecting the source to the currently selected
8sink. Each CoreSight component device should use these properties to describe
9its hardware characteristcs.
10
11* Required properties for all components *except* non-configurable replicators:
12
13	* compatible: These have to be supplemented with "arm,primecell" as
14	  drivers are using the AMBA bus interface.  Possible values include:
15		- "arm,coresight-etb10", "arm,primecell";
16		- "arm,coresight-tpiu", "arm,primecell";
17		- "arm,coresight-tmc", "arm,primecell";
18		- "arm,coresight-funnel", "arm,primecell";
19		- "arm,coresight-etm3x", "arm,primecell";
20		- "arm,coresight-etm4x", "arm,primecell";
21		- "qcom,coresight-replicator1x", "arm,primecell";
22
23	* reg: physical base address and length of the register
24	  set(s) of the component.
25
26	* clocks: the clocks associated to this component.
27
28	* clock-names: the name of the clocks referenced by the code.
29	  Since we are using the AMBA framework, the name of the clock
30	  providing the interconnect should be "apb_pclk", and some
31	  coresight blocks also have an additional clock "atclk", which
32	  clocks the core of that coresight component. The latter clock
33	  is optional.
34
35	* port or ports: The representation of the component's port
36	  layout using the generic DT graph presentation found in
37	  "bindings/graph.txt".
38
39* Required properties for devices that don't show up on the AMBA bus, such as
40  non-configurable replicators:
41
42	* compatible: Currently supported value is (note the absence of the
43	  AMBA markee):
44		- "arm,coresight-replicator"
45
46	* port or ports: same as above.
47
48* Optional properties for ETM/PTMs:
49
50	* arm,cp14: must be present if the system accesses ETM/PTM management
51	  registers via co-processor 14.
52
53	* cpu: the cpu phandle this ETM/PTM is affined to. When omitted the
54	  source is considered to belong to CPU0.
55
56* Optional property for TMC:
57
58	* arm,buffer-size: size of contiguous buffer space for TMC ETR
59	 (embedded trace router)
60
61
62Example:
63
641. Sinks
65	etb@20010000 {
66		compatible = "arm,coresight-etb10", "arm,primecell";
67		reg = <0 0x20010000 0 0x1000>;
68
69		clocks = <&oscclk6a>;
70		clock-names = "apb_pclk";
71		port {
72			etb_in_port: endpoint@0 {
73				slave-mode;
74				remote-endpoint = <&replicator_out_port0>;
75			};
76		};
77	};
78
79	tpiu@20030000 {
80		compatible = "arm,coresight-tpiu", "arm,primecell";
81		reg = <0 0x20030000 0 0x1000>;
82
83		clocks = <&oscclk6a>;
84		clock-names = "apb_pclk";
85		port {
86			tpiu_in_port: endpoint@0 {
87				slave-mode;
88				remote-endpoint = <&replicator_out_port1>;
89			};
90		};
91	};
92
932. Links
94	replicator {
95		/* non-configurable replicators don't show up on the
96		 * AMBA bus.  As such no need to add "arm,primecell".
97		 */
98		compatible = "arm,coresight-replicator";
99
100		ports {
101			#address-cells = <1>;
102			#size-cells = <0>;
103
104			/* replicator output ports */
105			port@0 {
106				reg = <0>;
107				replicator_out_port0: endpoint {
108					remote-endpoint = <&etb_in_port>;
109				};
110			};
111
112			port@1 {
113				reg = <1>;
114				replicator_out_port1: endpoint {
115					remote-endpoint = <&tpiu_in_port>;
116				};
117			};
118
119			/* replicator input port */
120			port@2 {
121				reg = <0>;
122				replicator_in_port0: endpoint {
123					slave-mode;
124					remote-endpoint = <&funnel_out_port0>;
125				};
126			};
127		};
128	};
129
130	funnel@20040000 {
131		compatible = "arm,coresight-funnel", "arm,primecell";
132		reg = <0 0x20040000 0 0x1000>;
133
134		clocks = <&oscclk6a>;
135		clock-names = "apb_pclk";
136		ports {
137			#address-cells = <1>;
138			#size-cells = <0>;
139
140			/* funnel output port */
141			port@0 {
142				reg = <0>;
143				funnel_out_port0: endpoint {
144					remote-endpoint =
145							<&replicator_in_port0>;
146				};
147			};
148
149			/* funnel input ports */
150			port@1 {
151				reg = <0>;
152				funnel_in_port0: endpoint {
153					slave-mode;
154					remote-endpoint = <&ptm0_out_port>;
155				};
156			};
157
158			port@2 {
159				reg = <1>;
160				funnel_in_port1: endpoint {
161					slave-mode;
162					remote-endpoint = <&ptm1_out_port>;
163				};
164			};
165
166			port@3 {
167				reg = <2>;
168				funnel_in_port2: endpoint {
169					slave-mode;
170					remote-endpoint = <&etm0_out_port>;
171				};
172			};
173
174		};
175	};
176
1773. Sources
178	ptm@2201c000 {
179		compatible = "arm,coresight-etm3x", "arm,primecell";
180		reg = <0 0x2201c000 0 0x1000>;
181
182		cpu = <&cpu0>;
183		clocks = <&oscclk6a>;
184		clock-names = "apb_pclk";
185		port {
186			ptm0_out_port: endpoint {
187				remote-endpoint = <&funnel_in_port0>;
188			};
189		};
190	};
191
192	ptm@2201d000 {
193		compatible = "arm,coresight-etm3x", "arm,primecell";
194		reg = <0 0x2201d000 0 0x1000>;
195
196		cpu = <&cpu1>;
197		clocks = <&oscclk6a>;
198		clock-names = "apb_pclk";
199		port {
200			ptm1_out_port: endpoint {
201				remote-endpoint = <&funnel_in_port1>;
202			};
203		};
204	};
205