1<html><head><meta http-equiv="Content-Type" content="text/html; charset=UTF-8"><title>Part II. DRM Drivers</title><meta name="generator" content="DocBook XSL Stylesheets V1.78.1"><link rel="home" href="index.html" title="Linux GPU Driver Developer's Guide"><link rel="up" href="index.html" title="Linux GPU Driver Developer's Guide"><link rel="prev" href="ch03s02.html" title="VBlank event handling"><link rel="next" href="drmI915.html" title="Chapter 4. drm/i915 Intel GFX Driver"></head><body bgcolor="white" text="black" link="#0000FF" vlink="#840084" alink="#0000FF"><div class="navheader"><table width="100%" summary="Navigation header"><tr><th colspan="3" align="center">Part II. DRM Drivers</th></tr><tr><td width="20%" align="left"><a accesskey="p" href="ch03s02.html">Prev</a> </td><th width="60%" align="center"> </th><td width="20%" align="right"> <a accesskey="n" href="drmI915.html">Next</a></td></tr></table><hr></div><div class="part"><div class="titlepage"><div><div><h1 class="title"><a name="drmDrivers"></a>Part II. DRM Drivers</h1></div></div></div><div class="partintro"><div></div><p>
2      This second part of the GPU Driver Developer's Guide documents driver
3      code, implementation details and also all the driver-specific userspace
4      interfaces. Especially since all hardware-acceleration interfaces to
5      userspace are driver specific for efficiency and other reasons these
6      interfaces can be rather substantial. Hence every driver has its own
7      chapter.
8    </p><div class="toc"><p><b>Table of Contents</b></p><dl class="toc"><dt><span class="chapter"><a href="drmI915.html">4. drm/i915 Intel GFX Driver</a></span></dt><dd><dl><dt><span class="sect1"><a href="drmI915.html#id-1.4.3.3">Core Driver Infrastructure</a></span></dt><dd><dl><dt><span class="sect2"><a href="drmI915.html#id-1.4.3.3.3">Runtime Power Management</a></span></dt><dt><span class="sect2"><a href="drmI915.html#id-1.4.3.3.4">Interrupt Handling</a></span></dt><dt><span class="sect2"><a href="drmI915.html#id-1.4.3.3.5">Intel GVT-g Guest Support(vGPU)</a></span></dt></dl></dd><dt><span class="sect1"><a href="ch04s02.html">Display Hardware Handling</a></span></dt><dd><dl><dt><span class="sect2"><a href="ch04s02.html#id-1.4.3.4.3">Mode Setting Infrastructure</a></span></dt><dt><span class="sect2"><a href="ch04s02.html#id-1.4.3.4.4">Frontbuffer Tracking</a></span></dt><dt><span class="sect2"><a href="ch04s02.html#id-1.4.3.4.5">Display FIFO Underrun Reporting</a></span></dt><dt><span class="sect2"><a href="ch04s02.html#id-1.4.3.4.6">Plane Configuration</a></span></dt><dt><span class="sect2"><a href="ch04s02.html#id-1.4.3.4.7">Atomic Plane Helpers</a></span></dt><dt><span class="sect2"><a href="ch04s02.html#id-1.4.3.4.8">Output Probing</a></span></dt><dt><span class="sect2"><a href="ch04s02.html#id-1.4.3.4.9">Hotplug</a></span></dt><dt><span class="sect2"><a href="ch04s02.html#id-1.4.3.4.10">High Definition Audio</a></span></dt><dt><span class="sect2"><a href="ch04s02.html#id-1.4.3.4.11">Panel Self Refresh PSR (PSR/SRD)</a></span></dt><dt><span class="sect2"><a href="ch04s02.html#id-1.4.3.4.12">Frame Buffer Compression (FBC)</a></span></dt><dt><span class="sect2"><a href="ch04s02.html#id-1.4.3.4.13">Display Refresh Rate Switching (DRRS)</a></span></dt><dt><span class="sect2"><a href="ch04s02.html#id-1.4.3.4.14">DPIO</a></span></dt><dt><span class="sect2"><a href="ch04s02.html#id-1.4.3.4.15">CSR firmware support for DMC</a></span></dt></dl></dd><dt><span class="sect1"><a href="ch04s03.html">Memory Management and Command Submission</a></span></dt><dd><dl><dt><span class="sect2"><a href="ch04s03.html#id-1.4.3.5.3">Batchbuffer Parsing</a></span></dt><dt><span class="sect2"><a href="ch04s03.html#id-1.4.3.5.4">Batchbuffer Pools</a></span></dt><dt><span class="sect2"><a href="ch04s03.html#id-1.4.3.5.5">Logical Rings, Logical Ring Contexts and Execlists</a></span></dt><dt><span class="sect2"><a href="ch04s03.html#id-1.4.3.5.6">Global GTT views</a></span></dt><dt><span class="sect2"><a href="ch04s03.html#id-1.4.3.5.7">GTT Fences and Swizzling</a></span></dt><dt><span class="sect2"><a href="ch04s03.html#id-1.4.3.5.8">Object Tiling IOCTLs</a></span></dt><dt><span class="sect2"><a href="ch04s03.html#id-1.4.3.5.9">Buffer Object Eviction</a></span></dt><dt><span class="sect2"><a href="ch04s03.html#id-1.4.3.5.10">Buffer Object Memory Shrinking</a></span></dt></dl></dd><dt><span class="sect1"><a href="ch04s04.html">GuC-based Command Submission</a></span></dt><dd><dl><dt><span class="sect2"><a href="ch04s04.html#id-1.4.3.6.2">GuC</a></span></dt><dt><span class="sect2"><a href="ch04s04.html#id-1.4.3.6.3">GuC Client</a></span></dt></dl></dd><dt><span class="sect1"><a href="ch04s05.html"> Tracing </a></span></dt><dd><dl><dt><span class="sect2"><a href="ch04s05.html#id-1.4.3.7.3"> i915_ppgtt_create and i915_ppgtt_release </a></span></dt><dt><span class="sect2"><a href="ch04s05.html#id-1.4.3.7.4"> i915_context_create and i915_context_free </a></span></dt><dt><span class="sect2"><a href="ch04s05.html#id-1.4.3.7.5"> switch_mm </a></span></dt></dl></dd></dl></dd></dl></div></div></div><div class="navfooter"><hr><table width="100%" summary="Navigation footer"><tr><td width="40%" align="left"><a accesskey="p" href="ch03s02.html">Prev</a> </td><td width="20%" align="center"> </td><td width="40%" align="right"> <a accesskey="n" href="drmI915.html">Next</a></td></tr><tr><td width="40%" align="left" valign="top">VBlank event handling </td><td width="20%" align="center"><a accesskey="h" href="index.html">Home</a></td><td width="40%" align="right" valign="top"> Chapter 4. drm/i915 Intel GFX Driver</td></tr></table></div></body></html>
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