1 /*
2  *  sound/soc/samsung/smdk_wm8580pcm.c
3  *
4  *  Copyright (c) 2011 Samsung Electronics Co. Ltd
5  *
6  *  This program is free software; you can redistribute  it and/or  modify it
7  *  under  the terms of  the GNU General  Public License as published by the
8  *  Free Software Foundation;  either version 2 of the  License, or (at your
9  *  option) any later version.
10  */
11 #include <linux/module.h>
12 #include <sound/soc.h>
13 #include <sound/pcm_params.h>
14 #include <sound/pcm.h>
15 
16 #include <asm/mach-types.h>
17 
18 #include "../codecs/wm8580.h"
19 #include "dma.h"
20 #include "pcm.h"
21 
22 /*
23  * Board Settings:
24  *  o '1' means 'ON'
25  *  o '0' means 'OFF'
26  *  o 'X' means 'Don't care'
27  *
28  * SMDK6410 Base B/D: CFG1-0000, CFG2-1111
29  * SMDKC110, SMDKV210: CFGB11-100100, CFGB12-0000
30  */
31 
32 #define SMDK_WM8580_EXT_OSC 12000000
33 #define SMDK_WM8580_EXT_MCLK 4096000
34 #define SMDK_WM8580_EXT_VOICE 2048000
35 
36 static unsigned long mclk_freq;
37 static unsigned long xtal_freq;
38 
39 /*
40  * If MCLK clock directly gets from XTAL, we don't have to use PLL
41  * to make MCLK, but if XTAL clock source connects with other codec
42  * pin (like XTI), we should have to set codec's PLL to make MCLK.
43  * Because Samsung SoC does not support pcmcdclk output like I2S.
44  */
45 
smdk_wm8580_pcm_hw_params(struct snd_pcm_substream * substream,struct snd_pcm_hw_params * params)46 static int smdk_wm8580_pcm_hw_params(struct snd_pcm_substream *substream,
47 			      struct snd_pcm_hw_params *params)
48 {
49 	struct snd_soc_pcm_runtime *rtd = substream->private_data;
50 	struct snd_soc_dai *codec_dai = rtd->codec_dai;
51 	struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
52 	int rfs, ret;
53 
54 	switch (params_rate(params)) {
55 	case 8000:
56 		break;
57 	default:
58 		printk(KERN_ERR "%s:%d Sampling Rate %u not supported!\n",
59 		__func__, __LINE__, params_rate(params));
60 		return -EINVAL;
61 	}
62 
63 	rfs = mclk_freq / params_rate(params) / 2;
64 
65 	if (mclk_freq == xtal_freq) {
66 		ret = snd_soc_dai_set_sysclk(codec_dai, WM8580_CLKSRC_MCLK,
67 						mclk_freq, SND_SOC_CLOCK_IN);
68 		if (ret < 0)
69 			return ret;
70 
71 		ret = snd_soc_dai_set_clkdiv(codec_dai, WM8580_MCLK,
72 						WM8580_CLKSRC_MCLK);
73 		if (ret < 0)
74 			return ret;
75 	} else {
76 		ret = snd_soc_dai_set_sysclk(codec_dai, WM8580_CLKSRC_PLLA,
77 						mclk_freq, SND_SOC_CLOCK_IN);
78 		if (ret < 0)
79 			return ret;
80 
81 		ret = snd_soc_dai_set_clkdiv(codec_dai, WM8580_MCLK,
82 						WM8580_CLKSRC_PLLA);
83 		if (ret < 0)
84 			return ret;
85 
86 		ret = snd_soc_dai_set_pll(codec_dai, WM8580_PLLA, 0,
87 						xtal_freq, mclk_freq);
88 		if (ret < 0)
89 			return ret;
90 	}
91 
92 	/* Set PCM source clock on CPU */
93 	ret = snd_soc_dai_set_sysclk(cpu_dai, S3C_PCM_CLKSRC_MUX,
94 					mclk_freq, SND_SOC_CLOCK_IN);
95 	if (ret < 0)
96 		return ret;
97 
98 	/* Set SCLK_DIV for making bclk */
99 	ret = snd_soc_dai_set_clkdiv(cpu_dai, S3C_PCM_SCLK_PER_FS, rfs);
100 	if (ret < 0)
101 		return ret;
102 
103 	return 0;
104 }
105 
106 static struct snd_soc_ops smdk_wm8580_pcm_ops = {
107 	.hw_params = smdk_wm8580_pcm_hw_params,
108 };
109 
110 #define SMDK_DAI_FMT (SND_SOC_DAIFMT_DSP_B | SND_SOC_DAIFMT_IB_NF | \
111 	SND_SOC_DAIFMT_CBS_CFS)
112 
113 static struct snd_soc_dai_link smdk_dai[] = {
114 	{
115 		.name = "WM8580 PAIF PCM RX",
116 		.stream_name = "Playback",
117 		.cpu_dai_name = "samsung-pcm.0",
118 		.codec_dai_name = "wm8580-hifi-playback",
119 		.platform_name = "samsung-audio",
120 		.codec_name = "wm8580.0-001b",
121 		.dai_fmt = SMDK_DAI_FMT,
122 		.ops = &smdk_wm8580_pcm_ops,
123 	}, {
124 		.name = "WM8580 PAIF PCM TX",
125 		.stream_name = "Capture",
126 		.cpu_dai_name = "samsung-pcm.0",
127 		.codec_dai_name = "wm8580-hifi-capture",
128 		.platform_name = "samsung-pcm.0",
129 		.codec_name = "wm8580.0-001b",
130 		.dai_fmt = SMDK_DAI_FMT,
131 		.ops = &smdk_wm8580_pcm_ops,
132 	},
133 };
134 
135 static struct snd_soc_card smdk_pcm = {
136 	.name = "SMDK-PCM",
137 	.owner = THIS_MODULE,
138 	.dai_link = smdk_dai,
139 	.num_links = 2,
140 };
141 
142 /*
143  * After SMDKC110 Base Board's Rev is '0.1', 12MHz External OSC(X1)
144  * is absent (or not connected), so we connect EXT_VOICE_CLK(OSC4),
145  * 2.0484Mhz, directly with MCLK both Codec and SoC.
146  */
snd_smdk_probe(struct platform_device * pdev)147 static int snd_smdk_probe(struct platform_device *pdev)
148 {
149 	int ret = 0;
150 
151 	xtal_freq = SMDK_WM8580_EXT_OSC;
152 	mclk_freq = SMDK_WM8580_EXT_MCLK;
153 
154 	if (machine_is_smdkc110() || machine_is_smdkv210())
155 		xtal_freq = mclk_freq = SMDK_WM8580_EXT_VOICE;
156 
157 	smdk_pcm.dev = &pdev->dev;
158 	ret = devm_snd_soc_register_card(&pdev->dev, &smdk_pcm);
159 	if (ret)
160 		dev_err(&pdev->dev, "snd_soc_register_card failed %d\n", ret);
161 
162 	return ret;
163 }
164 
165 static struct platform_driver snd_smdk_driver = {
166 	.driver = {
167 		.name = "samsung-smdk-pcm",
168 	},
169 	.probe = snd_smdk_probe,
170 };
171 
172 module_platform_driver(snd_smdk_driver);
173 
174 MODULE_AUTHOR("Sangbeom Kim, <sbkim73@samsung.com>");
175 MODULE_DESCRIPTION("ALSA SoC SMDK WM8580 for PCM");
176 MODULE_LICENSE("GPL");
177