1/*
2 *   ALSA driver for VT1724 ICEnsemble ICE1724 / VIA VT1724 (Envy24HT)
3 *                   VIA VT1720 (Envy24PT)
4 *
5 *	Copyright (c) 2000 Jaroslav Kysela <perex@perex.cz>
6 *                    2002 James Stafford <jstafford@ampltd.com>
7 *                    2003 Takashi Iwai <tiwai@suse.de>
8 *
9 *   This program is free software; you can redistribute it and/or modify
10 *   it under the terms of the GNU General Public License as published by
11 *   the Free Software Foundation; either version 2 of the License, or
12 *   (at your option) any later version.
13 *
14 *   This program is distributed in the hope that it will be useful,
15 *   but WITHOUT ANY WARRANTY; without even the implied warranty of
16 *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
17 *   GNU General Public License for more details.
18 *
19 *   You should have received a copy of the GNU General Public License
20 *   along with this program; if not, write to the Free Software
21 *   Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307 USA
22 *
23 */
24
25#include <linux/delay.h>
26#include <linux/interrupt.h>
27#include <linux/init.h>
28#include <linux/pci.h>
29#include <linux/slab.h>
30#include <linux/module.h>
31#include <linux/mutex.h>
32#include <sound/core.h>
33#include <sound/info.h>
34#include <sound/rawmidi.h>
35#include <sound/initval.h>
36
37#include <sound/asoundef.h>
38
39#include "ice1712.h"
40#include "envy24ht.h"
41
42/* lowlevel routines */
43#include "amp.h"
44#include "revo.h"
45#include "aureon.h"
46#include "vt1720_mobo.h"
47#include "pontis.h"
48#include "prodigy192.h"
49#include "prodigy_hifi.h"
50#include "juli.h"
51#include "maya44.h"
52#include "phase.h"
53#include "wtm.h"
54#include "se.h"
55#include "quartet.h"
56#include "psc724.h"
57
58MODULE_AUTHOR("Jaroslav Kysela <perex@perex.cz>");
59MODULE_DESCRIPTION("VIA ICEnsemble ICE1724/1720 (Envy24HT/PT)");
60MODULE_LICENSE("GPL");
61MODULE_SUPPORTED_DEVICE("{"
62	       REVO_DEVICE_DESC
63	       AMP_AUDIO2000_DEVICE_DESC
64	       AUREON_DEVICE_DESC
65	       VT1720_MOBO_DEVICE_DESC
66	       PONTIS_DEVICE_DESC
67	       PRODIGY192_DEVICE_DESC
68	       PRODIGY_HIFI_DEVICE_DESC
69	       JULI_DEVICE_DESC
70	       MAYA44_DEVICE_DESC
71	       PHASE_DEVICE_DESC
72	       WTM_DEVICE_DESC
73	       SE_DEVICE_DESC
74	       QTET_DEVICE_DESC
75		"{VIA,VT1720},"
76		"{VIA,VT1724},"
77		"{ICEnsemble,Generic ICE1724},"
78		"{ICEnsemble,Generic Envy24HT}"
79		"{ICEnsemble,Generic Envy24PT}}");
80
81static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX;	/* Index 0-MAX */
82static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR;	/* ID for this card */
83static bool enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP;		/* Enable this card */
84static char *model[SNDRV_CARDS];
85
86module_param_array(index, int, NULL, 0444);
87MODULE_PARM_DESC(index, "Index value for ICE1724 soundcard.");
88module_param_array(id, charp, NULL, 0444);
89MODULE_PARM_DESC(id, "ID string for ICE1724 soundcard.");
90module_param_array(enable, bool, NULL, 0444);
91MODULE_PARM_DESC(enable, "Enable ICE1724 soundcard.");
92module_param_array(model, charp, NULL, 0444);
93MODULE_PARM_DESC(model, "Use the given board model.");
94
95
96/* Both VT1720 and VT1724 have the same PCI IDs */
97static const struct pci_device_id snd_vt1724_ids[] = {
98	{ PCI_VDEVICE(ICE, PCI_DEVICE_ID_VT1724), 0 },
99	{ 0, }
100};
101
102MODULE_DEVICE_TABLE(pci, snd_vt1724_ids);
103
104
105static int PRO_RATE_LOCKED;
106static int PRO_RATE_RESET = 1;
107static unsigned int PRO_RATE_DEFAULT = 44100;
108
109static const char * const ext_clock_names[1] = { "IEC958 In" };
110
111/*
112 *  Basic I/O
113 */
114
115/*
116 *  default rates, default clock routines
117 */
118
119/* check whether the clock mode is spdif-in */
120static inline int stdclock_is_spdif_master(struct snd_ice1712 *ice)
121{
122	return (inb(ICEMT1724(ice, RATE)) & VT1724_SPDIF_MASTER) ? 1 : 0;
123}
124
125/*
126 * locking rate makes sense only for internal clock mode
127 */
128static inline int is_pro_rate_locked(struct snd_ice1712 *ice)
129{
130	return (!ice->is_spdif_master(ice)) && PRO_RATE_LOCKED;
131}
132
133/*
134 * ac97 section
135 */
136
137static unsigned char snd_vt1724_ac97_ready(struct snd_ice1712 *ice)
138{
139	unsigned char old_cmd;
140	int tm;
141	for (tm = 0; tm < 0x10000; tm++) {
142		old_cmd = inb(ICEMT1724(ice, AC97_CMD));
143		if (old_cmd & (VT1724_AC97_WRITE | VT1724_AC97_READ))
144			continue;
145		if (!(old_cmd & VT1724_AC97_READY))
146			continue;
147		return old_cmd;
148	}
149	dev_dbg(ice->card->dev, "snd_vt1724_ac97_ready: timeout\n");
150	return old_cmd;
151}
152
153static int snd_vt1724_ac97_wait_bit(struct snd_ice1712 *ice, unsigned char bit)
154{
155	int tm;
156	for (tm = 0; tm < 0x10000; tm++)
157		if ((inb(ICEMT1724(ice, AC97_CMD)) & bit) == 0)
158			return 0;
159	dev_dbg(ice->card->dev, "snd_vt1724_ac97_wait_bit: timeout\n");
160	return -EIO;
161}
162
163static void snd_vt1724_ac97_write(struct snd_ac97 *ac97,
164				  unsigned short reg,
165				  unsigned short val)
166{
167	struct snd_ice1712 *ice = ac97->private_data;
168	unsigned char old_cmd;
169
170	old_cmd = snd_vt1724_ac97_ready(ice);
171	old_cmd &= ~VT1724_AC97_ID_MASK;
172	old_cmd |= ac97->num;
173	outb(reg, ICEMT1724(ice, AC97_INDEX));
174	outw(val, ICEMT1724(ice, AC97_DATA));
175	outb(old_cmd | VT1724_AC97_WRITE, ICEMT1724(ice, AC97_CMD));
176	snd_vt1724_ac97_wait_bit(ice, VT1724_AC97_WRITE);
177}
178
179static unsigned short snd_vt1724_ac97_read(struct snd_ac97 *ac97, unsigned short reg)
180{
181	struct snd_ice1712 *ice = ac97->private_data;
182	unsigned char old_cmd;
183
184	old_cmd = snd_vt1724_ac97_ready(ice);
185	old_cmd &= ~VT1724_AC97_ID_MASK;
186	old_cmd |= ac97->num;
187	outb(reg, ICEMT1724(ice, AC97_INDEX));
188	outb(old_cmd | VT1724_AC97_READ, ICEMT1724(ice, AC97_CMD));
189	if (snd_vt1724_ac97_wait_bit(ice, VT1724_AC97_READ) < 0)
190		return ~0;
191	return inw(ICEMT1724(ice, AC97_DATA));
192}
193
194
195/*
196 * GPIO operations
197 */
198
199/* set gpio direction 0 = read, 1 = write */
200static void snd_vt1724_set_gpio_dir(struct snd_ice1712 *ice, unsigned int data)
201{
202	outl(data, ICEREG1724(ice, GPIO_DIRECTION));
203	inw(ICEREG1724(ice, GPIO_DIRECTION)); /* dummy read for pci-posting */
204}
205
206/* get gpio direction 0 = read, 1 = write */
207static unsigned int snd_vt1724_get_gpio_dir(struct snd_ice1712 *ice)
208{
209	return inl(ICEREG1724(ice, GPIO_DIRECTION));
210}
211
212/* set the gpio mask (0 = writable) */
213static void snd_vt1724_set_gpio_mask(struct snd_ice1712 *ice, unsigned int data)
214{
215	outw(data, ICEREG1724(ice, GPIO_WRITE_MASK));
216	if (!ice->vt1720) /* VT1720 supports only 16 GPIO bits */
217		outb((data >> 16) & 0xff, ICEREG1724(ice, GPIO_WRITE_MASK_22));
218	inw(ICEREG1724(ice, GPIO_WRITE_MASK)); /* dummy read for pci-posting */
219}
220
221static unsigned int snd_vt1724_get_gpio_mask(struct snd_ice1712 *ice)
222{
223	unsigned int mask;
224	if (!ice->vt1720)
225		mask = (unsigned int)inb(ICEREG1724(ice, GPIO_WRITE_MASK_22));
226	else
227		mask = 0;
228	mask = (mask << 16) | inw(ICEREG1724(ice, GPIO_WRITE_MASK));
229	return mask;
230}
231
232static void snd_vt1724_set_gpio_data(struct snd_ice1712 *ice, unsigned int data)
233{
234	outw(data, ICEREG1724(ice, GPIO_DATA));
235	if (!ice->vt1720)
236		outb(data >> 16, ICEREG1724(ice, GPIO_DATA_22));
237	inw(ICEREG1724(ice, GPIO_DATA)); /* dummy read for pci-posting */
238}
239
240static unsigned int snd_vt1724_get_gpio_data(struct snd_ice1712 *ice)
241{
242	unsigned int data;
243	if (!ice->vt1720)
244		data = (unsigned int)inb(ICEREG1724(ice, GPIO_DATA_22));
245	else
246		data = 0;
247	data = (data << 16) | inw(ICEREG1724(ice, GPIO_DATA));
248	return data;
249}
250
251/*
252 * MIDI
253 */
254
255static void vt1724_midi_clear_rx(struct snd_ice1712 *ice)
256{
257	unsigned int count;
258
259	for (count = inb(ICEREG1724(ice, MPU_RXFIFO)); count > 0; --count)
260		inb(ICEREG1724(ice, MPU_DATA));
261}
262
263static inline struct snd_rawmidi_substream *
264get_rawmidi_substream(struct snd_ice1712 *ice, unsigned int stream)
265{
266	return list_first_entry(&ice->rmidi[0]->streams[stream].substreams,
267				struct snd_rawmidi_substream, list);
268}
269
270static void enable_midi_irq(struct snd_ice1712 *ice, u8 flag, int enable);
271
272static void vt1724_midi_write(struct snd_ice1712 *ice)
273{
274	struct snd_rawmidi_substream *s;
275	int count, i;
276	u8 buffer[32];
277
278	s = get_rawmidi_substream(ice, SNDRV_RAWMIDI_STREAM_OUTPUT);
279	count = 31 - inb(ICEREG1724(ice, MPU_TXFIFO));
280	if (count > 0) {
281		count = snd_rawmidi_transmit(s, buffer, count);
282		for (i = 0; i < count; ++i)
283			outb(buffer[i], ICEREG1724(ice, MPU_DATA));
284	}
285	/* mask irq when all bytes have been transmitted.
286	 * enabled again in output_trigger when the new data comes in.
287	 */
288	enable_midi_irq(ice, VT1724_IRQ_MPU_TX,
289			!snd_rawmidi_transmit_empty(s));
290}
291
292static void vt1724_midi_read(struct snd_ice1712 *ice)
293{
294	struct snd_rawmidi_substream *s;
295	int count, i;
296	u8 buffer[32];
297
298	s = get_rawmidi_substream(ice, SNDRV_RAWMIDI_STREAM_INPUT);
299	count = inb(ICEREG1724(ice, MPU_RXFIFO));
300	if (count > 0) {
301		count = min(count, 32);
302		for (i = 0; i < count; ++i)
303			buffer[i] = inb(ICEREG1724(ice, MPU_DATA));
304		snd_rawmidi_receive(s, buffer, count);
305	}
306}
307
308/* call with ice->reg_lock */
309static void enable_midi_irq(struct snd_ice1712 *ice, u8 flag, int enable)
310{
311	u8 mask = inb(ICEREG1724(ice, IRQMASK));
312	if (enable)
313		mask &= ~flag;
314	else
315		mask |= flag;
316	outb(mask, ICEREG1724(ice, IRQMASK));
317}
318
319static void vt1724_enable_midi_irq(struct snd_rawmidi_substream *substream,
320				   u8 flag, int enable)
321{
322	struct snd_ice1712 *ice = substream->rmidi->private_data;
323
324	spin_lock_irq(&ice->reg_lock);
325	enable_midi_irq(ice, flag, enable);
326	spin_unlock_irq(&ice->reg_lock);
327}
328
329static int vt1724_midi_output_open(struct snd_rawmidi_substream *s)
330{
331	return 0;
332}
333
334static int vt1724_midi_output_close(struct snd_rawmidi_substream *s)
335{
336	return 0;
337}
338
339static void vt1724_midi_output_trigger(struct snd_rawmidi_substream *s, int up)
340{
341	struct snd_ice1712 *ice = s->rmidi->private_data;
342	unsigned long flags;
343
344	spin_lock_irqsave(&ice->reg_lock, flags);
345	if (up) {
346		ice->midi_output = 1;
347		vt1724_midi_write(ice);
348	} else {
349		ice->midi_output = 0;
350		enable_midi_irq(ice, VT1724_IRQ_MPU_TX, 0);
351	}
352	spin_unlock_irqrestore(&ice->reg_lock, flags);
353}
354
355static void vt1724_midi_output_drain(struct snd_rawmidi_substream *s)
356{
357	struct snd_ice1712 *ice = s->rmidi->private_data;
358	unsigned long timeout;
359
360	vt1724_enable_midi_irq(s, VT1724_IRQ_MPU_TX, 0);
361	/* 32 bytes should be transmitted in less than about 12 ms */
362	timeout = jiffies + msecs_to_jiffies(15);
363	do {
364		if (inb(ICEREG1724(ice, MPU_CTRL)) & VT1724_MPU_TX_EMPTY)
365			break;
366		schedule_timeout_uninterruptible(1);
367	} while (time_after(timeout, jiffies));
368}
369
370static struct snd_rawmidi_ops vt1724_midi_output_ops = {
371	.open = vt1724_midi_output_open,
372	.close = vt1724_midi_output_close,
373	.trigger = vt1724_midi_output_trigger,
374	.drain = vt1724_midi_output_drain,
375};
376
377static int vt1724_midi_input_open(struct snd_rawmidi_substream *s)
378{
379	vt1724_midi_clear_rx(s->rmidi->private_data);
380	vt1724_enable_midi_irq(s, VT1724_IRQ_MPU_RX, 1);
381	return 0;
382}
383
384static int vt1724_midi_input_close(struct snd_rawmidi_substream *s)
385{
386	vt1724_enable_midi_irq(s, VT1724_IRQ_MPU_RX, 0);
387	return 0;
388}
389
390static void vt1724_midi_input_trigger(struct snd_rawmidi_substream *s, int up)
391{
392	struct snd_ice1712 *ice = s->rmidi->private_data;
393	unsigned long flags;
394
395	spin_lock_irqsave(&ice->reg_lock, flags);
396	if (up) {
397		ice->midi_input = 1;
398		vt1724_midi_read(ice);
399	} else {
400		ice->midi_input = 0;
401	}
402	spin_unlock_irqrestore(&ice->reg_lock, flags);
403}
404
405static struct snd_rawmidi_ops vt1724_midi_input_ops = {
406	.open = vt1724_midi_input_open,
407	.close = vt1724_midi_input_close,
408	.trigger = vt1724_midi_input_trigger,
409};
410
411
412/*
413 *  Interrupt handler
414 */
415
416static irqreturn_t snd_vt1724_interrupt(int irq, void *dev_id)
417{
418	struct snd_ice1712 *ice = dev_id;
419	unsigned char status;
420	unsigned char status_mask =
421		VT1724_IRQ_MPU_RX | VT1724_IRQ_MPU_TX | VT1724_IRQ_MTPCM;
422	int handled = 0;
423	int timeout = 0;
424
425	while (1) {
426		status = inb(ICEREG1724(ice, IRQSTAT));
427		status &= status_mask;
428		if (status == 0)
429			break;
430		spin_lock(&ice->reg_lock);
431		if (++timeout > 10) {
432			status = inb(ICEREG1724(ice, IRQSTAT));
433			dev_err(ice->card->dev,
434				"Too long irq loop, status = 0x%x\n", status);
435			if (status & VT1724_IRQ_MPU_TX) {
436				dev_err(ice->card->dev, "Disabling MPU_TX\n");
437				enable_midi_irq(ice, VT1724_IRQ_MPU_TX, 0);
438			}
439			spin_unlock(&ice->reg_lock);
440			break;
441		}
442		handled = 1;
443		if (status & VT1724_IRQ_MPU_TX) {
444			if (ice->midi_output)
445				vt1724_midi_write(ice);
446			else
447				enable_midi_irq(ice, VT1724_IRQ_MPU_TX, 0);
448			/* Due to mysterical reasons, MPU_TX is always
449			 * generated (and can't be cleared) when a PCM
450			 * playback is going.  So let's ignore at the
451			 * next loop.
452			 */
453			status_mask &= ~VT1724_IRQ_MPU_TX;
454		}
455		if (status & VT1724_IRQ_MPU_RX) {
456			if (ice->midi_input)
457				vt1724_midi_read(ice);
458			else
459				vt1724_midi_clear_rx(ice);
460		}
461		/* ack MPU irq */
462		outb(status, ICEREG1724(ice, IRQSTAT));
463		spin_unlock(&ice->reg_lock);
464		if (status & VT1724_IRQ_MTPCM) {
465			/*
466			 * Multi-track PCM
467			 * PCM assignment are:
468			 * Playback DMA0 (M/C) = playback_pro_substream
469			 * Playback DMA1 = playback_con_substream_ds[0]
470			 * Playback DMA2 = playback_con_substream_ds[1]
471			 * Playback DMA3 = playback_con_substream_ds[2]
472			 * Playback DMA4 (SPDIF) = playback_con_substream
473			 * Record DMA0 = capture_pro_substream
474			 * Record DMA1 = capture_con_substream
475			 */
476			unsigned char mtstat = inb(ICEMT1724(ice, IRQ));
477			if (mtstat & VT1724_MULTI_PDMA0) {
478				if (ice->playback_pro_substream)
479					snd_pcm_period_elapsed(ice->playback_pro_substream);
480			}
481			if (mtstat & VT1724_MULTI_RDMA0) {
482				if (ice->capture_pro_substream)
483					snd_pcm_period_elapsed(ice->capture_pro_substream);
484			}
485			if (mtstat & VT1724_MULTI_PDMA1) {
486				if (ice->playback_con_substream_ds[0])
487					snd_pcm_period_elapsed(ice->playback_con_substream_ds[0]);
488			}
489			if (mtstat & VT1724_MULTI_PDMA2) {
490				if (ice->playback_con_substream_ds[1])
491					snd_pcm_period_elapsed(ice->playback_con_substream_ds[1]);
492			}
493			if (mtstat & VT1724_MULTI_PDMA3) {
494				if (ice->playback_con_substream_ds[2])
495					snd_pcm_period_elapsed(ice->playback_con_substream_ds[2]);
496			}
497			if (mtstat & VT1724_MULTI_PDMA4) {
498				if (ice->playback_con_substream)
499					snd_pcm_period_elapsed(ice->playback_con_substream);
500			}
501			if (mtstat & VT1724_MULTI_RDMA1) {
502				if (ice->capture_con_substream)
503					snd_pcm_period_elapsed(ice->capture_con_substream);
504			}
505			/* ack anyway to avoid freeze */
506			outb(mtstat, ICEMT1724(ice, IRQ));
507			/* ought to really handle this properly */
508			if (mtstat & VT1724_MULTI_FIFO_ERR) {
509				unsigned char fstat = inb(ICEMT1724(ice, DMA_FIFO_ERR));
510				outb(fstat, ICEMT1724(ice, DMA_FIFO_ERR));
511				outb(VT1724_MULTI_FIFO_ERR | inb(ICEMT1724(ice, DMA_INT_MASK)), ICEMT1724(ice, DMA_INT_MASK));
512				/* If I don't do this, I get machine lockup due to continual interrupts */
513			}
514
515		}
516	}
517	return IRQ_RETVAL(handled);
518}
519
520/*
521 *  PCM code - professional part (multitrack)
522 */
523
524static unsigned int rates[] = {
525	8000, 9600, 11025, 12000, 16000, 22050, 24000,
526	32000, 44100, 48000, 64000, 88200, 96000,
527	176400, 192000,
528};
529
530static struct snd_pcm_hw_constraint_list hw_constraints_rates_96 = {
531	.count = ARRAY_SIZE(rates) - 2, /* up to 96000 */
532	.list = rates,
533	.mask = 0,
534};
535
536static struct snd_pcm_hw_constraint_list hw_constraints_rates_48 = {
537	.count = ARRAY_SIZE(rates) - 5, /* up to 48000 */
538	.list = rates,
539	.mask = 0,
540};
541
542static struct snd_pcm_hw_constraint_list hw_constraints_rates_192 = {
543	.count = ARRAY_SIZE(rates),
544	.list = rates,
545	.mask = 0,
546};
547
548struct vt1724_pcm_reg {
549	unsigned int addr;	/* ADDR register offset */
550	unsigned int size;	/* SIZE register offset */
551	unsigned int count;	/* COUNT register offset */
552	unsigned int start;	/* start & pause bit */
553};
554
555static int snd_vt1724_pcm_trigger(struct snd_pcm_substream *substream, int cmd)
556{
557	struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
558	unsigned char what;
559	unsigned char old;
560	struct snd_pcm_substream *s;
561
562	what = 0;
563	snd_pcm_group_for_each_entry(s, substream) {
564		if (snd_pcm_substream_chip(s) == ice) {
565			const struct vt1724_pcm_reg *reg;
566			reg = s->runtime->private_data;
567			what |= reg->start;
568			snd_pcm_trigger_done(s, substream);
569		}
570	}
571
572	switch (cmd) {
573	case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
574	case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
575		spin_lock(&ice->reg_lock);
576		old = inb(ICEMT1724(ice, DMA_PAUSE));
577		if (cmd == SNDRV_PCM_TRIGGER_PAUSE_PUSH)
578			old |= what;
579		else
580			old &= ~what;
581		outb(old, ICEMT1724(ice, DMA_PAUSE));
582		spin_unlock(&ice->reg_lock);
583		break;
584
585	case SNDRV_PCM_TRIGGER_START:
586	case SNDRV_PCM_TRIGGER_STOP:
587	case SNDRV_PCM_TRIGGER_SUSPEND:
588		spin_lock(&ice->reg_lock);
589		old = inb(ICEMT1724(ice, DMA_CONTROL));
590		if (cmd == SNDRV_PCM_TRIGGER_START)
591			old |= what;
592		else
593			old &= ~what;
594		outb(old, ICEMT1724(ice, DMA_CONTROL));
595		spin_unlock(&ice->reg_lock);
596		break;
597
598	case SNDRV_PCM_TRIGGER_RESUME:
599		/* apps will have to restart stream */
600		break;
601
602	default:
603		return -EINVAL;
604	}
605	return 0;
606}
607
608/*
609 */
610
611#define DMA_STARTS	(VT1724_RDMA0_START|VT1724_PDMA0_START|VT1724_RDMA1_START|\
612	VT1724_PDMA1_START|VT1724_PDMA2_START|VT1724_PDMA3_START|VT1724_PDMA4_START)
613#define DMA_PAUSES	(VT1724_RDMA0_PAUSE|VT1724_PDMA0_PAUSE|VT1724_RDMA1_PAUSE|\
614	VT1724_PDMA1_PAUSE|VT1724_PDMA2_PAUSE|VT1724_PDMA3_PAUSE|VT1724_PDMA4_PAUSE)
615
616static const unsigned int stdclock_rate_list[16] = {
617	48000, 24000, 12000, 9600, 32000, 16000, 8000, 96000, 44100,
618	22050, 11025, 88200, 176400, 0, 192000, 64000
619};
620
621static unsigned int stdclock_get_rate(struct snd_ice1712 *ice)
622{
623	unsigned int rate;
624	rate = stdclock_rate_list[inb(ICEMT1724(ice, RATE)) & 15];
625	return rate;
626}
627
628static void stdclock_set_rate(struct snd_ice1712 *ice, unsigned int rate)
629{
630	int i;
631	for (i = 0; i < ARRAY_SIZE(stdclock_rate_list); i++) {
632		if (stdclock_rate_list[i] == rate) {
633			outb(i, ICEMT1724(ice, RATE));
634			return;
635		}
636	}
637}
638
639static unsigned char stdclock_set_mclk(struct snd_ice1712 *ice,
640				       unsigned int rate)
641{
642	unsigned char val, old;
643	/* check MT02 */
644	if (ice->eeprom.data[ICE_EEP2_ACLINK] & VT1724_CFG_PRO_I2S) {
645		val = old = inb(ICEMT1724(ice, I2S_FORMAT));
646		if (rate > 96000)
647			val |= VT1724_MT_I2S_MCLK_128X; /* 128x MCLK */
648		else
649			val &= ~VT1724_MT_I2S_MCLK_128X; /* 256x MCLK */
650		if (val != old) {
651			outb(val, ICEMT1724(ice, I2S_FORMAT));
652			/* master clock changed */
653			return 1;
654		}
655	}
656	/* no change in master clock */
657	return 0;
658}
659
660static int snd_vt1724_set_pro_rate(struct snd_ice1712 *ice, unsigned int rate,
661				    int force)
662{
663	unsigned long flags;
664	unsigned char mclk_change;
665	unsigned int i, old_rate;
666
667	if (rate > ice->hw_rates->list[ice->hw_rates->count - 1])
668		return -EINVAL;
669
670	spin_lock_irqsave(&ice->reg_lock, flags);
671	if ((inb(ICEMT1724(ice, DMA_CONTROL)) & DMA_STARTS) ||
672	    (inb(ICEMT1724(ice, DMA_PAUSE)) & DMA_PAUSES)) {
673		/* running? we cannot change the rate now... */
674		spin_unlock_irqrestore(&ice->reg_lock, flags);
675		return ((rate == ice->cur_rate) && !force) ? 0 : -EBUSY;
676	}
677	if (!force && is_pro_rate_locked(ice)) {
678		/* comparing required and current rate - makes sense for
679		 * internal clock only */
680		spin_unlock_irqrestore(&ice->reg_lock, flags);
681		return (rate == ice->cur_rate) ? 0 : -EBUSY;
682	}
683
684	if (force || !ice->is_spdif_master(ice)) {
685		/* force means the rate was switched by ucontrol, otherwise
686		 * setting clock rate for internal clock mode */
687		old_rate = ice->get_rate(ice);
688		if (force || (old_rate != rate))
689			ice->set_rate(ice, rate);
690		else if (rate == ice->cur_rate) {
691			spin_unlock_irqrestore(&ice->reg_lock, flags);
692			return 0;
693		}
694	}
695
696	ice->cur_rate = rate;
697
698	/* setting master clock */
699	mclk_change = ice->set_mclk(ice, rate);
700
701	spin_unlock_irqrestore(&ice->reg_lock, flags);
702
703	if (mclk_change && ice->gpio.i2s_mclk_changed)
704		ice->gpio.i2s_mclk_changed(ice);
705	if (ice->gpio.set_pro_rate)
706		ice->gpio.set_pro_rate(ice, rate);
707
708	/* set up codecs */
709	for (i = 0; i < ice->akm_codecs; i++) {
710		if (ice->akm[i].ops.set_rate_val)
711			ice->akm[i].ops.set_rate_val(&ice->akm[i], rate);
712	}
713	if (ice->spdif.ops.setup_rate)
714		ice->spdif.ops.setup_rate(ice, rate);
715
716	return 0;
717}
718
719static int snd_vt1724_pcm_hw_params(struct snd_pcm_substream *substream,
720				    struct snd_pcm_hw_params *hw_params)
721{
722	struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
723	int i, chs, err;
724
725	chs = params_channels(hw_params);
726	mutex_lock(&ice->open_mutex);
727	/* mark surround channels */
728	if (substream == ice->playback_pro_substream) {
729		/* PDMA0 can be multi-channel up to 8 */
730		chs = chs / 2 - 1;
731		for (i = 0; i < chs; i++) {
732			if (ice->pcm_reserved[i] &&
733			    ice->pcm_reserved[i] != substream) {
734				mutex_unlock(&ice->open_mutex);
735				return -EBUSY;
736			}
737			ice->pcm_reserved[i] = substream;
738		}
739		for (; i < 3; i++) {
740			if (ice->pcm_reserved[i] == substream)
741				ice->pcm_reserved[i] = NULL;
742		}
743	} else {
744		for (i = 0; i < 3; i++) {
745			/* check individual playback stream */
746			if (ice->playback_con_substream_ds[i] == substream) {
747				if (ice->pcm_reserved[i] &&
748				    ice->pcm_reserved[i] != substream) {
749					mutex_unlock(&ice->open_mutex);
750					return -EBUSY;
751				}
752				ice->pcm_reserved[i] = substream;
753				break;
754			}
755		}
756	}
757	mutex_unlock(&ice->open_mutex);
758
759	err = snd_vt1724_set_pro_rate(ice, params_rate(hw_params), 0);
760	if (err < 0)
761		return err;
762
763	return snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(hw_params));
764}
765
766static int snd_vt1724_pcm_hw_free(struct snd_pcm_substream *substream)
767{
768	struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
769	int i;
770
771	mutex_lock(&ice->open_mutex);
772	/* unmark surround channels */
773	for (i = 0; i < 3; i++)
774		if (ice->pcm_reserved[i] == substream)
775			ice->pcm_reserved[i] = NULL;
776	mutex_unlock(&ice->open_mutex);
777	return snd_pcm_lib_free_pages(substream);
778}
779
780static int snd_vt1724_playback_pro_prepare(struct snd_pcm_substream *substream)
781{
782	struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
783	unsigned char val;
784	unsigned int size;
785
786	spin_lock_irq(&ice->reg_lock);
787	val = (8 - substream->runtime->channels) >> 1;
788	outb(val, ICEMT1724(ice, BURST));
789
790	outl(substream->runtime->dma_addr, ICEMT1724(ice, PLAYBACK_ADDR));
791
792	size = (snd_pcm_lib_buffer_bytes(substream) >> 2) - 1;
793	/* outl(size, ICEMT1724(ice, PLAYBACK_SIZE)); */
794	outw(size, ICEMT1724(ice, PLAYBACK_SIZE));
795	outb(size >> 16, ICEMT1724(ice, PLAYBACK_SIZE) + 2);
796	size = (snd_pcm_lib_period_bytes(substream) >> 2) - 1;
797	/* outl(size, ICEMT1724(ice, PLAYBACK_COUNT)); */
798	outw(size, ICEMT1724(ice, PLAYBACK_COUNT));
799	outb(size >> 16, ICEMT1724(ice, PLAYBACK_COUNT) + 2);
800
801	spin_unlock_irq(&ice->reg_lock);
802
803	/*
804	dev_dbg(ice->card->dev, "pro prepare: ch = %d, addr = 0x%x, "
805	       "buffer = 0x%x, period = 0x%x\n",
806	       substream->runtime->channels,
807	       (unsigned int)substream->runtime->dma_addr,
808	       snd_pcm_lib_buffer_bytes(substream),
809	       snd_pcm_lib_period_bytes(substream));
810	*/
811	return 0;
812}
813
814static snd_pcm_uframes_t snd_vt1724_playback_pro_pointer(struct snd_pcm_substream *substream)
815{
816	struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
817	size_t ptr;
818
819	if (!(inl(ICEMT1724(ice, DMA_CONTROL)) & VT1724_PDMA0_START))
820		return 0;
821#if 0 /* read PLAYBACK_ADDR */
822	ptr = inl(ICEMT1724(ice, PLAYBACK_ADDR));
823	if (ptr < substream->runtime->dma_addr) {
824		dev_dbg(ice->card->dev, "invalid negative ptr\n");
825		return 0;
826	}
827	ptr -= substream->runtime->dma_addr;
828	ptr = bytes_to_frames(substream->runtime, ptr);
829	if (ptr >= substream->runtime->buffer_size) {
830		dev_dbg(ice->card->dev, "invalid ptr %d (size=%d)\n",
831			   (int)ptr, (int)substream->runtime->period_size);
832		return 0;
833	}
834#else /* read PLAYBACK_SIZE */
835	ptr = inl(ICEMT1724(ice, PLAYBACK_SIZE)) & 0xffffff;
836	ptr = (ptr + 1) << 2;
837	ptr = bytes_to_frames(substream->runtime, ptr);
838	if (!ptr)
839		;
840	else if (ptr <= substream->runtime->buffer_size)
841		ptr = substream->runtime->buffer_size - ptr;
842	else {
843		dev_dbg(ice->card->dev, "invalid ptr %d (size=%d)\n",
844			   (int)ptr, (int)substream->runtime->buffer_size);
845		ptr = 0;
846	}
847#endif
848	return ptr;
849}
850
851static int snd_vt1724_pcm_prepare(struct snd_pcm_substream *substream)
852{
853	struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
854	const struct vt1724_pcm_reg *reg = substream->runtime->private_data;
855
856	spin_lock_irq(&ice->reg_lock);
857	outl(substream->runtime->dma_addr, ice->profi_port + reg->addr);
858	outw((snd_pcm_lib_buffer_bytes(substream) >> 2) - 1,
859	     ice->profi_port + reg->size);
860	outw((snd_pcm_lib_period_bytes(substream) >> 2) - 1,
861	     ice->profi_port + reg->count);
862	spin_unlock_irq(&ice->reg_lock);
863	return 0;
864}
865
866static snd_pcm_uframes_t snd_vt1724_pcm_pointer(struct snd_pcm_substream *substream)
867{
868	struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
869	const struct vt1724_pcm_reg *reg = substream->runtime->private_data;
870	size_t ptr;
871
872	if (!(inl(ICEMT1724(ice, DMA_CONTROL)) & reg->start))
873		return 0;
874#if 0 /* use ADDR register */
875	ptr = inl(ice->profi_port + reg->addr);
876	ptr -= substream->runtime->dma_addr;
877	return bytes_to_frames(substream->runtime, ptr);
878#else /* use SIZE register */
879	ptr = inw(ice->profi_port + reg->size);
880	ptr = (ptr + 1) << 2;
881	ptr = bytes_to_frames(substream->runtime, ptr);
882	if (!ptr)
883		;
884	else if (ptr <= substream->runtime->buffer_size)
885		ptr = substream->runtime->buffer_size - ptr;
886	else {
887		dev_dbg(ice->card->dev, "invalid ptr %d (size=%d)\n",
888			   (int)ptr, (int)substream->runtime->buffer_size);
889		ptr = 0;
890	}
891	return ptr;
892#endif
893}
894
895static const struct vt1724_pcm_reg vt1724_pdma0_reg = {
896	.addr = VT1724_MT_PLAYBACK_ADDR,
897	.size = VT1724_MT_PLAYBACK_SIZE,
898	.count = VT1724_MT_PLAYBACK_COUNT,
899	.start = VT1724_PDMA0_START,
900};
901
902static const struct vt1724_pcm_reg vt1724_pdma4_reg = {
903	.addr = VT1724_MT_PDMA4_ADDR,
904	.size = VT1724_MT_PDMA4_SIZE,
905	.count = VT1724_MT_PDMA4_COUNT,
906	.start = VT1724_PDMA4_START,
907};
908
909static const struct vt1724_pcm_reg vt1724_rdma0_reg = {
910	.addr = VT1724_MT_CAPTURE_ADDR,
911	.size = VT1724_MT_CAPTURE_SIZE,
912	.count = VT1724_MT_CAPTURE_COUNT,
913	.start = VT1724_RDMA0_START,
914};
915
916static const struct vt1724_pcm_reg vt1724_rdma1_reg = {
917	.addr = VT1724_MT_RDMA1_ADDR,
918	.size = VT1724_MT_RDMA1_SIZE,
919	.count = VT1724_MT_RDMA1_COUNT,
920	.start = VT1724_RDMA1_START,
921};
922
923#define vt1724_playback_pro_reg vt1724_pdma0_reg
924#define vt1724_playback_spdif_reg vt1724_pdma4_reg
925#define vt1724_capture_pro_reg vt1724_rdma0_reg
926#define vt1724_capture_spdif_reg vt1724_rdma1_reg
927
928static const struct snd_pcm_hardware snd_vt1724_playback_pro = {
929	.info =			(SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
930				 SNDRV_PCM_INFO_BLOCK_TRANSFER |
931				 SNDRV_PCM_INFO_MMAP_VALID |
932				 SNDRV_PCM_INFO_PAUSE | SNDRV_PCM_INFO_SYNC_START),
933	.formats =		SNDRV_PCM_FMTBIT_S32_LE,
934	.rates =		SNDRV_PCM_RATE_KNOT | SNDRV_PCM_RATE_8000_192000,
935	.rate_min =		8000,
936	.rate_max =		192000,
937	.channels_min =		2,
938	.channels_max =		8,
939	.buffer_bytes_max =	(1UL << 21),	/* 19bits dword */
940	.period_bytes_min =	8 * 4 * 2,	/* FIXME: constraints needed */
941	.period_bytes_max =	(1UL << 21),
942	.periods_min =		2,
943	.periods_max =		1024,
944};
945
946static const struct snd_pcm_hardware snd_vt1724_spdif = {
947	.info =			(SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
948				 SNDRV_PCM_INFO_BLOCK_TRANSFER |
949				 SNDRV_PCM_INFO_MMAP_VALID |
950				 SNDRV_PCM_INFO_PAUSE | SNDRV_PCM_INFO_SYNC_START),
951	.formats =		SNDRV_PCM_FMTBIT_S32_LE,
952	.rates =	        (SNDRV_PCM_RATE_32000|SNDRV_PCM_RATE_44100|
953				 SNDRV_PCM_RATE_48000|SNDRV_PCM_RATE_88200|
954				 SNDRV_PCM_RATE_96000|SNDRV_PCM_RATE_176400|
955				 SNDRV_PCM_RATE_192000),
956	.rate_min =		32000,
957	.rate_max =		192000,
958	.channels_min =		2,
959	.channels_max =		2,
960	.buffer_bytes_max =	(1UL << 18),	/* 16bits dword */
961	.period_bytes_min =	2 * 4 * 2,
962	.period_bytes_max =	(1UL << 18),
963	.periods_min =		2,
964	.periods_max =		1024,
965};
966
967static const struct snd_pcm_hardware snd_vt1724_2ch_stereo = {
968	.info =			(SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
969				 SNDRV_PCM_INFO_BLOCK_TRANSFER |
970				 SNDRV_PCM_INFO_MMAP_VALID |
971				 SNDRV_PCM_INFO_PAUSE | SNDRV_PCM_INFO_SYNC_START),
972	.formats =		SNDRV_PCM_FMTBIT_S32_LE,
973	.rates =		SNDRV_PCM_RATE_KNOT | SNDRV_PCM_RATE_8000_192000,
974	.rate_min =		8000,
975	.rate_max =		192000,
976	.channels_min =		2,
977	.channels_max =		2,
978	.buffer_bytes_max =	(1UL << 18),	/* 16bits dword */
979	.period_bytes_min =	2 * 4 * 2,
980	.period_bytes_max =	(1UL << 18),
981	.periods_min =		2,
982	.periods_max =		1024,
983};
984
985/*
986 * set rate constraints
987 */
988static void set_std_hw_rates(struct snd_ice1712 *ice)
989{
990	if (ice->eeprom.data[ICE_EEP2_ACLINK] & VT1724_CFG_PRO_I2S) {
991		/* I2S */
992		/* VT1720 doesn't support more than 96kHz */
993		if ((ice->eeprom.data[ICE_EEP2_I2S] & 0x08) && !ice->vt1720)
994			ice->hw_rates = &hw_constraints_rates_192;
995		else
996			ice->hw_rates = &hw_constraints_rates_96;
997	} else {
998		/* ACLINK */
999		ice->hw_rates = &hw_constraints_rates_48;
1000	}
1001}
1002
1003static int set_rate_constraints(struct snd_ice1712 *ice,
1004				struct snd_pcm_substream *substream)
1005{
1006	struct snd_pcm_runtime *runtime = substream->runtime;
1007
1008	runtime->hw.rate_min = ice->hw_rates->list[0];
1009	runtime->hw.rate_max = ice->hw_rates->list[ice->hw_rates->count - 1];
1010	runtime->hw.rates = SNDRV_PCM_RATE_KNOT;
1011	return snd_pcm_hw_constraint_list(runtime, 0,
1012					  SNDRV_PCM_HW_PARAM_RATE,
1013					  ice->hw_rates);
1014}
1015
1016/* if the card has the internal rate locked (is_pro_locked), limit runtime
1017   hw rates to the current internal rate only.
1018*/
1019static void constrain_rate_if_locked(struct snd_pcm_substream *substream)
1020{
1021	struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1022	struct snd_pcm_runtime *runtime = substream->runtime;
1023	unsigned int rate;
1024	if (is_pro_rate_locked(ice)) {
1025		rate = ice->get_rate(ice);
1026		if (rate >= runtime->hw.rate_min
1027		    && rate <= runtime->hw.rate_max) {
1028			runtime->hw.rate_min = rate;
1029			runtime->hw.rate_max = rate;
1030		}
1031	}
1032}
1033
1034
1035/* multi-channel playback needs alignment 8x32bit regardless of the channels
1036 * actually used
1037 */
1038#define VT1724_BUFFER_ALIGN	0x20
1039
1040static int snd_vt1724_playback_pro_open(struct snd_pcm_substream *substream)
1041{
1042	struct snd_pcm_runtime *runtime = substream->runtime;
1043	struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1044	int chs, num_indeps;
1045
1046	runtime->private_data = (void *)&vt1724_playback_pro_reg;
1047	ice->playback_pro_substream = substream;
1048	runtime->hw = snd_vt1724_playback_pro;
1049	snd_pcm_set_sync(substream);
1050	snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24);
1051	set_rate_constraints(ice, substream);
1052	mutex_lock(&ice->open_mutex);
1053	/* calculate the currently available channels */
1054	num_indeps = ice->num_total_dacs / 2 - 1;
1055	for (chs = 0; chs < num_indeps; chs++) {
1056		if (ice->pcm_reserved[chs])
1057			break;
1058	}
1059	chs = (chs + 1) * 2;
1060	runtime->hw.channels_max = chs;
1061	if (chs > 2) /* channels must be even */
1062		snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_CHANNELS, 2);
1063	mutex_unlock(&ice->open_mutex);
1064	snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_PERIOD_BYTES,
1065				   VT1724_BUFFER_ALIGN);
1066	snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_BUFFER_BYTES,
1067				   VT1724_BUFFER_ALIGN);
1068	constrain_rate_if_locked(substream);
1069	if (ice->pro_open)
1070		ice->pro_open(ice, substream);
1071	return 0;
1072}
1073
1074static int snd_vt1724_capture_pro_open(struct snd_pcm_substream *substream)
1075{
1076	struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1077	struct snd_pcm_runtime *runtime = substream->runtime;
1078
1079	runtime->private_data = (void *)&vt1724_capture_pro_reg;
1080	ice->capture_pro_substream = substream;
1081	runtime->hw = snd_vt1724_2ch_stereo;
1082	snd_pcm_set_sync(substream);
1083	snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24);
1084	set_rate_constraints(ice, substream);
1085	snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_PERIOD_BYTES,
1086				   VT1724_BUFFER_ALIGN);
1087	snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_BUFFER_BYTES,
1088				   VT1724_BUFFER_ALIGN);
1089	constrain_rate_if_locked(substream);
1090	if (ice->pro_open)
1091		ice->pro_open(ice, substream);
1092	return 0;
1093}
1094
1095static int snd_vt1724_playback_pro_close(struct snd_pcm_substream *substream)
1096{
1097	struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1098
1099	if (PRO_RATE_RESET)
1100		snd_vt1724_set_pro_rate(ice, ice->pro_rate_default, 0);
1101	ice->playback_pro_substream = NULL;
1102
1103	return 0;
1104}
1105
1106static int snd_vt1724_capture_pro_close(struct snd_pcm_substream *substream)
1107{
1108	struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1109
1110	if (PRO_RATE_RESET)
1111		snd_vt1724_set_pro_rate(ice, ice->pro_rate_default, 0);
1112	ice->capture_pro_substream = NULL;
1113	return 0;
1114}
1115
1116static struct snd_pcm_ops snd_vt1724_playback_pro_ops = {
1117	.open =		snd_vt1724_playback_pro_open,
1118	.close =	snd_vt1724_playback_pro_close,
1119	.ioctl =	snd_pcm_lib_ioctl,
1120	.hw_params =	snd_vt1724_pcm_hw_params,
1121	.hw_free =	snd_vt1724_pcm_hw_free,
1122	.prepare =	snd_vt1724_playback_pro_prepare,
1123	.trigger =	snd_vt1724_pcm_trigger,
1124	.pointer =	snd_vt1724_playback_pro_pointer,
1125};
1126
1127static struct snd_pcm_ops snd_vt1724_capture_pro_ops = {
1128	.open =		snd_vt1724_capture_pro_open,
1129	.close =	snd_vt1724_capture_pro_close,
1130	.ioctl =	snd_pcm_lib_ioctl,
1131	.hw_params =	snd_vt1724_pcm_hw_params,
1132	.hw_free =	snd_vt1724_pcm_hw_free,
1133	.prepare =	snd_vt1724_pcm_prepare,
1134	.trigger =	snd_vt1724_pcm_trigger,
1135	.pointer =	snd_vt1724_pcm_pointer,
1136};
1137
1138static int snd_vt1724_pcm_profi(struct snd_ice1712 *ice, int device)
1139{
1140	struct snd_pcm *pcm;
1141	int capt, err;
1142
1143	if ((ice->eeprom.data[ICE_EEP2_SYSCONF] & VT1724_CFG_ADC_MASK) ==
1144	    VT1724_CFG_ADC_NONE)
1145		capt = 0;
1146	else
1147		capt = 1;
1148	err = snd_pcm_new(ice->card, "ICE1724", device, 1, capt, &pcm);
1149	if (err < 0)
1150		return err;
1151
1152	snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_vt1724_playback_pro_ops);
1153	if (capt)
1154		snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE,
1155			&snd_vt1724_capture_pro_ops);
1156
1157	pcm->private_data = ice;
1158	pcm->info_flags = 0;
1159	strcpy(pcm->name, "ICE1724");
1160
1161	snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
1162					      snd_dma_pci_data(ice->pci),
1163					      256*1024, 256*1024);
1164
1165	ice->pcm_pro = pcm;
1166
1167	return 0;
1168}
1169
1170
1171/*
1172 * SPDIF PCM
1173 */
1174
1175/* update spdif control bits; call with reg_lock */
1176static void update_spdif_bits(struct snd_ice1712 *ice, unsigned int val)
1177{
1178	unsigned char cbit, disabled;
1179
1180	cbit = inb(ICEREG1724(ice, SPDIF_CFG));
1181	disabled = cbit & ~VT1724_CFG_SPDIF_OUT_EN;
1182	if (cbit != disabled)
1183		outb(disabled, ICEREG1724(ice, SPDIF_CFG));
1184	outw(val, ICEMT1724(ice, SPDIF_CTRL));
1185	if (cbit != disabled)
1186		outb(cbit, ICEREG1724(ice, SPDIF_CFG));
1187	outw(val, ICEMT1724(ice, SPDIF_CTRL));
1188}
1189
1190/* update SPDIF control bits according to the given rate */
1191static void update_spdif_rate(struct snd_ice1712 *ice, unsigned int rate)
1192{
1193	unsigned int val, nval;
1194	unsigned long flags;
1195
1196	spin_lock_irqsave(&ice->reg_lock, flags);
1197	nval = val = inw(ICEMT1724(ice, SPDIF_CTRL));
1198	nval &= ~(7 << 12);
1199	switch (rate) {
1200	case 44100: break;
1201	case 48000: nval |= 2 << 12; break;
1202	case 32000: nval |= 3 << 12; break;
1203	case 88200: nval |= 4 << 12; break;
1204	case 96000: nval |= 5 << 12; break;
1205	case 192000: nval |= 6 << 12; break;
1206	case 176400: nval |= 7 << 12; break;
1207	}
1208	if (val != nval)
1209		update_spdif_bits(ice, nval);
1210	spin_unlock_irqrestore(&ice->reg_lock, flags);
1211}
1212
1213static int snd_vt1724_playback_spdif_prepare(struct snd_pcm_substream *substream)
1214{
1215	struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1216	if (!ice->force_pdma4)
1217		update_spdif_rate(ice, substream->runtime->rate);
1218	return snd_vt1724_pcm_prepare(substream);
1219}
1220
1221static int snd_vt1724_playback_spdif_open(struct snd_pcm_substream *substream)
1222{
1223	struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1224	struct snd_pcm_runtime *runtime = substream->runtime;
1225
1226	runtime->private_data = (void *)&vt1724_playback_spdif_reg;
1227	ice->playback_con_substream = substream;
1228	if (ice->force_pdma4) {
1229		runtime->hw = snd_vt1724_2ch_stereo;
1230		set_rate_constraints(ice, substream);
1231	} else
1232		runtime->hw = snd_vt1724_spdif;
1233	snd_pcm_set_sync(substream);
1234	snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24);
1235	snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_PERIOD_BYTES,
1236				   VT1724_BUFFER_ALIGN);
1237	snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_BUFFER_BYTES,
1238				   VT1724_BUFFER_ALIGN);
1239	constrain_rate_if_locked(substream);
1240	if (ice->spdif.ops.open)
1241		ice->spdif.ops.open(ice, substream);
1242	return 0;
1243}
1244
1245static int snd_vt1724_playback_spdif_close(struct snd_pcm_substream *substream)
1246{
1247	struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1248
1249	if (PRO_RATE_RESET)
1250		snd_vt1724_set_pro_rate(ice, ice->pro_rate_default, 0);
1251	ice->playback_con_substream = NULL;
1252	if (ice->spdif.ops.close)
1253		ice->spdif.ops.close(ice, substream);
1254
1255	return 0;
1256}
1257
1258static int snd_vt1724_capture_spdif_open(struct snd_pcm_substream *substream)
1259{
1260	struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1261	struct snd_pcm_runtime *runtime = substream->runtime;
1262
1263	runtime->private_data = (void *)&vt1724_capture_spdif_reg;
1264	ice->capture_con_substream = substream;
1265	if (ice->force_rdma1) {
1266		runtime->hw = snd_vt1724_2ch_stereo;
1267		set_rate_constraints(ice, substream);
1268	} else
1269		runtime->hw = snd_vt1724_spdif;
1270	snd_pcm_set_sync(substream);
1271	snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24);
1272	snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_PERIOD_BYTES,
1273				   VT1724_BUFFER_ALIGN);
1274	snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_BUFFER_BYTES,
1275				   VT1724_BUFFER_ALIGN);
1276	constrain_rate_if_locked(substream);
1277	if (ice->spdif.ops.open)
1278		ice->spdif.ops.open(ice, substream);
1279	return 0;
1280}
1281
1282static int snd_vt1724_capture_spdif_close(struct snd_pcm_substream *substream)
1283{
1284	struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1285
1286	if (PRO_RATE_RESET)
1287		snd_vt1724_set_pro_rate(ice, ice->pro_rate_default, 0);
1288	ice->capture_con_substream = NULL;
1289	if (ice->spdif.ops.close)
1290		ice->spdif.ops.close(ice, substream);
1291
1292	return 0;
1293}
1294
1295static struct snd_pcm_ops snd_vt1724_playback_spdif_ops = {
1296	.open =		snd_vt1724_playback_spdif_open,
1297	.close =	snd_vt1724_playback_spdif_close,
1298	.ioctl =	snd_pcm_lib_ioctl,
1299	.hw_params =	snd_vt1724_pcm_hw_params,
1300	.hw_free =	snd_vt1724_pcm_hw_free,
1301	.prepare =	snd_vt1724_playback_spdif_prepare,
1302	.trigger =	snd_vt1724_pcm_trigger,
1303	.pointer =	snd_vt1724_pcm_pointer,
1304};
1305
1306static struct snd_pcm_ops snd_vt1724_capture_spdif_ops = {
1307	.open =		snd_vt1724_capture_spdif_open,
1308	.close =	snd_vt1724_capture_spdif_close,
1309	.ioctl =	snd_pcm_lib_ioctl,
1310	.hw_params =	snd_vt1724_pcm_hw_params,
1311	.hw_free =	snd_vt1724_pcm_hw_free,
1312	.prepare =	snd_vt1724_pcm_prepare,
1313	.trigger =	snd_vt1724_pcm_trigger,
1314	.pointer =	snd_vt1724_pcm_pointer,
1315};
1316
1317
1318static int snd_vt1724_pcm_spdif(struct snd_ice1712 *ice, int device)
1319{
1320	char *name;
1321	struct snd_pcm *pcm;
1322	int play, capt;
1323	int err;
1324
1325	if (ice->force_pdma4 ||
1326	    (ice->eeprom.data[ICE_EEP2_SPDIF] & VT1724_CFG_SPDIF_OUT_INT)) {
1327		play = 1;
1328		ice->has_spdif = 1;
1329	} else
1330		play = 0;
1331	if (ice->force_rdma1 ||
1332	    (ice->eeprom.data[ICE_EEP2_SPDIF] & VT1724_CFG_SPDIF_IN)) {
1333		capt = 1;
1334		ice->has_spdif = 1;
1335	} else
1336		capt = 0;
1337	if (!play && !capt)
1338		return 0; /* no spdif device */
1339
1340	if (ice->force_pdma4 || ice->force_rdma1)
1341		name = "ICE1724 Secondary";
1342	else
1343		name = "ICE1724 IEC958";
1344	err = snd_pcm_new(ice->card, name, device, play, capt, &pcm);
1345	if (err < 0)
1346		return err;
1347
1348	if (play)
1349		snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK,
1350				&snd_vt1724_playback_spdif_ops);
1351	if (capt)
1352		snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE,
1353				&snd_vt1724_capture_spdif_ops);
1354
1355	pcm->private_data = ice;
1356	pcm->info_flags = 0;
1357	strcpy(pcm->name, name);
1358
1359	snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
1360					      snd_dma_pci_data(ice->pci),
1361					      256*1024, 256*1024);
1362
1363	ice->pcm = pcm;
1364
1365	return 0;
1366}
1367
1368
1369/*
1370 * independent surround PCMs
1371 */
1372
1373static const struct vt1724_pcm_reg vt1724_playback_dma_regs[3] = {
1374	{
1375		.addr = VT1724_MT_PDMA1_ADDR,
1376		.size = VT1724_MT_PDMA1_SIZE,
1377		.count = VT1724_MT_PDMA1_COUNT,
1378		.start = VT1724_PDMA1_START,
1379	},
1380	{
1381		.addr = VT1724_MT_PDMA2_ADDR,
1382		.size = VT1724_MT_PDMA2_SIZE,
1383		.count = VT1724_MT_PDMA2_COUNT,
1384		.start = VT1724_PDMA2_START,
1385	},
1386	{
1387		.addr = VT1724_MT_PDMA3_ADDR,
1388		.size = VT1724_MT_PDMA3_SIZE,
1389		.count = VT1724_MT_PDMA3_COUNT,
1390		.start = VT1724_PDMA3_START,
1391	},
1392};
1393
1394static int snd_vt1724_playback_indep_prepare(struct snd_pcm_substream *substream)
1395{
1396	struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1397	unsigned char val;
1398
1399	spin_lock_irq(&ice->reg_lock);
1400	val = 3 - substream->number;
1401	if (inb(ICEMT1724(ice, BURST)) < val)
1402		outb(val, ICEMT1724(ice, BURST));
1403	spin_unlock_irq(&ice->reg_lock);
1404	return snd_vt1724_pcm_prepare(substream);
1405}
1406
1407static int snd_vt1724_playback_indep_open(struct snd_pcm_substream *substream)
1408{
1409	struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1410	struct snd_pcm_runtime *runtime = substream->runtime;
1411
1412	mutex_lock(&ice->open_mutex);
1413	/* already used by PDMA0? */
1414	if (ice->pcm_reserved[substream->number]) {
1415		mutex_unlock(&ice->open_mutex);
1416		return -EBUSY; /* FIXME: should handle blocking mode properly */
1417	}
1418	mutex_unlock(&ice->open_mutex);
1419	runtime->private_data = (void *)&vt1724_playback_dma_regs[substream->number];
1420	ice->playback_con_substream_ds[substream->number] = substream;
1421	runtime->hw = snd_vt1724_2ch_stereo;
1422	snd_pcm_set_sync(substream);
1423	snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24);
1424	set_rate_constraints(ice, substream);
1425	return 0;
1426}
1427
1428static int snd_vt1724_playback_indep_close(struct snd_pcm_substream *substream)
1429{
1430	struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1431
1432	if (PRO_RATE_RESET)
1433		snd_vt1724_set_pro_rate(ice, ice->pro_rate_default, 0);
1434	ice->playback_con_substream_ds[substream->number] = NULL;
1435	ice->pcm_reserved[substream->number] = NULL;
1436
1437	return 0;
1438}
1439
1440static struct snd_pcm_ops snd_vt1724_playback_indep_ops = {
1441	.open =		snd_vt1724_playback_indep_open,
1442	.close =	snd_vt1724_playback_indep_close,
1443	.ioctl =	snd_pcm_lib_ioctl,
1444	.hw_params =	snd_vt1724_pcm_hw_params,
1445	.hw_free =	snd_vt1724_pcm_hw_free,
1446	.prepare =	snd_vt1724_playback_indep_prepare,
1447	.trigger =	snd_vt1724_pcm_trigger,
1448	.pointer =	snd_vt1724_pcm_pointer,
1449};
1450
1451
1452static int snd_vt1724_pcm_indep(struct snd_ice1712 *ice, int device)
1453{
1454	struct snd_pcm *pcm;
1455	int play;
1456	int err;
1457
1458	play = ice->num_total_dacs / 2 - 1;
1459	if (play <= 0)
1460		return 0;
1461
1462	err = snd_pcm_new(ice->card, "ICE1724 Surrounds", device, play, 0, &pcm);
1463	if (err < 0)
1464		return err;
1465
1466	snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK,
1467			&snd_vt1724_playback_indep_ops);
1468
1469	pcm->private_data = ice;
1470	pcm->info_flags = 0;
1471	strcpy(pcm->name, "ICE1724 Surround PCM");
1472
1473	snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
1474					      snd_dma_pci_data(ice->pci),
1475					      256*1024, 256*1024);
1476
1477	ice->pcm_ds = pcm;
1478
1479	return 0;
1480}
1481
1482
1483/*
1484 *  Mixer section
1485 */
1486
1487static int snd_vt1724_ac97_mixer(struct snd_ice1712 *ice)
1488{
1489	int err;
1490
1491	if (!(ice->eeprom.data[ICE_EEP2_ACLINK] & VT1724_CFG_PRO_I2S)) {
1492		struct snd_ac97_bus *pbus;
1493		struct snd_ac97_template ac97;
1494		static struct snd_ac97_bus_ops ops = {
1495			.write = snd_vt1724_ac97_write,
1496			.read = snd_vt1724_ac97_read,
1497		};
1498
1499		/* cold reset */
1500		outb(inb(ICEMT1724(ice, AC97_CMD)) | 0x80, ICEMT1724(ice, AC97_CMD));
1501		mdelay(5); /* FIXME */
1502		outb(inb(ICEMT1724(ice, AC97_CMD)) & ~0x80, ICEMT1724(ice, AC97_CMD));
1503
1504		err = snd_ac97_bus(ice->card, 0, &ops, NULL, &pbus);
1505		if (err < 0)
1506			return err;
1507		memset(&ac97, 0, sizeof(ac97));
1508		ac97.private_data = ice;
1509		err = snd_ac97_mixer(pbus, &ac97, &ice->ac97);
1510		if (err < 0)
1511			dev_warn(ice->card->dev,
1512				 "cannot initialize pro ac97, skipped\n");
1513		else
1514			return 0;
1515	}
1516	/* I2S mixer only */
1517	strcat(ice->card->mixername, "ICE1724 - multitrack");
1518	return 0;
1519}
1520
1521/*
1522 *
1523 */
1524
1525static inline unsigned int eeprom_triple(struct snd_ice1712 *ice, int idx)
1526{
1527	return (unsigned int)ice->eeprom.data[idx] | \
1528		((unsigned int)ice->eeprom.data[idx + 1] << 8) | \
1529		((unsigned int)ice->eeprom.data[idx + 2] << 16);
1530}
1531
1532static void snd_vt1724_proc_read(struct snd_info_entry *entry,
1533				 struct snd_info_buffer *buffer)
1534{
1535	struct snd_ice1712 *ice = entry->private_data;
1536	unsigned int idx;
1537
1538	snd_iprintf(buffer, "%s\n\n", ice->card->longname);
1539	snd_iprintf(buffer, "EEPROM:\n");
1540
1541	snd_iprintf(buffer, "  Subvendor        : 0x%x\n", ice->eeprom.subvendor);
1542	snd_iprintf(buffer, "  Size             : %i bytes\n", ice->eeprom.size);
1543	snd_iprintf(buffer, "  Version          : %i\n", ice->eeprom.version);
1544	snd_iprintf(buffer, "  System Config    : 0x%x\n",
1545		    ice->eeprom.data[ICE_EEP2_SYSCONF]);
1546	snd_iprintf(buffer, "  ACLink           : 0x%x\n",
1547		    ice->eeprom.data[ICE_EEP2_ACLINK]);
1548	snd_iprintf(buffer, "  I2S              : 0x%x\n",
1549		    ice->eeprom.data[ICE_EEP2_I2S]);
1550	snd_iprintf(buffer, "  S/PDIF           : 0x%x\n",
1551		    ice->eeprom.data[ICE_EEP2_SPDIF]);
1552	snd_iprintf(buffer, "  GPIO direction   : 0x%x\n",
1553		    ice->eeprom.gpiodir);
1554	snd_iprintf(buffer, "  GPIO mask        : 0x%x\n",
1555		    ice->eeprom.gpiomask);
1556	snd_iprintf(buffer, "  GPIO state       : 0x%x\n",
1557		    ice->eeprom.gpiostate);
1558	for (idx = 0x12; idx < ice->eeprom.size; idx++)
1559		snd_iprintf(buffer, "  Extra #%02i        : 0x%x\n",
1560			    idx, ice->eeprom.data[idx]);
1561
1562	snd_iprintf(buffer, "\nRegisters:\n");
1563
1564	snd_iprintf(buffer, "  PSDOUT03 : 0x%08x\n",
1565		    (unsigned)inl(ICEMT1724(ice, ROUTE_PLAYBACK)));
1566	for (idx = 0x0; idx < 0x20 ; idx++)
1567		snd_iprintf(buffer, "  CCS%02x    : 0x%02x\n",
1568			    idx, inb(ice->port+idx));
1569	for (idx = 0x0; idx < 0x30 ; idx++)
1570		snd_iprintf(buffer, "  MT%02x     : 0x%02x\n",
1571			    idx, inb(ice->profi_port+idx));
1572}
1573
1574static void snd_vt1724_proc_init(struct snd_ice1712 *ice)
1575{
1576	struct snd_info_entry *entry;
1577
1578	if (!snd_card_proc_new(ice->card, "ice1724", &entry))
1579		snd_info_set_text_ops(entry, ice, snd_vt1724_proc_read);
1580}
1581
1582/*
1583 *
1584 */
1585
1586static int snd_vt1724_eeprom_info(struct snd_kcontrol *kcontrol,
1587				  struct snd_ctl_elem_info *uinfo)
1588{
1589	uinfo->type = SNDRV_CTL_ELEM_TYPE_BYTES;
1590	uinfo->count = sizeof(struct snd_ice1712_eeprom);
1591	return 0;
1592}
1593
1594static int snd_vt1724_eeprom_get(struct snd_kcontrol *kcontrol,
1595				 struct snd_ctl_elem_value *ucontrol)
1596{
1597	struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1598
1599	memcpy(ucontrol->value.bytes.data, &ice->eeprom, sizeof(ice->eeprom));
1600	return 0;
1601}
1602
1603static struct snd_kcontrol_new snd_vt1724_eeprom = {
1604	.iface = SNDRV_CTL_ELEM_IFACE_CARD,
1605	.name = "ICE1724 EEPROM",
1606	.access = SNDRV_CTL_ELEM_ACCESS_READ,
1607	.info = snd_vt1724_eeprom_info,
1608	.get = snd_vt1724_eeprom_get
1609};
1610
1611/*
1612 */
1613static int snd_vt1724_spdif_info(struct snd_kcontrol *kcontrol,
1614				 struct snd_ctl_elem_info *uinfo)
1615{
1616	uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
1617	uinfo->count = 1;
1618	return 0;
1619}
1620
1621static unsigned int encode_spdif_bits(struct snd_aes_iec958 *diga)
1622{
1623	unsigned int val, rbits;
1624
1625	val = diga->status[0] & 0x03; /* professional, non-audio */
1626	if (val & 0x01) {
1627		/* professional */
1628		if ((diga->status[0] & IEC958_AES0_PRO_EMPHASIS) ==
1629		    IEC958_AES0_PRO_EMPHASIS_5015)
1630			val |= 1U << 3;
1631		rbits = (diga->status[4] >> 3) & 0x0f;
1632		if (rbits) {
1633			switch (rbits) {
1634			case 2: val |= 5 << 12; break; /* 96k */
1635			case 3: val |= 6 << 12; break; /* 192k */
1636			case 10: val |= 4 << 12; break; /* 88.2k */
1637			case 11: val |= 7 << 12; break; /* 176.4k */
1638			}
1639		} else {
1640			switch (diga->status[0] & IEC958_AES0_PRO_FS) {
1641			case IEC958_AES0_PRO_FS_44100:
1642				break;
1643			case IEC958_AES0_PRO_FS_32000:
1644				val |= 3U << 12;
1645				break;
1646			default:
1647				val |= 2U << 12;
1648				break;
1649			}
1650		}
1651	} else {
1652		/* consumer */
1653		val |= diga->status[1] & 0x04; /* copyright */
1654		if ((diga->status[0] & IEC958_AES0_CON_EMPHASIS) ==
1655		    IEC958_AES0_CON_EMPHASIS_5015)
1656			val |= 1U << 3;
1657		val |= (unsigned int)(diga->status[1] & 0x3f) << 4; /* category */
1658		val |= (unsigned int)(diga->status[3] & IEC958_AES3_CON_FS) << 12; /* fs */
1659	}
1660	return val;
1661}
1662
1663static void decode_spdif_bits(struct snd_aes_iec958 *diga, unsigned int val)
1664{
1665	memset(diga->status, 0, sizeof(diga->status));
1666	diga->status[0] = val & 0x03; /* professional, non-audio */
1667	if (val & 0x01) {
1668		/* professional */
1669		if (val & (1U << 3))
1670			diga->status[0] |= IEC958_AES0_PRO_EMPHASIS_5015;
1671		switch ((val >> 12) & 0x7) {
1672		case 0:
1673			break;
1674		case 2:
1675			diga->status[0] |= IEC958_AES0_PRO_FS_32000;
1676			break;
1677		default:
1678			diga->status[0] |= IEC958_AES0_PRO_FS_48000;
1679			break;
1680		}
1681	} else {
1682		/* consumer */
1683		diga->status[0] |= val & (1U << 2); /* copyright */
1684		if (val & (1U << 3))
1685			diga->status[0] |= IEC958_AES0_CON_EMPHASIS_5015;
1686		diga->status[1] |= (val >> 4) & 0x3f; /* category */
1687		diga->status[3] |= (val >> 12) & 0x07; /* fs */
1688	}
1689}
1690
1691static int snd_vt1724_spdif_default_get(struct snd_kcontrol *kcontrol,
1692					struct snd_ctl_elem_value *ucontrol)
1693{
1694	struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1695	unsigned int val;
1696	val = inw(ICEMT1724(ice, SPDIF_CTRL));
1697	decode_spdif_bits(&ucontrol->value.iec958, val);
1698	return 0;
1699}
1700
1701static int snd_vt1724_spdif_default_put(struct snd_kcontrol *kcontrol,
1702					 struct snd_ctl_elem_value *ucontrol)
1703{
1704	struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1705	unsigned int val, old;
1706
1707	val = encode_spdif_bits(&ucontrol->value.iec958);
1708	spin_lock_irq(&ice->reg_lock);
1709	old = inw(ICEMT1724(ice, SPDIF_CTRL));
1710	if (val != old)
1711		update_spdif_bits(ice, val);
1712	spin_unlock_irq(&ice->reg_lock);
1713	return val != old;
1714}
1715
1716static struct snd_kcontrol_new snd_vt1724_spdif_default =
1717{
1718	.iface =	SNDRV_CTL_ELEM_IFACE_PCM,
1719	.name =         SNDRV_CTL_NAME_IEC958("", PLAYBACK, DEFAULT),
1720	.info =		snd_vt1724_spdif_info,
1721	.get =		snd_vt1724_spdif_default_get,
1722	.put =		snd_vt1724_spdif_default_put
1723};
1724
1725static int snd_vt1724_spdif_maskc_get(struct snd_kcontrol *kcontrol,
1726				       struct snd_ctl_elem_value *ucontrol)
1727{
1728	ucontrol->value.iec958.status[0] = IEC958_AES0_NONAUDIO |
1729						     IEC958_AES0_PROFESSIONAL |
1730						     IEC958_AES0_CON_NOT_COPYRIGHT |
1731						     IEC958_AES0_CON_EMPHASIS;
1732	ucontrol->value.iec958.status[1] = IEC958_AES1_CON_ORIGINAL |
1733						     IEC958_AES1_CON_CATEGORY;
1734	ucontrol->value.iec958.status[3] = IEC958_AES3_CON_FS;
1735	return 0;
1736}
1737
1738static int snd_vt1724_spdif_maskp_get(struct snd_kcontrol *kcontrol,
1739				       struct snd_ctl_elem_value *ucontrol)
1740{
1741	ucontrol->value.iec958.status[0] = IEC958_AES0_NONAUDIO |
1742						     IEC958_AES0_PROFESSIONAL |
1743						     IEC958_AES0_PRO_FS |
1744						     IEC958_AES0_PRO_EMPHASIS;
1745	return 0;
1746}
1747
1748static struct snd_kcontrol_new snd_vt1724_spdif_maskc =
1749{
1750	.access =	SNDRV_CTL_ELEM_ACCESS_READ,
1751	.iface =	SNDRV_CTL_ELEM_IFACE_PCM,
1752	.name =         SNDRV_CTL_NAME_IEC958("", PLAYBACK, CON_MASK),
1753	.info =		snd_vt1724_spdif_info,
1754	.get =		snd_vt1724_spdif_maskc_get,
1755};
1756
1757static struct snd_kcontrol_new snd_vt1724_spdif_maskp =
1758{
1759	.access =	SNDRV_CTL_ELEM_ACCESS_READ,
1760	.iface =	SNDRV_CTL_ELEM_IFACE_PCM,
1761	.name =         SNDRV_CTL_NAME_IEC958("", PLAYBACK, PRO_MASK),
1762	.info =		snd_vt1724_spdif_info,
1763	.get =		snd_vt1724_spdif_maskp_get,
1764};
1765
1766#define snd_vt1724_spdif_sw_info		snd_ctl_boolean_mono_info
1767
1768static int snd_vt1724_spdif_sw_get(struct snd_kcontrol *kcontrol,
1769				   struct snd_ctl_elem_value *ucontrol)
1770{
1771	struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1772	ucontrol->value.integer.value[0] = inb(ICEREG1724(ice, SPDIF_CFG)) &
1773		VT1724_CFG_SPDIF_OUT_EN ? 1 : 0;
1774	return 0;
1775}
1776
1777static int snd_vt1724_spdif_sw_put(struct snd_kcontrol *kcontrol,
1778				   struct snd_ctl_elem_value *ucontrol)
1779{
1780	struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1781	unsigned char old, val;
1782
1783	spin_lock_irq(&ice->reg_lock);
1784	old = val = inb(ICEREG1724(ice, SPDIF_CFG));
1785	val &= ~VT1724_CFG_SPDIF_OUT_EN;
1786	if (ucontrol->value.integer.value[0])
1787		val |= VT1724_CFG_SPDIF_OUT_EN;
1788	if (old != val)
1789		outb(val, ICEREG1724(ice, SPDIF_CFG));
1790	spin_unlock_irq(&ice->reg_lock);
1791	return old != val;
1792}
1793
1794static struct snd_kcontrol_new snd_vt1724_spdif_switch =
1795{
1796	.iface =	SNDRV_CTL_ELEM_IFACE_MIXER,
1797	/* FIXME: the following conflict with IEC958 Playback Route */
1798	/* .name =         SNDRV_CTL_NAME_IEC958("", PLAYBACK, SWITCH), */
1799	.name =         SNDRV_CTL_NAME_IEC958("Output ", NONE, SWITCH),
1800	.info =		snd_vt1724_spdif_sw_info,
1801	.get =		snd_vt1724_spdif_sw_get,
1802	.put =		snd_vt1724_spdif_sw_put
1803};
1804
1805
1806#if 0 /* NOT USED YET */
1807/*
1808 * GPIO access from extern
1809 */
1810
1811#define snd_vt1724_gpio_info		snd_ctl_boolean_mono_info
1812
1813int snd_vt1724_gpio_get(struct snd_kcontrol *kcontrol,
1814			struct snd_ctl_elem_value *ucontrol)
1815{
1816	struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1817	int shift = kcontrol->private_value & 0xff;
1818	int invert = (kcontrol->private_value & (1<<24)) ? 1 : 0;
1819
1820	snd_ice1712_save_gpio_status(ice);
1821	ucontrol->value.integer.value[0] =
1822		(snd_ice1712_gpio_read(ice) & (1 << shift) ? 1 : 0) ^ invert;
1823	snd_ice1712_restore_gpio_status(ice);
1824	return 0;
1825}
1826
1827int snd_ice1712_gpio_put(struct snd_kcontrol *kcontrol,
1828			 struct snd_ctl_elem_value *ucontrol)
1829{
1830	struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1831	int shift = kcontrol->private_value & 0xff;
1832	int invert = (kcontrol->private_value & (1<<24)) ? mask : 0;
1833	unsigned int val, nval;
1834
1835	if (kcontrol->private_value & (1 << 31))
1836		return -EPERM;
1837	nval = (ucontrol->value.integer.value[0] ? (1 << shift) : 0) ^ invert;
1838	snd_ice1712_save_gpio_status(ice);
1839	val = snd_ice1712_gpio_read(ice);
1840	nval |= val & ~(1 << shift);
1841	if (val != nval)
1842		snd_ice1712_gpio_write(ice, nval);
1843	snd_ice1712_restore_gpio_status(ice);
1844	return val != nval;
1845}
1846#endif /* NOT USED YET */
1847
1848/*
1849 *  rate
1850 */
1851static int snd_vt1724_pro_internal_clock_info(struct snd_kcontrol *kcontrol,
1852					      struct snd_ctl_elem_info *uinfo)
1853{
1854	struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1855	int hw_rates_count = ice->hw_rates->count;
1856	uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
1857	uinfo->count = 1;
1858
1859	/* internal clocks */
1860	uinfo->value.enumerated.items = hw_rates_count;
1861	/* external clocks */
1862	if (ice->force_rdma1 ||
1863	    (ice->eeprom.data[ICE_EEP2_SPDIF] & VT1724_CFG_SPDIF_IN))
1864		uinfo->value.enumerated.items += ice->ext_clock_count;
1865	/* upper limit - keep at top */
1866	if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items)
1867		uinfo->value.enumerated.item = uinfo->value.enumerated.items - 1;
1868	if (uinfo->value.enumerated.item >= hw_rates_count)
1869		/* ext_clock items */
1870		strcpy(uinfo->value.enumerated.name,
1871				ice->ext_clock_names[
1872				uinfo->value.enumerated.item - hw_rates_count]);
1873	else
1874		/* int clock items */
1875		sprintf(uinfo->value.enumerated.name, "%d",
1876			ice->hw_rates->list[uinfo->value.enumerated.item]);
1877	return 0;
1878}
1879
1880static int snd_vt1724_pro_internal_clock_get(struct snd_kcontrol *kcontrol,
1881					     struct snd_ctl_elem_value *ucontrol)
1882{
1883	struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1884	unsigned int i, rate;
1885
1886	spin_lock_irq(&ice->reg_lock);
1887	if (ice->is_spdif_master(ice)) {
1888		ucontrol->value.enumerated.item[0] = ice->hw_rates->count +
1889			ice->get_spdif_master_type(ice);
1890	} else {
1891		rate = ice->get_rate(ice);
1892		ucontrol->value.enumerated.item[0] = 0;
1893		for (i = 0; i < ice->hw_rates->count; i++) {
1894			if (ice->hw_rates->list[i] == rate) {
1895				ucontrol->value.enumerated.item[0] = i;
1896				break;
1897			}
1898		}
1899	}
1900	spin_unlock_irq(&ice->reg_lock);
1901	return 0;
1902}
1903
1904static int stdclock_get_spdif_master_type(struct snd_ice1712 *ice)
1905{
1906	/* standard external clock - only single type - SPDIF IN */
1907	return 0;
1908}
1909
1910/* setting clock to external - SPDIF */
1911static int stdclock_set_spdif_clock(struct snd_ice1712 *ice, int type)
1912{
1913	unsigned char oval;
1914	unsigned char i2s_oval;
1915	oval = inb(ICEMT1724(ice, RATE));
1916	outb(oval | VT1724_SPDIF_MASTER, ICEMT1724(ice, RATE));
1917	/* setting 256fs */
1918	i2s_oval = inb(ICEMT1724(ice, I2S_FORMAT));
1919	outb(i2s_oval & ~VT1724_MT_I2S_MCLK_128X, ICEMT1724(ice, I2S_FORMAT));
1920	return 0;
1921}
1922
1923
1924static int snd_vt1724_pro_internal_clock_put(struct snd_kcontrol *kcontrol,
1925					     struct snd_ctl_elem_value *ucontrol)
1926{
1927	struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1928	unsigned int old_rate, new_rate;
1929	unsigned int item = ucontrol->value.enumerated.item[0];
1930	unsigned int first_ext_clock = ice->hw_rates->count;
1931
1932	if (item >  first_ext_clock + ice->ext_clock_count - 1)
1933		return -EINVAL;
1934
1935	/* if rate = 0 => external clock */
1936	spin_lock_irq(&ice->reg_lock);
1937	if (ice->is_spdif_master(ice))
1938		old_rate = 0;
1939	else
1940		old_rate = ice->get_rate(ice);
1941	if (item >= first_ext_clock) {
1942		/* switching to external clock */
1943		ice->set_spdif_clock(ice, item - first_ext_clock);
1944		new_rate = 0;
1945	} else {
1946		/* internal on-card clock */
1947		new_rate = ice->hw_rates->list[item];
1948		ice->pro_rate_default = new_rate;
1949		spin_unlock_irq(&ice->reg_lock);
1950		snd_vt1724_set_pro_rate(ice, ice->pro_rate_default, 1);
1951		spin_lock_irq(&ice->reg_lock);
1952	}
1953	spin_unlock_irq(&ice->reg_lock);
1954
1955	/* the first switch to the ext. clock mode? */
1956	if (old_rate != new_rate && !new_rate) {
1957		/* notify akm chips as well */
1958		unsigned int i;
1959		if (ice->gpio.set_pro_rate)
1960			ice->gpio.set_pro_rate(ice, 0);
1961		for (i = 0; i < ice->akm_codecs; i++) {
1962			if (ice->akm[i].ops.set_rate_val)
1963				ice->akm[i].ops.set_rate_val(&ice->akm[i], 0);
1964		}
1965	}
1966	return old_rate != new_rate;
1967}
1968
1969static struct snd_kcontrol_new snd_vt1724_pro_internal_clock = {
1970	.iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1971	.name = "Multi Track Internal Clock",
1972	.info = snd_vt1724_pro_internal_clock_info,
1973	.get = snd_vt1724_pro_internal_clock_get,
1974	.put = snd_vt1724_pro_internal_clock_put
1975};
1976
1977#define snd_vt1724_pro_rate_locking_info	snd_ctl_boolean_mono_info
1978
1979static int snd_vt1724_pro_rate_locking_get(struct snd_kcontrol *kcontrol,
1980					   struct snd_ctl_elem_value *ucontrol)
1981{
1982	ucontrol->value.integer.value[0] = PRO_RATE_LOCKED;
1983	return 0;
1984}
1985
1986static int snd_vt1724_pro_rate_locking_put(struct snd_kcontrol *kcontrol,
1987					   struct snd_ctl_elem_value *ucontrol)
1988{
1989	struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1990	int change = 0, nval;
1991
1992	nval = ucontrol->value.integer.value[0] ? 1 : 0;
1993	spin_lock_irq(&ice->reg_lock);
1994	change = PRO_RATE_LOCKED != nval;
1995	PRO_RATE_LOCKED = nval;
1996	spin_unlock_irq(&ice->reg_lock);
1997	return change;
1998}
1999
2000static struct snd_kcontrol_new snd_vt1724_pro_rate_locking = {
2001	.iface = SNDRV_CTL_ELEM_IFACE_MIXER,
2002	.name = "Multi Track Rate Locking",
2003	.info = snd_vt1724_pro_rate_locking_info,
2004	.get = snd_vt1724_pro_rate_locking_get,
2005	.put = snd_vt1724_pro_rate_locking_put
2006};
2007
2008#define snd_vt1724_pro_rate_reset_info		snd_ctl_boolean_mono_info
2009
2010static int snd_vt1724_pro_rate_reset_get(struct snd_kcontrol *kcontrol,
2011					 struct snd_ctl_elem_value *ucontrol)
2012{
2013	ucontrol->value.integer.value[0] = PRO_RATE_RESET ? 1 : 0;
2014	return 0;
2015}
2016
2017static int snd_vt1724_pro_rate_reset_put(struct snd_kcontrol *kcontrol,
2018					 struct snd_ctl_elem_value *ucontrol)
2019{
2020	struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
2021	int change = 0, nval;
2022
2023	nval = ucontrol->value.integer.value[0] ? 1 : 0;
2024	spin_lock_irq(&ice->reg_lock);
2025	change = PRO_RATE_RESET != nval;
2026	PRO_RATE_RESET = nval;
2027	spin_unlock_irq(&ice->reg_lock);
2028	return change;
2029}
2030
2031static struct snd_kcontrol_new snd_vt1724_pro_rate_reset = {
2032	.iface = SNDRV_CTL_ELEM_IFACE_MIXER,
2033	.name = "Multi Track Rate Reset",
2034	.info = snd_vt1724_pro_rate_reset_info,
2035	.get = snd_vt1724_pro_rate_reset_get,
2036	.put = snd_vt1724_pro_rate_reset_put
2037};
2038
2039
2040/*
2041 * routing
2042 */
2043static int snd_vt1724_pro_route_info(struct snd_kcontrol *kcontrol,
2044				     struct snd_ctl_elem_info *uinfo)
2045{
2046	static const char * const texts[] = {
2047		"PCM Out", /* 0 */
2048		"H/W In 0", "H/W In 1", /* 1-2 */
2049		"IEC958 In L", "IEC958 In R", /* 3-4 */
2050	};
2051
2052	return snd_ctl_enum_info(uinfo, 1, 5, texts);
2053}
2054
2055static inline int analog_route_shift(int idx)
2056{
2057	return (idx % 2) * 12 + ((idx / 2) * 3) + 8;
2058}
2059
2060static inline int digital_route_shift(int idx)
2061{
2062	return idx * 3;
2063}
2064
2065int snd_ice1724_get_route_val(struct snd_ice1712 *ice, int shift)
2066{
2067	unsigned long val;
2068	unsigned char eitem;
2069	static const unsigned char xlate[8] = {
2070		0, 255, 1, 2, 255, 255, 3, 4,
2071	};
2072
2073	val = inl(ICEMT1724(ice, ROUTE_PLAYBACK));
2074	val >>= shift;
2075	val &= 7; /* we now have 3 bits per output */
2076	eitem = xlate[val];
2077	if (eitem == 255) {
2078		snd_BUG();
2079		return 0;
2080	}
2081	return eitem;
2082}
2083
2084int snd_ice1724_put_route_val(struct snd_ice1712 *ice, unsigned int val,
2085								int shift)
2086{
2087	unsigned int old_val, nval;
2088	int change;
2089	static const unsigned char xroute[8] = {
2090		0, /* PCM */
2091		2, /* PSDIN0 Left */
2092		3, /* PSDIN0 Right */
2093		6, /* SPDIN Left */
2094		7, /* SPDIN Right */
2095	};
2096
2097	nval = xroute[val % 5];
2098	val = old_val = inl(ICEMT1724(ice, ROUTE_PLAYBACK));
2099	val &= ~(0x07 << shift);
2100	val |= nval << shift;
2101	change = val != old_val;
2102	if (change)
2103		outl(val, ICEMT1724(ice, ROUTE_PLAYBACK));
2104	return change;
2105}
2106
2107static int snd_vt1724_pro_route_analog_get(struct snd_kcontrol *kcontrol,
2108					   struct snd_ctl_elem_value *ucontrol)
2109{
2110	struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
2111	int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
2112	ucontrol->value.enumerated.item[0] =
2113		snd_ice1724_get_route_val(ice, analog_route_shift(idx));
2114	return 0;
2115}
2116
2117static int snd_vt1724_pro_route_analog_put(struct snd_kcontrol *kcontrol,
2118					   struct snd_ctl_elem_value *ucontrol)
2119{
2120	struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
2121	int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
2122	return snd_ice1724_put_route_val(ice,
2123					 ucontrol->value.enumerated.item[0],
2124					 analog_route_shift(idx));
2125}
2126
2127static int snd_vt1724_pro_route_spdif_get(struct snd_kcontrol *kcontrol,
2128					  struct snd_ctl_elem_value *ucontrol)
2129{
2130	struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
2131	int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
2132	ucontrol->value.enumerated.item[0] =
2133		snd_ice1724_get_route_val(ice, digital_route_shift(idx));
2134	return 0;
2135}
2136
2137static int snd_vt1724_pro_route_spdif_put(struct snd_kcontrol *kcontrol,
2138					  struct snd_ctl_elem_value *ucontrol)
2139{
2140	struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
2141	int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
2142	return snd_ice1724_put_route_val(ice,
2143					 ucontrol->value.enumerated.item[0],
2144					 digital_route_shift(idx));
2145}
2146
2147static struct snd_kcontrol_new snd_vt1724_mixer_pro_analog_route =
2148{
2149	.iface = SNDRV_CTL_ELEM_IFACE_MIXER,
2150	.name = "H/W Playback Route",
2151	.info = snd_vt1724_pro_route_info,
2152	.get = snd_vt1724_pro_route_analog_get,
2153	.put = snd_vt1724_pro_route_analog_put,
2154};
2155
2156static struct snd_kcontrol_new snd_vt1724_mixer_pro_spdif_route = {
2157	.iface = SNDRV_CTL_ELEM_IFACE_MIXER,
2158	.name = SNDRV_CTL_NAME_IEC958("", PLAYBACK, NONE) "Route",
2159	.info = snd_vt1724_pro_route_info,
2160	.get = snd_vt1724_pro_route_spdif_get,
2161	.put = snd_vt1724_pro_route_spdif_put,
2162	.count = 2,
2163};
2164
2165
2166static int snd_vt1724_pro_peak_info(struct snd_kcontrol *kcontrol,
2167				    struct snd_ctl_elem_info *uinfo)
2168{
2169	uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
2170	uinfo->count = 22; /* FIXME: for compatibility with ice1712... */
2171	uinfo->value.integer.min = 0;
2172	uinfo->value.integer.max = 255;
2173	return 0;
2174}
2175
2176static int snd_vt1724_pro_peak_get(struct snd_kcontrol *kcontrol,
2177				   struct snd_ctl_elem_value *ucontrol)
2178{
2179	struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
2180	int idx;
2181
2182	spin_lock_irq(&ice->reg_lock);
2183	for (idx = 0; idx < 22; idx++) {
2184		outb(idx, ICEMT1724(ice, MONITOR_PEAKINDEX));
2185		ucontrol->value.integer.value[idx] =
2186			inb(ICEMT1724(ice, MONITOR_PEAKDATA));
2187	}
2188	spin_unlock_irq(&ice->reg_lock);
2189	return 0;
2190}
2191
2192static struct snd_kcontrol_new snd_vt1724_mixer_pro_peak = {
2193	.iface = SNDRV_CTL_ELEM_IFACE_PCM,
2194	.name = "Multi Track Peak",
2195	.access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE,
2196	.info = snd_vt1724_pro_peak_info,
2197	.get = snd_vt1724_pro_peak_get
2198};
2199
2200/*
2201 *
2202 */
2203
2204static struct snd_ice1712_card_info no_matched;
2205
2206
2207/*
2208  ooAoo cards with no controls
2209*/
2210static unsigned char ooaoo_sq210_eeprom[] = {
2211	[ICE_EEP2_SYSCONF]     = 0x4c,	/* 49MHz crystal, no mpu401, no ADC,
2212					   1xDACs */
2213	[ICE_EEP2_ACLINK]      = 0x80,	/* I2S */
2214	[ICE_EEP2_I2S]         = 0x78,	/* no volume, 96k, 24bit, 192k */
2215	[ICE_EEP2_SPDIF]       = 0xc1,	/* out-en, out-int, out-ext */
2216	[ICE_EEP2_GPIO_DIR]    = 0x00,	/* no GPIOs are used */
2217	[ICE_EEP2_GPIO_DIR1]   = 0x00,
2218	[ICE_EEP2_GPIO_DIR2]   = 0x00,
2219	[ICE_EEP2_GPIO_MASK]   = 0xff,
2220	[ICE_EEP2_GPIO_MASK1]  = 0xff,
2221	[ICE_EEP2_GPIO_MASK2]  = 0xff,
2222
2223	[ICE_EEP2_GPIO_STATE]  = 0x00, /* inputs */
2224	[ICE_EEP2_GPIO_STATE1] = 0x00, /* all 1, but GPIO_CPLD_RW
2225					  and GPIO15 always zero */
2226	[ICE_EEP2_GPIO_STATE2] = 0x00, /* inputs */
2227};
2228
2229
2230static struct snd_ice1712_card_info snd_vt1724_ooaoo_cards[] = {
2231	{
2232		.name = "ooAoo SQ210a",
2233		.model = "sq210a",
2234		.eeprom_size = sizeof(ooaoo_sq210_eeprom),
2235		.eeprom_data = ooaoo_sq210_eeprom,
2236	},
2237	{ } /* terminator */
2238};
2239
2240static struct snd_ice1712_card_info *card_tables[] = {
2241	snd_vt1724_revo_cards,
2242	snd_vt1724_amp_cards,
2243	snd_vt1724_aureon_cards,
2244	snd_vt1720_mobo_cards,
2245	snd_vt1720_pontis_cards,
2246	snd_vt1724_prodigy_hifi_cards,
2247	snd_vt1724_prodigy192_cards,
2248	snd_vt1724_juli_cards,
2249	snd_vt1724_maya44_cards,
2250	snd_vt1724_phase_cards,
2251	snd_vt1724_wtm_cards,
2252	snd_vt1724_se_cards,
2253	snd_vt1724_qtet_cards,
2254	snd_vt1724_ooaoo_cards,
2255	snd_vt1724_psc724_cards,
2256	NULL,
2257};
2258
2259
2260/*
2261 */
2262
2263static void wait_i2c_busy(struct snd_ice1712 *ice)
2264{
2265	int t = 0x10000;
2266	while ((inb(ICEREG1724(ice, I2C_CTRL)) & VT1724_I2C_BUSY) && t--)
2267		;
2268	if (t == -1)
2269		dev_err(ice->card->dev, "i2c busy timeout\n");
2270}
2271
2272unsigned char snd_vt1724_read_i2c(struct snd_ice1712 *ice,
2273				  unsigned char dev, unsigned char addr)
2274{
2275	unsigned char val;
2276
2277	mutex_lock(&ice->i2c_mutex);
2278	wait_i2c_busy(ice);
2279	outb(addr, ICEREG1724(ice, I2C_BYTE_ADDR));
2280	outb(dev & ~VT1724_I2C_WRITE, ICEREG1724(ice, I2C_DEV_ADDR));
2281	wait_i2c_busy(ice);
2282	val = inb(ICEREG1724(ice, I2C_DATA));
2283	mutex_unlock(&ice->i2c_mutex);
2284	/*
2285	dev_dbg(ice->card->dev, "i2c_read: [0x%x,0x%x] = 0x%x\n", dev, addr, val);
2286	*/
2287	return val;
2288}
2289
2290void snd_vt1724_write_i2c(struct snd_ice1712 *ice,
2291			  unsigned char dev, unsigned char addr, unsigned char data)
2292{
2293	mutex_lock(&ice->i2c_mutex);
2294	wait_i2c_busy(ice);
2295	/*
2296	dev_dbg(ice->card->dev, "i2c_write: [0x%x,0x%x] = 0x%x\n", dev, addr, data);
2297	*/
2298	outb(addr, ICEREG1724(ice, I2C_BYTE_ADDR));
2299	outb(data, ICEREG1724(ice, I2C_DATA));
2300	outb(dev | VT1724_I2C_WRITE, ICEREG1724(ice, I2C_DEV_ADDR));
2301	wait_i2c_busy(ice);
2302	mutex_unlock(&ice->i2c_mutex);
2303}
2304
2305static int snd_vt1724_read_eeprom(struct snd_ice1712 *ice,
2306				  const char *modelname)
2307{
2308	const int dev = 0xa0;		/* EEPROM device address */
2309	unsigned int i, size;
2310	struct snd_ice1712_card_info * const *tbl, *c;
2311
2312	if (!modelname || !*modelname) {
2313		ice->eeprom.subvendor = 0;
2314		if ((inb(ICEREG1724(ice, I2C_CTRL)) & VT1724_I2C_EEPROM) != 0)
2315			ice->eeprom.subvendor =
2316				(snd_vt1724_read_i2c(ice, dev, 0x00) << 0) |
2317				(snd_vt1724_read_i2c(ice, dev, 0x01) << 8) |
2318				(snd_vt1724_read_i2c(ice, dev, 0x02) << 16) |
2319				(snd_vt1724_read_i2c(ice, dev, 0x03) << 24);
2320		if (ice->eeprom.subvendor == 0 ||
2321		    ice->eeprom.subvendor == (unsigned int)-1) {
2322			/* invalid subvendor from EEPROM, try the PCI
2323			 * subststem ID instead
2324			 */
2325			u16 vendor, device;
2326			pci_read_config_word(ice->pci, PCI_SUBSYSTEM_VENDOR_ID,
2327					     &vendor);
2328			pci_read_config_word(ice->pci, PCI_SUBSYSTEM_ID, &device);
2329			ice->eeprom.subvendor =
2330				((unsigned int)swab16(vendor) << 16) | swab16(device);
2331			if (ice->eeprom.subvendor == 0 ||
2332			    ice->eeprom.subvendor == (unsigned int)-1) {
2333				dev_err(ice->card->dev,
2334					"No valid ID is found\n");
2335				return -ENXIO;
2336			}
2337		}
2338	}
2339	for (tbl = card_tables; *tbl; tbl++) {
2340		for (c = *tbl; c->name; c++) {
2341			if (modelname && c->model &&
2342			    !strcmp(modelname, c->model)) {
2343				dev_info(ice->card->dev,
2344					 "Using board model %s\n",
2345				       c->name);
2346				ice->eeprom.subvendor = c->subvendor;
2347			} else if (c->subvendor != ice->eeprom.subvendor)
2348				continue;
2349			ice->card_info = c;
2350			if (!c->eeprom_size || !c->eeprom_data)
2351				goto found;
2352			/* if the EEPROM is given by the driver, use it */
2353			dev_dbg(ice->card->dev, "using the defined eeprom..\n");
2354			ice->eeprom.version = 2;
2355			ice->eeprom.size = c->eeprom_size + 6;
2356			memcpy(ice->eeprom.data, c->eeprom_data, c->eeprom_size);
2357			goto read_skipped;
2358		}
2359	}
2360	dev_warn(ice->card->dev, "No matching model found for ID 0x%x\n",
2361	       ice->eeprom.subvendor);
2362#ifdef CONFIG_PM_SLEEP
2363	/* assume AC97-only card which can suspend without additional code */
2364	ice->pm_suspend_enabled = 1;
2365#endif
2366
2367 found:
2368	ice->eeprom.size = snd_vt1724_read_i2c(ice, dev, 0x04);
2369	if (ice->eeprom.size < 6)
2370		ice->eeprom.size = 32;
2371	else if (ice->eeprom.size > 32) {
2372		dev_err(ice->card->dev, "Invalid EEPROM (size = %i)\n",
2373		       ice->eeprom.size);
2374		return -EIO;
2375	}
2376	ice->eeprom.version = snd_vt1724_read_i2c(ice, dev, 0x05);
2377	if (ice->eeprom.version != 1 && ice->eeprom.version != 2)
2378		dev_warn(ice->card->dev, "Invalid EEPROM version %i\n",
2379		       ice->eeprom.version);
2380	size = ice->eeprom.size - 6;
2381	for (i = 0; i < size; i++)
2382		ice->eeprom.data[i] = snd_vt1724_read_i2c(ice, dev, i + 6);
2383
2384 read_skipped:
2385	ice->eeprom.gpiomask = eeprom_triple(ice, ICE_EEP2_GPIO_MASK);
2386	ice->eeprom.gpiostate = eeprom_triple(ice, ICE_EEP2_GPIO_STATE);
2387	ice->eeprom.gpiodir = eeprom_triple(ice, ICE_EEP2_GPIO_DIR);
2388
2389	return 0;
2390}
2391
2392
2393
2394static void snd_vt1724_chip_reset(struct snd_ice1712 *ice)
2395{
2396	outb(VT1724_RESET , ICEREG1724(ice, CONTROL));
2397	inb(ICEREG1724(ice, CONTROL)); /* pci posting flush */
2398	msleep(10);
2399	outb(0, ICEREG1724(ice, CONTROL));
2400	inb(ICEREG1724(ice, CONTROL)); /* pci posting flush */
2401	msleep(10);
2402}
2403
2404static int snd_vt1724_chip_init(struct snd_ice1712 *ice)
2405{
2406	outb(ice->eeprom.data[ICE_EEP2_SYSCONF], ICEREG1724(ice, SYS_CFG));
2407	outb(ice->eeprom.data[ICE_EEP2_ACLINK], ICEREG1724(ice, AC97_CFG));
2408	outb(ice->eeprom.data[ICE_EEP2_I2S], ICEREG1724(ice, I2S_FEATURES));
2409	outb(ice->eeprom.data[ICE_EEP2_SPDIF], ICEREG1724(ice, SPDIF_CFG));
2410
2411	ice->gpio.write_mask = ice->eeprom.gpiomask;
2412	ice->gpio.direction = ice->eeprom.gpiodir;
2413	snd_vt1724_set_gpio_mask(ice, ice->eeprom.gpiomask);
2414	snd_vt1724_set_gpio_dir(ice, ice->eeprom.gpiodir);
2415	snd_vt1724_set_gpio_data(ice, ice->eeprom.gpiostate);
2416
2417	outb(0, ICEREG1724(ice, POWERDOWN));
2418
2419	/* MPU_RX and TX irq masks are cleared later dynamically */
2420	outb(VT1724_IRQ_MPU_RX | VT1724_IRQ_MPU_TX , ICEREG1724(ice, IRQMASK));
2421
2422	/* don't handle FIFO overrun/underruns (just yet),
2423	 * since they cause machine lockups
2424	 */
2425	outb(VT1724_MULTI_FIFO_ERR, ICEMT1724(ice, DMA_INT_MASK));
2426
2427	return 0;
2428}
2429
2430static int snd_vt1724_spdif_build_controls(struct snd_ice1712 *ice)
2431{
2432	int err;
2433	struct snd_kcontrol *kctl;
2434
2435	if (snd_BUG_ON(!ice->pcm))
2436		return -EIO;
2437
2438	if (!ice->own_routing) {
2439		err = snd_ctl_add(ice->card,
2440			snd_ctl_new1(&snd_vt1724_mixer_pro_spdif_route, ice));
2441		if (err < 0)
2442			return err;
2443	}
2444
2445	err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_vt1724_spdif_switch, ice));
2446	if (err < 0)
2447		return err;
2448
2449	err = snd_ctl_add(ice->card, kctl = snd_ctl_new1(&snd_vt1724_spdif_default, ice));
2450	if (err < 0)
2451		return err;
2452	kctl->id.device = ice->pcm->device;
2453	err = snd_ctl_add(ice->card, kctl = snd_ctl_new1(&snd_vt1724_spdif_maskc, ice));
2454	if (err < 0)
2455		return err;
2456	kctl->id.device = ice->pcm->device;
2457	err = snd_ctl_add(ice->card, kctl = snd_ctl_new1(&snd_vt1724_spdif_maskp, ice));
2458	if (err < 0)
2459		return err;
2460	kctl->id.device = ice->pcm->device;
2461#if 0 /* use default only */
2462	err = snd_ctl_add(ice->card, kctl = snd_ctl_new1(&snd_vt1724_spdif_stream, ice));
2463	if (err < 0)
2464		return err;
2465	kctl->id.device = ice->pcm->device;
2466	ice->spdif.stream_ctl = kctl;
2467#endif
2468	return 0;
2469}
2470
2471
2472static int snd_vt1724_build_controls(struct snd_ice1712 *ice)
2473{
2474	int err;
2475
2476	err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_vt1724_eeprom, ice));
2477	if (err < 0)
2478		return err;
2479	err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_vt1724_pro_internal_clock, ice));
2480	if (err < 0)
2481		return err;
2482
2483	err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_vt1724_pro_rate_locking, ice));
2484	if (err < 0)
2485		return err;
2486	err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_vt1724_pro_rate_reset, ice));
2487	if (err < 0)
2488		return err;
2489
2490	if (!ice->own_routing && ice->num_total_dacs > 0) {
2491		struct snd_kcontrol_new tmp = snd_vt1724_mixer_pro_analog_route;
2492		tmp.count = ice->num_total_dacs;
2493		if (ice->vt1720 && tmp.count > 2)
2494			tmp.count = 2;
2495		err = snd_ctl_add(ice->card, snd_ctl_new1(&tmp, ice));
2496		if (err < 0)
2497			return err;
2498	}
2499
2500	return snd_ctl_add(ice->card,
2501			   snd_ctl_new1(&snd_vt1724_mixer_pro_peak, ice));
2502}
2503
2504static int snd_vt1724_free(struct snd_ice1712 *ice)
2505{
2506	if (!ice->port)
2507		goto __hw_end;
2508	/* mask all interrupts */
2509	outb(0xff, ICEMT1724(ice, DMA_INT_MASK));
2510	outb(0xff, ICEREG1724(ice, IRQMASK));
2511	/* --- */
2512__hw_end:
2513	if (ice->irq >= 0)
2514		free_irq(ice->irq, ice);
2515	pci_release_regions(ice->pci);
2516	snd_ice1712_akm4xxx_free(ice);
2517	pci_disable_device(ice->pci);
2518	kfree(ice->spec);
2519	kfree(ice);
2520	return 0;
2521}
2522
2523static int snd_vt1724_dev_free(struct snd_device *device)
2524{
2525	struct snd_ice1712 *ice = device->device_data;
2526	return snd_vt1724_free(ice);
2527}
2528
2529static int snd_vt1724_create(struct snd_card *card,
2530			     struct pci_dev *pci,
2531			     const char *modelname,
2532			     struct snd_ice1712 **r_ice1712)
2533{
2534	struct snd_ice1712 *ice;
2535	int err;
2536	static struct snd_device_ops ops = {
2537		.dev_free =	snd_vt1724_dev_free,
2538	};
2539
2540	*r_ice1712 = NULL;
2541
2542	/* enable PCI device */
2543	err = pci_enable_device(pci);
2544	if (err < 0)
2545		return err;
2546
2547	ice = kzalloc(sizeof(*ice), GFP_KERNEL);
2548	if (ice == NULL) {
2549		pci_disable_device(pci);
2550		return -ENOMEM;
2551	}
2552	ice->vt1724 = 1;
2553	spin_lock_init(&ice->reg_lock);
2554	mutex_init(&ice->gpio_mutex);
2555	mutex_init(&ice->open_mutex);
2556	mutex_init(&ice->i2c_mutex);
2557	ice->gpio.set_mask = snd_vt1724_set_gpio_mask;
2558	ice->gpio.get_mask = snd_vt1724_get_gpio_mask;
2559	ice->gpio.set_dir = snd_vt1724_set_gpio_dir;
2560	ice->gpio.get_dir = snd_vt1724_get_gpio_dir;
2561	ice->gpio.set_data = snd_vt1724_set_gpio_data;
2562	ice->gpio.get_data = snd_vt1724_get_gpio_data;
2563	ice->card = card;
2564	ice->pci = pci;
2565	ice->irq = -1;
2566	pci_set_master(pci);
2567	snd_vt1724_proc_init(ice);
2568	synchronize_irq(pci->irq);
2569
2570	card->private_data = ice;
2571
2572	err = pci_request_regions(pci, "ICE1724");
2573	if (err < 0) {
2574		kfree(ice);
2575		pci_disable_device(pci);
2576		return err;
2577	}
2578	ice->port = pci_resource_start(pci, 0);
2579	ice->profi_port = pci_resource_start(pci, 1);
2580
2581	if (request_irq(pci->irq, snd_vt1724_interrupt,
2582			IRQF_SHARED, KBUILD_MODNAME, ice)) {
2583		dev_err(card->dev, "unable to grab IRQ %d\n", pci->irq);
2584		snd_vt1724_free(ice);
2585		return -EIO;
2586	}
2587
2588	ice->irq = pci->irq;
2589
2590	snd_vt1724_chip_reset(ice);
2591	if (snd_vt1724_read_eeprom(ice, modelname) < 0) {
2592		snd_vt1724_free(ice);
2593		return -EIO;
2594	}
2595	if (snd_vt1724_chip_init(ice) < 0) {
2596		snd_vt1724_free(ice);
2597		return -EIO;
2598	}
2599
2600	err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, ice, &ops);
2601	if (err < 0) {
2602		snd_vt1724_free(ice);
2603		return err;
2604	}
2605
2606	*r_ice1712 = ice;
2607	return 0;
2608}
2609
2610
2611/*
2612 *
2613 * Registration
2614 *
2615 */
2616
2617static int snd_vt1724_probe(struct pci_dev *pci,
2618			    const struct pci_device_id *pci_id)
2619{
2620	static int dev;
2621	struct snd_card *card;
2622	struct snd_ice1712 *ice;
2623	int pcm_dev = 0, err;
2624	struct snd_ice1712_card_info * const *tbl, *c;
2625
2626	if (dev >= SNDRV_CARDS)
2627		return -ENODEV;
2628	if (!enable[dev]) {
2629		dev++;
2630		return -ENOENT;
2631	}
2632
2633	err = snd_card_new(&pci->dev, index[dev], id[dev], THIS_MODULE,
2634			   0, &card);
2635	if (err < 0)
2636		return err;
2637
2638	strcpy(card->driver, "ICE1724");
2639	strcpy(card->shortname, "ICEnsemble ICE1724");
2640
2641	err = snd_vt1724_create(card, pci, model[dev], &ice);
2642	if (err < 0) {
2643		snd_card_free(card);
2644		return err;
2645	}
2646
2647	/* field init before calling chip_init */
2648	ice->ext_clock_count = 0;
2649
2650	for (tbl = card_tables; *tbl; tbl++) {
2651		for (c = *tbl; c->name; c++) {
2652			if ((model[dev] && c->model &&
2653			     !strcmp(model[dev], c->model)) ||
2654			    (c->subvendor == ice->eeprom.subvendor)) {
2655				strcpy(card->shortname, c->name);
2656				if (c->driver) /* specific driver? */
2657					strcpy(card->driver, c->driver);
2658				if (c->chip_init) {
2659					err = c->chip_init(ice);
2660					if (err < 0) {
2661						snd_card_free(card);
2662						return err;
2663					}
2664				}
2665				goto __found;
2666			}
2667		}
2668	}
2669	c = &no_matched;
2670__found:
2671	/*
2672	* VT1724 has separate DMAs for the analog and the SPDIF streams while
2673	* ICE1712 has only one for both (mixed up).
2674	*
2675	* Confusingly the analog PCM is named "professional" here because it
2676	* was called so in ice1712 driver, and vt1724 driver is derived from
2677	* ice1712 driver.
2678	*/
2679	ice->pro_rate_default = PRO_RATE_DEFAULT;
2680	if (!ice->is_spdif_master)
2681		ice->is_spdif_master = stdclock_is_spdif_master;
2682	if (!ice->get_rate)
2683		ice->get_rate = stdclock_get_rate;
2684	if (!ice->set_rate)
2685		ice->set_rate = stdclock_set_rate;
2686	if (!ice->set_mclk)
2687		ice->set_mclk = stdclock_set_mclk;
2688	if (!ice->set_spdif_clock)
2689		ice->set_spdif_clock = stdclock_set_spdif_clock;
2690	if (!ice->get_spdif_master_type)
2691		ice->get_spdif_master_type = stdclock_get_spdif_master_type;
2692	if (!ice->ext_clock_names)
2693		ice->ext_clock_names = ext_clock_names;
2694	if (!ice->ext_clock_count)
2695		ice->ext_clock_count = ARRAY_SIZE(ext_clock_names);
2696
2697	if (!ice->hw_rates)
2698		set_std_hw_rates(ice);
2699
2700	err = snd_vt1724_pcm_profi(ice, pcm_dev++);
2701	if (err < 0) {
2702		snd_card_free(card);
2703		return err;
2704	}
2705
2706	err = snd_vt1724_pcm_spdif(ice, pcm_dev++);
2707	if (err < 0) {
2708		snd_card_free(card);
2709		return err;
2710	}
2711
2712	err = snd_vt1724_pcm_indep(ice, pcm_dev++);
2713	if (err < 0) {
2714		snd_card_free(card);
2715		return err;
2716	}
2717
2718	err = snd_vt1724_ac97_mixer(ice);
2719	if (err < 0) {
2720		snd_card_free(card);
2721		return err;
2722	}
2723
2724	err = snd_vt1724_build_controls(ice);
2725	if (err < 0) {
2726		snd_card_free(card);
2727		return err;
2728	}
2729
2730	if (ice->pcm && ice->has_spdif) { /* has SPDIF I/O */
2731		err = snd_vt1724_spdif_build_controls(ice);
2732		if (err < 0) {
2733			snd_card_free(card);
2734			return err;
2735		}
2736	}
2737
2738	if (c->build_controls) {
2739		err = c->build_controls(ice);
2740		if (err < 0) {
2741			snd_card_free(card);
2742			return err;
2743		}
2744	}
2745
2746	if (!c->no_mpu401) {
2747		if (ice->eeprom.data[ICE_EEP2_SYSCONF] & VT1724_CFG_MPU401) {
2748			struct snd_rawmidi *rmidi;
2749
2750			err = snd_rawmidi_new(card, "MIDI", 0, 1, 1, &rmidi);
2751			if (err < 0) {
2752				snd_card_free(card);
2753				return err;
2754			}
2755			ice->rmidi[0] = rmidi;
2756			rmidi->private_data = ice;
2757			strcpy(rmidi->name, "ICE1724 MIDI");
2758			rmidi->info_flags = SNDRV_RAWMIDI_INFO_OUTPUT |
2759					    SNDRV_RAWMIDI_INFO_INPUT |
2760					    SNDRV_RAWMIDI_INFO_DUPLEX;
2761			snd_rawmidi_set_ops(rmidi, SNDRV_RAWMIDI_STREAM_OUTPUT,
2762					    &vt1724_midi_output_ops);
2763			snd_rawmidi_set_ops(rmidi, SNDRV_RAWMIDI_STREAM_INPUT,
2764					    &vt1724_midi_input_ops);
2765
2766			/* set watermarks */
2767			outb(VT1724_MPU_RX_FIFO | 0x1,
2768			     ICEREG1724(ice, MPU_FIFO_WM));
2769			outb(0x1, ICEREG1724(ice, MPU_FIFO_WM));
2770			/* set UART mode */
2771			outb(VT1724_MPU_UART, ICEREG1724(ice, MPU_CTRL));
2772		}
2773	}
2774
2775	sprintf(card->longname, "%s at 0x%lx, irq %i",
2776		card->shortname, ice->port, ice->irq);
2777
2778	err = snd_card_register(card);
2779	if (err < 0) {
2780		snd_card_free(card);
2781		return err;
2782	}
2783	pci_set_drvdata(pci, card);
2784	dev++;
2785	return 0;
2786}
2787
2788static void snd_vt1724_remove(struct pci_dev *pci)
2789{
2790	struct snd_card *card = pci_get_drvdata(pci);
2791	struct snd_ice1712 *ice = card->private_data;
2792
2793	if (ice->card_info && ice->card_info->chip_exit)
2794		ice->card_info->chip_exit(ice);
2795	snd_card_free(card);
2796}
2797
2798#ifdef CONFIG_PM_SLEEP
2799static int snd_vt1724_suspend(struct device *dev)
2800{
2801	struct snd_card *card = dev_get_drvdata(dev);
2802	struct snd_ice1712 *ice = card->private_data;
2803
2804	if (!ice->pm_suspend_enabled)
2805		return 0;
2806
2807	snd_power_change_state(card, SNDRV_CTL_POWER_D3hot);
2808
2809	snd_pcm_suspend_all(ice->pcm);
2810	snd_pcm_suspend_all(ice->pcm_pro);
2811	snd_pcm_suspend_all(ice->pcm_ds);
2812	snd_ac97_suspend(ice->ac97);
2813
2814	spin_lock_irq(&ice->reg_lock);
2815	ice->pm_saved_is_spdif_master = ice->is_spdif_master(ice);
2816	ice->pm_saved_spdif_ctrl = inw(ICEMT1724(ice, SPDIF_CTRL));
2817	ice->pm_saved_spdif_cfg = inb(ICEREG1724(ice, SPDIF_CFG));
2818	ice->pm_saved_route = inl(ICEMT1724(ice, ROUTE_PLAYBACK));
2819	spin_unlock_irq(&ice->reg_lock);
2820
2821	if (ice->pm_suspend)
2822		ice->pm_suspend(ice);
2823	return 0;
2824}
2825
2826static int snd_vt1724_resume(struct device *dev)
2827{
2828	struct snd_card *card = dev_get_drvdata(dev);
2829	struct snd_ice1712 *ice = card->private_data;
2830
2831	if (!ice->pm_suspend_enabled)
2832		return 0;
2833
2834	snd_vt1724_chip_reset(ice);
2835
2836	if (snd_vt1724_chip_init(ice) < 0) {
2837		snd_card_disconnect(card);
2838		return -EIO;
2839	}
2840
2841	if (ice->pm_resume)
2842		ice->pm_resume(ice);
2843
2844	if (ice->pm_saved_is_spdif_master) {
2845		/* switching to external clock via SPDIF */
2846		ice->set_spdif_clock(ice, 0);
2847	} else {
2848		/* internal on-card clock */
2849		int rate;
2850		if (ice->cur_rate)
2851			rate = ice->cur_rate;
2852		else
2853			rate = ice->pro_rate_default;
2854		snd_vt1724_set_pro_rate(ice, rate, 1);
2855	}
2856
2857	update_spdif_bits(ice, ice->pm_saved_spdif_ctrl);
2858
2859	outb(ice->pm_saved_spdif_cfg, ICEREG1724(ice, SPDIF_CFG));
2860	outl(ice->pm_saved_route, ICEMT1724(ice, ROUTE_PLAYBACK));
2861
2862	snd_ac97_resume(ice->ac97);
2863
2864	snd_power_change_state(card, SNDRV_CTL_POWER_D0);
2865	return 0;
2866}
2867
2868static SIMPLE_DEV_PM_OPS(snd_vt1724_pm, snd_vt1724_suspend, snd_vt1724_resume);
2869#define SND_VT1724_PM_OPS	&snd_vt1724_pm
2870#else
2871#define SND_VT1724_PM_OPS	NULL
2872#endif /* CONFIG_PM_SLEEP */
2873
2874static struct pci_driver vt1724_driver = {
2875	.name = KBUILD_MODNAME,
2876	.id_table = snd_vt1724_ids,
2877	.probe = snd_vt1724_probe,
2878	.remove = snd_vt1724_remove,
2879	.driver = {
2880		.pm = SND_VT1724_PM_OPS,
2881	},
2882};
2883
2884module_pci_driver(vt1724_driver);
2885