1/* 2 * ALSA driver for ICEnsemble ICE1712 (Envy24) 3 * 4 * Lowlevel functions for M-Audio Delta 1010, 1010E, 44, 66, 66E, Dio2496, 5 * Audiophile, Digigram VX442 6 * 7 * Copyright (c) 2000 Jaroslav Kysela <perex@perex.cz> 8 * 9 * This program is free software; you can redistribute it and/or modify 10 * it under the terms of the GNU General Public License as published by 11 * the Free Software Foundation; either version 2 of the License, or 12 * (at your option) any later version. 13 * 14 * This program is distributed in the hope that it will be useful, 15 * but WITHOUT ANY WARRANTY; without even the implied warranty of 16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 17 * GNU General Public License for more details. 18 * 19 * You should have received a copy of the GNU General Public License 20 * along with this program; if not, write to the Free Software 21 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 22 * 23 */ 24 25#include <linux/delay.h> 26#include <linux/interrupt.h> 27#include <linux/init.h> 28#include <linux/slab.h> 29#include <linux/mutex.h> 30 31#include <sound/core.h> 32#include <sound/cs8427.h> 33#include <sound/asoundef.h> 34 35#include "ice1712.h" 36#include "delta.h" 37 38#define SND_CS8403 39#include <sound/cs8403.h> 40 41 42/* 43 * CS8427 via SPI mode (for Audiophile), emulated I2C 44 */ 45 46/* send 8 bits */ 47static void ap_cs8427_write_byte(struct snd_ice1712 *ice, unsigned char data, unsigned char tmp) 48{ 49 int idx; 50 51 for (idx = 7; idx >= 0; idx--) { 52 tmp &= ~(ICE1712_DELTA_AP_DOUT|ICE1712_DELTA_AP_CCLK); 53 if (data & (1 << idx)) 54 tmp |= ICE1712_DELTA_AP_DOUT; 55 snd_ice1712_write(ice, ICE1712_IREG_GPIO_DATA, tmp); 56 udelay(5); 57 tmp |= ICE1712_DELTA_AP_CCLK; 58 snd_ice1712_write(ice, ICE1712_IREG_GPIO_DATA, tmp); 59 udelay(5); 60 } 61} 62 63/* read 8 bits */ 64static unsigned char ap_cs8427_read_byte(struct snd_ice1712 *ice, unsigned char tmp) 65{ 66 unsigned char data = 0; 67 int idx; 68 69 for (idx = 7; idx >= 0; idx--) { 70 tmp &= ~ICE1712_DELTA_AP_CCLK; 71 snd_ice1712_write(ice, ICE1712_IREG_GPIO_DATA, tmp); 72 udelay(5); 73 if (snd_ice1712_read(ice, ICE1712_IREG_GPIO_DATA) & ICE1712_DELTA_AP_DIN) 74 data |= 1 << idx; 75 tmp |= ICE1712_DELTA_AP_CCLK; 76 snd_ice1712_write(ice, ICE1712_IREG_GPIO_DATA, tmp); 77 udelay(5); 78 } 79 return data; 80} 81 82/* assert chip select */ 83static unsigned char ap_cs8427_codec_select(struct snd_ice1712 *ice) 84{ 85 unsigned char tmp; 86 tmp = snd_ice1712_read(ice, ICE1712_IREG_GPIO_DATA); 87 switch (ice->eeprom.subvendor) { 88 case ICE1712_SUBDEVICE_DELTA1010E: 89 case ICE1712_SUBDEVICE_DELTA1010LT: 90 tmp &= ~ICE1712_DELTA_1010LT_CS; 91 tmp |= ICE1712_DELTA_1010LT_CCLK | ICE1712_DELTA_1010LT_CS_CS8427; 92 break; 93 case ICE1712_SUBDEVICE_AUDIOPHILE: 94 case ICE1712_SUBDEVICE_DELTA410: 95 tmp |= ICE1712_DELTA_AP_CCLK | ICE1712_DELTA_AP_CS_CODEC; 96 tmp &= ~ICE1712_DELTA_AP_CS_DIGITAL; 97 break; 98 case ICE1712_SUBDEVICE_DELTA66E: 99 tmp |= ICE1712_DELTA_66E_CCLK | ICE1712_DELTA_66E_CS_CHIP_A | 100 ICE1712_DELTA_66E_CS_CHIP_B; 101 tmp &= ~ICE1712_DELTA_66E_CS_CS8427; 102 break; 103 case ICE1712_SUBDEVICE_VX442: 104 tmp |= ICE1712_VX442_CCLK | ICE1712_VX442_CODEC_CHIP_A | ICE1712_VX442_CODEC_CHIP_B; 105 tmp &= ~ICE1712_VX442_CS_DIGITAL; 106 break; 107 } 108 snd_ice1712_write(ice, ICE1712_IREG_GPIO_DATA, tmp); 109 udelay(5); 110 return tmp; 111} 112 113/* deassert chip select */ 114static void ap_cs8427_codec_deassert(struct snd_ice1712 *ice, unsigned char tmp) 115{ 116 switch (ice->eeprom.subvendor) { 117 case ICE1712_SUBDEVICE_DELTA1010E: 118 case ICE1712_SUBDEVICE_DELTA1010LT: 119 tmp &= ~ICE1712_DELTA_1010LT_CS; 120 tmp |= ICE1712_DELTA_1010LT_CS_NONE; 121 break; 122 case ICE1712_SUBDEVICE_AUDIOPHILE: 123 case ICE1712_SUBDEVICE_DELTA410: 124 tmp |= ICE1712_DELTA_AP_CS_DIGITAL; 125 break; 126 case ICE1712_SUBDEVICE_DELTA66E: 127 tmp |= ICE1712_DELTA_66E_CS_CS8427; 128 break; 129 case ICE1712_SUBDEVICE_VX442: 130 tmp |= ICE1712_VX442_CS_DIGITAL; 131 break; 132 } 133 snd_ice1712_write(ice, ICE1712_IREG_GPIO_DATA, tmp); 134} 135 136/* sequential write */ 137static int ap_cs8427_sendbytes(struct snd_i2c_device *device, unsigned char *bytes, int count) 138{ 139 struct snd_ice1712 *ice = device->bus->private_data; 140 int res = count; 141 unsigned char tmp; 142 143 mutex_lock(&ice->gpio_mutex); 144 tmp = ap_cs8427_codec_select(ice); 145 ap_cs8427_write_byte(ice, (device->addr << 1) | 0, tmp); /* address + write mode */ 146 while (count-- > 0) 147 ap_cs8427_write_byte(ice, *bytes++, tmp); 148 ap_cs8427_codec_deassert(ice, tmp); 149 mutex_unlock(&ice->gpio_mutex); 150 return res; 151} 152 153/* sequential read */ 154static int ap_cs8427_readbytes(struct snd_i2c_device *device, unsigned char *bytes, int count) 155{ 156 struct snd_ice1712 *ice = device->bus->private_data; 157 int res = count; 158 unsigned char tmp; 159 160 mutex_lock(&ice->gpio_mutex); 161 tmp = ap_cs8427_codec_select(ice); 162 ap_cs8427_write_byte(ice, (device->addr << 1) | 1, tmp); /* address + read mode */ 163 while (count-- > 0) 164 *bytes++ = ap_cs8427_read_byte(ice, tmp); 165 ap_cs8427_codec_deassert(ice, tmp); 166 mutex_unlock(&ice->gpio_mutex); 167 return res; 168} 169 170static int ap_cs8427_probeaddr(struct snd_i2c_bus *bus, unsigned short addr) 171{ 172 if (addr == 0x10) 173 return 1; 174 return -ENOENT; 175} 176 177static struct snd_i2c_ops ap_cs8427_i2c_ops = { 178 .sendbytes = ap_cs8427_sendbytes, 179 .readbytes = ap_cs8427_readbytes, 180 .probeaddr = ap_cs8427_probeaddr, 181}; 182 183/* 184 */ 185 186static void snd_ice1712_delta_cs8403_spdif_write(struct snd_ice1712 *ice, unsigned char bits) 187{ 188 unsigned char tmp, mask1, mask2; 189 int idx; 190 /* send byte to transmitter */ 191 mask1 = ICE1712_DELTA_SPDIF_OUT_STAT_CLOCK; 192 mask2 = ICE1712_DELTA_SPDIF_OUT_STAT_DATA; 193 mutex_lock(&ice->gpio_mutex); 194 tmp = snd_ice1712_read(ice, ICE1712_IREG_GPIO_DATA); 195 for (idx = 7; idx >= 0; idx--) { 196 tmp &= ~(mask1 | mask2); 197 if (bits & (1 << idx)) 198 tmp |= mask2; 199 snd_ice1712_write(ice, ICE1712_IREG_GPIO_DATA, tmp); 200 udelay(100); 201 tmp |= mask1; 202 snd_ice1712_write(ice, ICE1712_IREG_GPIO_DATA, tmp); 203 udelay(100); 204 } 205 tmp &= ~mask1; 206 snd_ice1712_write(ice, ICE1712_IREG_GPIO_DATA, tmp); 207 mutex_unlock(&ice->gpio_mutex); 208} 209 210 211static void delta_spdif_default_get(struct snd_ice1712 *ice, struct snd_ctl_elem_value *ucontrol) 212{ 213 snd_cs8403_decode_spdif_bits(&ucontrol->value.iec958, ice->spdif.cs8403_bits); 214} 215 216static int delta_spdif_default_put(struct snd_ice1712 *ice, struct snd_ctl_elem_value *ucontrol) 217{ 218 unsigned int val; 219 int change; 220 221 val = snd_cs8403_encode_spdif_bits(&ucontrol->value.iec958); 222 spin_lock_irq(&ice->reg_lock); 223 change = ice->spdif.cs8403_bits != val; 224 ice->spdif.cs8403_bits = val; 225 if (change && ice->playback_pro_substream == NULL) { 226 spin_unlock_irq(&ice->reg_lock); 227 snd_ice1712_delta_cs8403_spdif_write(ice, val); 228 } else { 229 spin_unlock_irq(&ice->reg_lock); 230 } 231 return change; 232} 233 234static void delta_spdif_stream_get(struct snd_ice1712 *ice, struct snd_ctl_elem_value *ucontrol) 235{ 236 snd_cs8403_decode_spdif_bits(&ucontrol->value.iec958, ice->spdif.cs8403_stream_bits); 237} 238 239static int delta_spdif_stream_put(struct snd_ice1712 *ice, struct snd_ctl_elem_value *ucontrol) 240{ 241 unsigned int val; 242 int change; 243 244 val = snd_cs8403_encode_spdif_bits(&ucontrol->value.iec958); 245 spin_lock_irq(&ice->reg_lock); 246 change = ice->spdif.cs8403_stream_bits != val; 247 ice->spdif.cs8403_stream_bits = val; 248 if (change && ice->playback_pro_substream != NULL) { 249 spin_unlock_irq(&ice->reg_lock); 250 snd_ice1712_delta_cs8403_spdif_write(ice, val); 251 } else { 252 spin_unlock_irq(&ice->reg_lock); 253 } 254 return change; 255} 256 257 258/* 259 * AK4524 on Delta 44 and 66 to choose the chip mask 260 */ 261static void delta_ak4524_lock(struct snd_akm4xxx *ak, int chip) 262{ 263 struct snd_ak4xxx_private *priv = (void *)ak->private_value[0]; 264 struct snd_ice1712 *ice = ak->private_data[0]; 265 266 snd_ice1712_save_gpio_status(ice); 267 priv->cs_mask = 268 priv->cs_addr = chip == 0 ? ICE1712_DELTA_CODEC_CHIP_A : 269 ICE1712_DELTA_CODEC_CHIP_B; 270} 271 272/* 273 * AK4524 on Delta1010LT to choose the chip address 274 */ 275static void delta1010lt_ak4524_lock(struct snd_akm4xxx *ak, int chip) 276{ 277 struct snd_ak4xxx_private *priv = (void *)ak->private_value[0]; 278 struct snd_ice1712 *ice = ak->private_data[0]; 279 280 snd_ice1712_save_gpio_status(ice); 281 priv->cs_mask = ICE1712_DELTA_1010LT_CS; 282 priv->cs_addr = chip << 4; 283} 284 285/* 286 * AK4524 on Delta66 rev E to choose the chip address 287 */ 288static void delta66e_ak4524_lock(struct snd_akm4xxx *ak, int chip) 289{ 290 struct snd_ak4xxx_private *priv = (void *)ak->private_value[0]; 291 struct snd_ice1712 *ice = ak->private_data[0]; 292 293 snd_ice1712_save_gpio_status(ice); 294 priv->cs_mask = 295 priv->cs_addr = chip == 0 ? ICE1712_DELTA_66E_CS_CHIP_A : 296 ICE1712_DELTA_66E_CS_CHIP_B; 297} 298 299/* 300 * AK4528 on VX442 to choose the chip mask 301 */ 302static void vx442_ak4524_lock(struct snd_akm4xxx *ak, int chip) 303{ 304 struct snd_ak4xxx_private *priv = (void *)ak->private_value[0]; 305 struct snd_ice1712 *ice = ak->private_data[0]; 306 307 snd_ice1712_save_gpio_status(ice); 308 priv->cs_mask = 309 priv->cs_addr = chip == 0 ? ICE1712_VX442_CODEC_CHIP_A : 310 ICE1712_VX442_CODEC_CHIP_B; 311} 312 313/* 314 * change the DFS bit according rate for Delta1010 315 */ 316static void delta_1010_set_rate_val(struct snd_ice1712 *ice, unsigned int rate) 317{ 318 unsigned char tmp, tmp2; 319 320 if (rate == 0) /* no hint - S/PDIF input is master, simply return */ 321 return; 322 323 mutex_lock(&ice->gpio_mutex); 324 tmp = snd_ice1712_read(ice, ICE1712_IREG_GPIO_DATA); 325 tmp2 = tmp & ~ICE1712_DELTA_DFS; 326 if (rate > 48000) 327 tmp2 |= ICE1712_DELTA_DFS; 328 if (tmp != tmp2) 329 snd_ice1712_write(ice, ICE1712_IREG_GPIO_DATA, tmp2); 330 mutex_unlock(&ice->gpio_mutex); 331} 332 333/* 334 * change the rate of AK4524 on Delta 44/66, AP, 1010LT 335 */ 336static void delta_ak4524_set_rate_val(struct snd_akm4xxx *ak, unsigned int rate) 337{ 338 unsigned char tmp, tmp2; 339 struct snd_ice1712 *ice = ak->private_data[0]; 340 341 if (rate == 0) /* no hint - S/PDIF input is master, simply return */ 342 return; 343 344 /* check before reset ak4524 to avoid unnecessary clicks */ 345 mutex_lock(&ice->gpio_mutex); 346 tmp = snd_ice1712_read(ice, ICE1712_IREG_GPIO_DATA); 347 mutex_unlock(&ice->gpio_mutex); 348 tmp2 = tmp & ~ICE1712_DELTA_DFS; 349 if (rate > 48000) 350 tmp2 |= ICE1712_DELTA_DFS; 351 if (tmp == tmp2) 352 return; 353 354 /* do it again */ 355 snd_akm4xxx_reset(ak, 1); 356 mutex_lock(&ice->gpio_mutex); 357 tmp = snd_ice1712_read(ice, ICE1712_IREG_GPIO_DATA) & ~ICE1712_DELTA_DFS; 358 if (rate > 48000) 359 tmp |= ICE1712_DELTA_DFS; 360 snd_ice1712_write(ice, ICE1712_IREG_GPIO_DATA, tmp); 361 mutex_unlock(&ice->gpio_mutex); 362 snd_akm4xxx_reset(ak, 0); 363} 364 365/* 366 * change the rate of AK4524 on VX442 367 */ 368static void vx442_ak4524_set_rate_val(struct snd_akm4xxx *ak, unsigned int rate) 369{ 370 unsigned char val; 371 372 val = (rate > 48000) ? 0x65 : 0x60; 373 if (snd_akm4xxx_get(ak, 0, 0x02) != val || 374 snd_akm4xxx_get(ak, 1, 0x02) != val) { 375 snd_akm4xxx_reset(ak, 1); 376 snd_akm4xxx_write(ak, 0, 0x02, val); 377 snd_akm4xxx_write(ak, 1, 0x02, val); 378 snd_akm4xxx_reset(ak, 0); 379 } 380} 381 382 383/* 384 * SPDIF ops for Delta 1010, Dio, 66 385 */ 386 387/* open callback */ 388static void delta_open_spdif(struct snd_ice1712 *ice, struct snd_pcm_substream *substream) 389{ 390 ice->spdif.cs8403_stream_bits = ice->spdif.cs8403_bits; 391} 392 393/* set up */ 394static void delta_setup_spdif(struct snd_ice1712 *ice, int rate) 395{ 396 unsigned long flags; 397 unsigned int tmp; 398 int change; 399 400 spin_lock_irqsave(&ice->reg_lock, flags); 401 tmp = ice->spdif.cs8403_stream_bits; 402 if (tmp & 0x01) /* consumer */ 403 tmp &= (tmp & 0x01) ? ~0x06 : ~0x18; 404 switch (rate) { 405 case 32000: tmp |= (tmp & 0x01) ? 0x04 : 0x00; break; 406 case 44100: tmp |= (tmp & 0x01) ? 0x00 : 0x10; break; 407 case 48000: tmp |= (tmp & 0x01) ? 0x02 : 0x08; break; 408 default: tmp |= (tmp & 0x01) ? 0x00 : 0x18; break; 409 } 410 change = ice->spdif.cs8403_stream_bits != tmp; 411 ice->spdif.cs8403_stream_bits = tmp; 412 spin_unlock_irqrestore(&ice->reg_lock, flags); 413 if (change) 414 snd_ctl_notify(ice->card, SNDRV_CTL_EVENT_MASK_VALUE, &ice->spdif.stream_ctl->id); 415 snd_ice1712_delta_cs8403_spdif_write(ice, tmp); 416} 417 418#define snd_ice1712_delta1010lt_wordclock_status_info \ 419 snd_ctl_boolean_mono_info 420 421static int snd_ice1712_delta1010lt_wordclock_status_get(struct snd_kcontrol *kcontrol, 422 struct snd_ctl_elem_value *ucontrol) 423{ 424 char reg = 0x10; /* CS8427 receiver error register */ 425 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 426 427 if (snd_i2c_sendbytes(ice->cs8427, ®, 1) != 1) 428 dev_err(ice->card->dev, 429 "unable to send register 0x%x byte to CS8427\n", reg); 430 snd_i2c_readbytes(ice->cs8427, ®, 1); 431 ucontrol->value.integer.value[0] = (reg & CS8427_UNLOCK) ? 1 : 0; 432 return 0; 433} 434 435static struct snd_kcontrol_new snd_ice1712_delta1010lt_wordclock_status = 436{ 437 .access = (SNDRV_CTL_ELEM_ACCESS_READ), 438 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, 439 .name = "Word Clock Status", 440 .info = snd_ice1712_delta1010lt_wordclock_status_info, 441 .get = snd_ice1712_delta1010lt_wordclock_status_get, 442}; 443 444/* 445 * initialize the chips on M-Audio cards 446 */ 447 448static struct snd_akm4xxx akm_audiophile = { 449 .type = SND_AK4528, 450 .num_adcs = 2, 451 .num_dacs = 2, 452 .ops = { 453 .set_rate_val = delta_ak4524_set_rate_val 454 } 455}; 456 457static struct snd_ak4xxx_private akm_audiophile_priv = { 458 .caddr = 2, 459 .cif = 0, 460 .data_mask = ICE1712_DELTA_AP_DOUT, 461 .clk_mask = ICE1712_DELTA_AP_CCLK, 462 .cs_mask = ICE1712_DELTA_AP_CS_CODEC, 463 .cs_addr = ICE1712_DELTA_AP_CS_CODEC, 464 .cs_none = 0, 465 .add_flags = ICE1712_DELTA_AP_CS_DIGITAL, 466 .mask_flags = 0, 467}; 468 469static struct snd_akm4xxx akm_delta410 = { 470 .type = SND_AK4529, 471 .num_adcs = 2, 472 .num_dacs = 8, 473 .ops = { 474 .set_rate_val = delta_ak4524_set_rate_val 475 } 476}; 477 478static struct snd_ak4xxx_private akm_delta410_priv = { 479 .caddr = 0, 480 .cif = 0, 481 .data_mask = ICE1712_DELTA_AP_DOUT, 482 .clk_mask = ICE1712_DELTA_AP_CCLK, 483 .cs_mask = ICE1712_DELTA_AP_CS_CODEC, 484 .cs_addr = ICE1712_DELTA_AP_CS_CODEC, 485 .cs_none = 0, 486 .add_flags = ICE1712_DELTA_AP_CS_DIGITAL, 487 .mask_flags = 0, 488}; 489 490static struct snd_akm4xxx akm_delta1010lt = { 491 .type = SND_AK4524, 492 .num_adcs = 8, 493 .num_dacs = 8, 494 .ops = { 495 .lock = delta1010lt_ak4524_lock, 496 .set_rate_val = delta_ak4524_set_rate_val 497 } 498}; 499 500static struct snd_ak4xxx_private akm_delta1010lt_priv = { 501 .caddr = 2, 502 .cif = 0, /* the default level of the CIF pin from AK4524 */ 503 .data_mask = ICE1712_DELTA_1010LT_DOUT, 504 .clk_mask = ICE1712_DELTA_1010LT_CCLK, 505 .cs_mask = 0, 506 .cs_addr = 0, /* set later */ 507 .cs_none = ICE1712_DELTA_1010LT_CS_NONE, 508 .add_flags = 0, 509 .mask_flags = 0, 510}; 511 512static struct snd_akm4xxx akm_delta66e = { 513 .type = SND_AK4524, 514 .num_adcs = 4, 515 .num_dacs = 4, 516 .ops = { 517 .lock = delta66e_ak4524_lock, 518 .set_rate_val = delta_ak4524_set_rate_val 519 } 520}; 521 522static struct snd_ak4xxx_private akm_delta66e_priv = { 523 .caddr = 2, 524 .cif = 0, /* the default level of the CIF pin from AK4524 */ 525 .data_mask = ICE1712_DELTA_66E_DOUT, 526 .clk_mask = ICE1712_DELTA_66E_CCLK, 527 .cs_mask = 0, 528 .cs_addr = 0, /* set later */ 529 .cs_none = 0, 530 .add_flags = 0, 531 .mask_flags = 0, 532}; 533 534 535static struct snd_akm4xxx akm_delta44 = { 536 .type = SND_AK4524, 537 .num_adcs = 4, 538 .num_dacs = 4, 539 .ops = { 540 .lock = delta_ak4524_lock, 541 .set_rate_val = delta_ak4524_set_rate_val 542 } 543}; 544 545static struct snd_ak4xxx_private akm_delta44_priv = { 546 .caddr = 2, 547 .cif = 0, /* the default level of the CIF pin from AK4524 */ 548 .data_mask = ICE1712_DELTA_CODEC_SERIAL_DATA, 549 .clk_mask = ICE1712_DELTA_CODEC_SERIAL_CLOCK, 550 .cs_mask = 0, 551 .cs_addr = 0, /* set later */ 552 .cs_none = 0, 553 .add_flags = 0, 554 .mask_flags = 0, 555}; 556 557static struct snd_akm4xxx akm_vx442 = { 558 .type = SND_AK4524, 559 .num_adcs = 4, 560 .num_dacs = 4, 561 .ops = { 562 .lock = vx442_ak4524_lock, 563 .set_rate_val = vx442_ak4524_set_rate_val 564 } 565}; 566 567static struct snd_ak4xxx_private akm_vx442_priv = { 568 .caddr = 2, 569 .cif = 0, 570 .data_mask = ICE1712_VX442_DOUT, 571 .clk_mask = ICE1712_VX442_CCLK, 572 .cs_mask = 0, 573 .cs_addr = 0, /* set later */ 574 .cs_none = 0, 575 .add_flags = 0, 576 .mask_flags = 0, 577}; 578 579#ifdef CONFIG_PM_SLEEP 580static int snd_ice1712_delta_resume(struct snd_ice1712 *ice) 581{ 582 unsigned char akm_img_bak[AK4XXX_IMAGE_SIZE]; 583 unsigned char akm_vol_bak[AK4XXX_IMAGE_SIZE]; 584 585 /* init spdif */ 586 switch (ice->eeprom.subvendor) { 587 case ICE1712_SUBDEVICE_AUDIOPHILE: 588 case ICE1712_SUBDEVICE_DELTA410: 589 case ICE1712_SUBDEVICE_DELTA1010E: 590 case ICE1712_SUBDEVICE_DELTA1010LT: 591 case ICE1712_SUBDEVICE_VX442: 592 case ICE1712_SUBDEVICE_DELTA66E: 593 snd_cs8427_init(ice->i2c, ice->cs8427); 594 break; 595 case ICE1712_SUBDEVICE_DELTA1010: 596 case ICE1712_SUBDEVICE_MEDIASTATION: 597 /* nothing */ 598 break; 599 case ICE1712_SUBDEVICE_DELTADIO2496: 600 case ICE1712_SUBDEVICE_DELTA66: 601 /* Set spdif defaults */ 602 snd_ice1712_delta_cs8403_spdif_write(ice, ice->spdif.cs8403_bits); 603 break; 604 } 605 606 /* init codec and restore registers */ 607 if (ice->akm_codecs) { 608 memcpy(akm_img_bak, ice->akm->images, sizeof(akm_img_bak)); 609 memcpy(akm_vol_bak, ice->akm->volumes, sizeof(akm_vol_bak)); 610 snd_akm4xxx_init(ice->akm); 611 memcpy(ice->akm->images, akm_img_bak, sizeof(akm_img_bak)); 612 memcpy(ice->akm->volumes, akm_vol_bak, sizeof(akm_vol_bak)); 613 snd_akm4xxx_reset(ice->akm, 0); 614 } 615 616 return 0; 617} 618 619static int snd_ice1712_delta_suspend(struct snd_ice1712 *ice) 620{ 621 if (ice->akm_codecs) /* reset & mute codec */ 622 snd_akm4xxx_reset(ice->akm, 1); 623 624 return 0; 625} 626#endif 627 628static int snd_ice1712_delta_init(struct snd_ice1712 *ice) 629{ 630 int err; 631 struct snd_akm4xxx *ak; 632 unsigned char tmp; 633 634 if (ice->eeprom.subvendor == ICE1712_SUBDEVICE_DELTA1010 && 635 ice->eeprom.gpiodir == 0x7b) 636 ice->eeprom.subvendor = ICE1712_SUBDEVICE_DELTA1010E; 637 638 if (ice->eeprom.subvendor == ICE1712_SUBDEVICE_DELTA66 && 639 ice->eeprom.gpiodir == 0xfb) 640 ice->eeprom.subvendor = ICE1712_SUBDEVICE_DELTA66E; 641 642 /* determine I2C, DACs and ADCs */ 643 switch (ice->eeprom.subvendor) { 644 case ICE1712_SUBDEVICE_AUDIOPHILE: 645 ice->num_total_dacs = 2; 646 ice->num_total_adcs = 2; 647 break; 648 case ICE1712_SUBDEVICE_DELTA410: 649 ice->num_total_dacs = 8; 650 ice->num_total_adcs = 2; 651 break; 652 case ICE1712_SUBDEVICE_DELTA44: 653 case ICE1712_SUBDEVICE_DELTA66: 654 ice->num_total_dacs = ice->omni ? 8 : 4; 655 ice->num_total_adcs = ice->omni ? 8 : 4; 656 break; 657 case ICE1712_SUBDEVICE_DELTA1010: 658 case ICE1712_SUBDEVICE_DELTA1010E: 659 case ICE1712_SUBDEVICE_DELTA1010LT: 660 case ICE1712_SUBDEVICE_MEDIASTATION: 661 case ICE1712_SUBDEVICE_EDIROLDA2496: 662 ice->num_total_dacs = 8; 663 ice->num_total_adcs = 8; 664 break; 665 case ICE1712_SUBDEVICE_DELTADIO2496: 666 ice->num_total_dacs = 4; /* two AK4324 codecs */ 667 break; 668 case ICE1712_SUBDEVICE_VX442: 669 case ICE1712_SUBDEVICE_DELTA66E: /* omni not supported yet */ 670 ice->num_total_dacs = 4; 671 ice->num_total_adcs = 4; 672 break; 673 } 674#ifdef CONFIG_PM_SLEEP 675 ice->pm_resume = snd_ice1712_delta_resume; 676 ice->pm_suspend = snd_ice1712_delta_suspend; 677 ice->pm_suspend_enabled = 1; 678#endif 679 /* initialize the SPI clock to high */ 680 tmp = snd_ice1712_read(ice, ICE1712_IREG_GPIO_DATA); 681 tmp |= ICE1712_DELTA_AP_CCLK; 682 snd_ice1712_write(ice, ICE1712_IREG_GPIO_DATA, tmp); 683 udelay(5); 684 685 /* initialize spdif */ 686 switch (ice->eeprom.subvendor) { 687 case ICE1712_SUBDEVICE_AUDIOPHILE: 688 case ICE1712_SUBDEVICE_DELTA410: 689 case ICE1712_SUBDEVICE_DELTA1010E: 690 case ICE1712_SUBDEVICE_DELTA1010LT: 691 case ICE1712_SUBDEVICE_VX442: 692 case ICE1712_SUBDEVICE_DELTA66E: 693 if ((err = snd_i2c_bus_create(ice->card, "ICE1712 GPIO 1", NULL, &ice->i2c)) < 0) { 694 dev_err(ice->card->dev, "unable to create I2C bus\n"); 695 return err; 696 } 697 ice->i2c->private_data = ice; 698 ice->i2c->ops = &ap_cs8427_i2c_ops; 699 if ((err = snd_ice1712_init_cs8427(ice, CS8427_BASE_ADDR)) < 0) 700 return err; 701 break; 702 case ICE1712_SUBDEVICE_DELTA1010: 703 case ICE1712_SUBDEVICE_MEDIASTATION: 704 ice->gpio.set_pro_rate = delta_1010_set_rate_val; 705 break; 706 case ICE1712_SUBDEVICE_DELTADIO2496: 707 ice->gpio.set_pro_rate = delta_1010_set_rate_val; 708 /* fall thru */ 709 case ICE1712_SUBDEVICE_DELTA66: 710 ice->spdif.ops.open = delta_open_spdif; 711 ice->spdif.ops.setup_rate = delta_setup_spdif; 712 ice->spdif.ops.default_get = delta_spdif_default_get; 713 ice->spdif.ops.default_put = delta_spdif_default_put; 714 ice->spdif.ops.stream_get = delta_spdif_stream_get; 715 ice->spdif.ops.stream_put = delta_spdif_stream_put; 716 /* Set spdif defaults */ 717 snd_ice1712_delta_cs8403_spdif_write(ice, ice->spdif.cs8403_bits); 718 break; 719 } 720 721 /* no analog? */ 722 switch (ice->eeprom.subvendor) { 723 case ICE1712_SUBDEVICE_DELTA1010: 724 case ICE1712_SUBDEVICE_DELTA1010E: 725 case ICE1712_SUBDEVICE_DELTADIO2496: 726 case ICE1712_SUBDEVICE_MEDIASTATION: 727 return 0; 728 } 729 730 /* second stage of initialization, analog parts and others */ 731 ak = ice->akm = kmalloc(sizeof(struct snd_akm4xxx), GFP_KERNEL); 732 if (! ak) 733 return -ENOMEM; 734 ice->akm_codecs = 1; 735 736 switch (ice->eeprom.subvendor) { 737 case ICE1712_SUBDEVICE_AUDIOPHILE: 738 err = snd_ice1712_akm4xxx_init(ak, &akm_audiophile, &akm_audiophile_priv, ice); 739 break; 740 case ICE1712_SUBDEVICE_DELTA410: 741 err = snd_ice1712_akm4xxx_init(ak, &akm_delta410, &akm_delta410_priv, ice); 742 break; 743 case ICE1712_SUBDEVICE_DELTA1010LT: 744 case ICE1712_SUBDEVICE_EDIROLDA2496: 745 err = snd_ice1712_akm4xxx_init(ak, &akm_delta1010lt, &akm_delta1010lt_priv, ice); 746 break; 747 case ICE1712_SUBDEVICE_DELTA66: 748 case ICE1712_SUBDEVICE_DELTA44: 749 err = snd_ice1712_akm4xxx_init(ak, &akm_delta44, &akm_delta44_priv, ice); 750 break; 751 case ICE1712_SUBDEVICE_VX442: 752 err = snd_ice1712_akm4xxx_init(ak, &akm_vx442, &akm_vx442_priv, ice); 753 break; 754 case ICE1712_SUBDEVICE_DELTA66E: 755 err = snd_ice1712_akm4xxx_init(ak, &akm_delta66e, &akm_delta66e_priv, ice); 756 break; 757 default: 758 snd_BUG(); 759 return -EINVAL; 760 } 761 762 return err; 763} 764 765 766/* 767 * additional controls for M-Audio cards 768 */ 769 770static struct snd_kcontrol_new snd_ice1712_delta1010_wordclock_select = 771ICE1712_GPIO(SNDRV_CTL_ELEM_IFACE_MIXER, "Word Clock Sync", 0, ICE1712_DELTA_WORD_CLOCK_SELECT, 1, 0); 772static struct snd_kcontrol_new snd_ice1712_delta1010lt_wordclock_select = 773ICE1712_GPIO(SNDRV_CTL_ELEM_IFACE_MIXER, "Word Clock Sync", 0, ICE1712_DELTA_1010LT_WORDCLOCK, 0, 0); 774static struct snd_kcontrol_new snd_ice1712_delta1010_wordclock_status = 775ICE1712_GPIO(SNDRV_CTL_ELEM_IFACE_MIXER, "Word Clock Status", 0, ICE1712_DELTA_WORD_CLOCK_STATUS, 1, SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE); 776static struct snd_kcontrol_new snd_ice1712_deltadio2496_spdif_in_select = 777ICE1712_GPIO(SNDRV_CTL_ELEM_IFACE_MIXER, "IEC958 Input Optical", 0, ICE1712_DELTA_SPDIF_INPUT_SELECT, 0, 0); 778static struct snd_kcontrol_new snd_ice1712_delta_spdif_in_status = 779ICE1712_GPIO(SNDRV_CTL_ELEM_IFACE_MIXER, "Delta IEC958 Input Status", 0, ICE1712_DELTA_SPDIF_IN_STAT, 1, SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE); 780 781 782static int snd_ice1712_delta_add_controls(struct snd_ice1712 *ice) 783{ 784 int err; 785 786 /* 1010 and dio specific controls */ 787 switch (ice->eeprom.subvendor) { 788 case ICE1712_SUBDEVICE_DELTA1010: 789 case ICE1712_SUBDEVICE_MEDIASTATION: 790 err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_delta1010_wordclock_select, ice)); 791 if (err < 0) 792 return err; 793 err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_delta1010_wordclock_status, ice)); 794 if (err < 0) 795 return err; 796 break; 797 case ICE1712_SUBDEVICE_DELTADIO2496: 798 err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_deltadio2496_spdif_in_select, ice)); 799 if (err < 0) 800 return err; 801 break; 802 case ICE1712_SUBDEVICE_DELTA1010E: 803 case ICE1712_SUBDEVICE_DELTA1010LT: 804 err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_delta1010lt_wordclock_select, ice)); 805 if (err < 0) 806 return err; 807 err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_delta1010lt_wordclock_status, ice)); 808 if (err < 0) 809 return err; 810 break; 811 } 812 813 /* normal spdif controls */ 814 switch (ice->eeprom.subvendor) { 815 case ICE1712_SUBDEVICE_DELTA1010: 816 case ICE1712_SUBDEVICE_DELTADIO2496: 817 case ICE1712_SUBDEVICE_DELTA66: 818 case ICE1712_SUBDEVICE_MEDIASTATION: 819 err = snd_ice1712_spdif_build_controls(ice); 820 if (err < 0) 821 return err; 822 break; 823 } 824 825 /* spdif status in */ 826 switch (ice->eeprom.subvendor) { 827 case ICE1712_SUBDEVICE_DELTA1010: 828 case ICE1712_SUBDEVICE_DELTADIO2496: 829 case ICE1712_SUBDEVICE_DELTA66: 830 case ICE1712_SUBDEVICE_MEDIASTATION: 831 err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_delta_spdif_in_status, ice)); 832 if (err < 0) 833 return err; 834 break; 835 } 836 837 /* ak4524 controls */ 838 switch (ice->eeprom.subvendor) { 839 case ICE1712_SUBDEVICE_DELTA1010LT: 840 case ICE1712_SUBDEVICE_AUDIOPHILE: 841 case ICE1712_SUBDEVICE_DELTA410: 842 case ICE1712_SUBDEVICE_DELTA44: 843 case ICE1712_SUBDEVICE_DELTA66: 844 case ICE1712_SUBDEVICE_VX442: 845 case ICE1712_SUBDEVICE_DELTA66E: 846 case ICE1712_SUBDEVICE_EDIROLDA2496: 847 err = snd_ice1712_akm4xxx_build_controls(ice); 848 if (err < 0) 849 return err; 850 break; 851 } 852 853 return 0; 854} 855 856 857/* entry point */ 858struct snd_ice1712_card_info snd_ice1712_delta_cards[] = { 859 { 860 .subvendor = ICE1712_SUBDEVICE_DELTA1010, 861 .name = "M Audio Delta 1010", 862 .model = "delta1010", 863 .chip_init = snd_ice1712_delta_init, 864 .build_controls = snd_ice1712_delta_add_controls, 865 }, 866 { 867 .subvendor = ICE1712_SUBDEVICE_DELTADIO2496, 868 .name = "M Audio Delta DiO 2496", 869 .model = "dio2496", 870 .chip_init = snd_ice1712_delta_init, 871 .build_controls = snd_ice1712_delta_add_controls, 872 .no_mpu401 = 1, 873 }, 874 { 875 .subvendor = ICE1712_SUBDEVICE_DELTA66, 876 .name = "M Audio Delta 66", 877 .model = "delta66", 878 .chip_init = snd_ice1712_delta_init, 879 .build_controls = snd_ice1712_delta_add_controls, 880 .no_mpu401 = 1, 881 }, 882 { 883 .subvendor = ICE1712_SUBDEVICE_DELTA44, 884 .name = "M Audio Delta 44", 885 .model = "delta44", 886 .chip_init = snd_ice1712_delta_init, 887 .build_controls = snd_ice1712_delta_add_controls, 888 .no_mpu401 = 1, 889 }, 890 { 891 .subvendor = ICE1712_SUBDEVICE_AUDIOPHILE, 892 .name = "M Audio Audiophile 24/96", 893 .model = "audiophile", 894 .chip_init = snd_ice1712_delta_init, 895 .build_controls = snd_ice1712_delta_add_controls, 896 }, 897 { 898 .subvendor = ICE1712_SUBDEVICE_DELTA410, 899 .name = "M Audio Delta 410", 900 .model = "delta410", 901 .chip_init = snd_ice1712_delta_init, 902 .build_controls = snd_ice1712_delta_add_controls, 903 }, 904 { 905 .subvendor = ICE1712_SUBDEVICE_DELTA1010LT, 906 .name = "M Audio Delta 1010LT", 907 .model = "delta1010lt", 908 .chip_init = snd_ice1712_delta_init, 909 .build_controls = snd_ice1712_delta_add_controls, 910 }, 911 { 912 .subvendor = ICE1712_SUBDEVICE_VX442, 913 .name = "Digigram VX442", 914 .model = "vx442", 915 .chip_init = snd_ice1712_delta_init, 916 .build_controls = snd_ice1712_delta_add_controls, 917 .no_mpu401 = 1, 918 }, 919 { 920 .subvendor = ICE1712_SUBDEVICE_MEDIASTATION, 921 .name = "Lionstracs Mediastation", 922 .model = "mediastation", 923 .chip_init = snd_ice1712_delta_init, 924 .build_controls = snd_ice1712_delta_add_controls, 925 }, 926 { 927 .subvendor = ICE1712_SUBDEVICE_EDIROLDA2496, 928 .name = "Edirol DA2496", 929 .model = "da2496", 930 .chip_init = snd_ice1712_delta_init, 931 .build_controls = snd_ice1712_delta_add_controls, 932 }, 933 { } /* terminator */ 934}; 935