1 /*
2  * omap_wdt.c
3  *
4  * Watchdog driver for the TI OMAP 16xx & 24xx/34xx 32KHz (non-secure) watchdog
5  *
6  * Author: MontaVista Software, Inc.
7  *	 <gdavis@mvista.com> or <source@mvista.com>
8  *
9  * 2003 (c) MontaVista Software, Inc. This file is licensed under the
10  * terms of the GNU General Public License version 2. This program is
11  * licensed "as is" without any warranty of any kind, whether express
12  * or implied.
13  *
14  * History:
15  *
16  * 20030527: George G. Davis <gdavis@mvista.com>
17  *	Initially based on linux-2.4.19-rmk7-pxa1/drivers/char/sa1100_wdt.c
18  *	(c) Copyright 2000 Oleg Drokin <green@crimea.edu>
19  *	Based on SoftDog driver by Alan Cox <alan@lxorguk.ukuu.org.uk>
20  *
21  * Copyright (c) 2004 Texas Instruments.
22  *	1. Modified to support OMAP1610 32-KHz watchdog timer
23  *	2. Ported to 2.6 kernel
24  *
25  * Copyright (c) 2005 David Brownell
26  *	Use the driver model and standard identifiers; handle bigger timeouts.
27  */
28 
29 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
30 
31 #include <linux/module.h>
32 #include <linux/types.h>
33 #include <linux/kernel.h>
34 #include <linux/mm.h>
35 #include <linux/watchdog.h>
36 #include <linux/reboot.h>
37 #include <linux/err.h>
38 #include <linux/platform_device.h>
39 #include <linux/moduleparam.h>
40 #include <linux/io.h>
41 #include <linux/slab.h>
42 #include <linux/pm_runtime.h>
43 #include <linux/platform_data/omap-wd-timer.h>
44 
45 #include "omap_wdt.h"
46 
47 static bool nowayout = WATCHDOG_NOWAYOUT;
48 module_param(nowayout, bool, 0);
49 MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started "
50 	"(default=" __MODULE_STRING(WATCHDOG_NOWAYOUT) ")");
51 
52 static unsigned timer_margin;
53 module_param(timer_margin, uint, 0);
54 MODULE_PARM_DESC(timer_margin, "initial watchdog timeout (in seconds)");
55 
56 struct omap_wdt_dev {
57 	void __iomem    *base;          /* physical */
58 	struct device   *dev;
59 	bool		omap_wdt_users;
60 	int		wdt_trgr_pattern;
61 	struct mutex	lock;		/* to avoid races with PM */
62 };
63 
omap_wdt_reload(struct omap_wdt_dev * wdev)64 static void omap_wdt_reload(struct omap_wdt_dev *wdev)
65 {
66 	void __iomem    *base = wdev->base;
67 
68 	/* wait for posted write to complete */
69 	while ((readl_relaxed(base + OMAP_WATCHDOG_WPS)) & 0x08)
70 		cpu_relax();
71 
72 	wdev->wdt_trgr_pattern = ~wdev->wdt_trgr_pattern;
73 	writel_relaxed(wdev->wdt_trgr_pattern, (base + OMAP_WATCHDOG_TGR));
74 
75 	/* wait for posted write to complete */
76 	while ((readl_relaxed(base + OMAP_WATCHDOG_WPS)) & 0x08)
77 		cpu_relax();
78 	/* reloaded WCRR from WLDR */
79 }
80 
omap_wdt_enable(struct omap_wdt_dev * wdev)81 static void omap_wdt_enable(struct omap_wdt_dev *wdev)
82 {
83 	void __iomem *base = wdev->base;
84 
85 	/* Sequence to enable the watchdog */
86 	writel_relaxed(0xBBBB, base + OMAP_WATCHDOG_SPR);
87 	while ((readl_relaxed(base + OMAP_WATCHDOG_WPS)) & 0x10)
88 		cpu_relax();
89 
90 	writel_relaxed(0x4444, base + OMAP_WATCHDOG_SPR);
91 	while ((readl_relaxed(base + OMAP_WATCHDOG_WPS)) & 0x10)
92 		cpu_relax();
93 }
94 
omap_wdt_disable(struct omap_wdt_dev * wdev)95 static void omap_wdt_disable(struct omap_wdt_dev *wdev)
96 {
97 	void __iomem *base = wdev->base;
98 
99 	/* sequence required to disable watchdog */
100 	writel_relaxed(0xAAAA, base + OMAP_WATCHDOG_SPR);	/* TIMER_MODE */
101 	while (readl_relaxed(base + OMAP_WATCHDOG_WPS) & 0x10)
102 		cpu_relax();
103 
104 	writel_relaxed(0x5555, base + OMAP_WATCHDOG_SPR);	/* TIMER_MODE */
105 	while (readl_relaxed(base + OMAP_WATCHDOG_WPS) & 0x10)
106 		cpu_relax();
107 }
108 
omap_wdt_set_timer(struct omap_wdt_dev * wdev,unsigned int timeout)109 static void omap_wdt_set_timer(struct omap_wdt_dev *wdev,
110 				   unsigned int timeout)
111 {
112 	u32 pre_margin = GET_WLDR_VAL(timeout);
113 	void __iomem *base = wdev->base;
114 
115 	/* just count up at 32 KHz */
116 	while (readl_relaxed(base + OMAP_WATCHDOG_WPS) & 0x04)
117 		cpu_relax();
118 
119 	writel_relaxed(pre_margin, base + OMAP_WATCHDOG_LDR);
120 	while (readl_relaxed(base + OMAP_WATCHDOG_WPS) & 0x04)
121 		cpu_relax();
122 }
123 
omap_wdt_start(struct watchdog_device * wdog)124 static int omap_wdt_start(struct watchdog_device *wdog)
125 {
126 	struct omap_wdt_dev *wdev = watchdog_get_drvdata(wdog);
127 	void __iomem *base = wdev->base;
128 
129 	mutex_lock(&wdev->lock);
130 
131 	wdev->omap_wdt_users = true;
132 
133 	pm_runtime_get_sync(wdev->dev);
134 
135 	/*
136 	 * Make sure the watchdog is disabled. This is unfortunately required
137 	 * because writing to various registers with the watchdog running has no
138 	 * effect.
139 	 */
140 	omap_wdt_disable(wdev);
141 
142 	/* initialize prescaler */
143 	while (readl_relaxed(base + OMAP_WATCHDOG_WPS) & 0x01)
144 		cpu_relax();
145 
146 	writel_relaxed((1 << 5) | (PTV << 2), base + OMAP_WATCHDOG_CNTRL);
147 	while (readl_relaxed(base + OMAP_WATCHDOG_WPS) & 0x01)
148 		cpu_relax();
149 
150 	omap_wdt_set_timer(wdev, wdog->timeout);
151 	omap_wdt_reload(wdev); /* trigger loading of new timeout value */
152 	omap_wdt_enable(wdev);
153 
154 	mutex_unlock(&wdev->lock);
155 
156 	return 0;
157 }
158 
omap_wdt_stop(struct watchdog_device * wdog)159 static int omap_wdt_stop(struct watchdog_device *wdog)
160 {
161 	struct omap_wdt_dev *wdev = watchdog_get_drvdata(wdog);
162 
163 	mutex_lock(&wdev->lock);
164 	omap_wdt_disable(wdev);
165 	pm_runtime_put_sync(wdev->dev);
166 	wdev->omap_wdt_users = false;
167 	mutex_unlock(&wdev->lock);
168 	return 0;
169 }
170 
omap_wdt_ping(struct watchdog_device * wdog)171 static int omap_wdt_ping(struct watchdog_device *wdog)
172 {
173 	struct omap_wdt_dev *wdev = watchdog_get_drvdata(wdog);
174 
175 	mutex_lock(&wdev->lock);
176 	omap_wdt_reload(wdev);
177 	mutex_unlock(&wdev->lock);
178 
179 	return 0;
180 }
181 
omap_wdt_set_timeout(struct watchdog_device * wdog,unsigned int timeout)182 static int omap_wdt_set_timeout(struct watchdog_device *wdog,
183 				unsigned int timeout)
184 {
185 	struct omap_wdt_dev *wdev = watchdog_get_drvdata(wdog);
186 
187 	mutex_lock(&wdev->lock);
188 	omap_wdt_disable(wdev);
189 	omap_wdt_set_timer(wdev, timeout);
190 	omap_wdt_enable(wdev);
191 	omap_wdt_reload(wdev);
192 	wdog->timeout = timeout;
193 	mutex_unlock(&wdev->lock);
194 
195 	return 0;
196 }
197 
198 static const struct watchdog_info omap_wdt_info = {
199 	.options = WDIOF_SETTIMEOUT | WDIOF_MAGICCLOSE | WDIOF_KEEPALIVEPING,
200 	.identity = "OMAP Watchdog",
201 };
202 
203 static const struct watchdog_ops omap_wdt_ops = {
204 	.owner		= THIS_MODULE,
205 	.start		= omap_wdt_start,
206 	.stop		= omap_wdt_stop,
207 	.ping		= omap_wdt_ping,
208 	.set_timeout	= omap_wdt_set_timeout,
209 };
210 
omap_wdt_probe(struct platform_device * pdev)211 static int omap_wdt_probe(struct platform_device *pdev)
212 {
213 	struct omap_wd_timer_platform_data *pdata = dev_get_platdata(&pdev->dev);
214 	struct watchdog_device *omap_wdt;
215 	struct resource *res;
216 	struct omap_wdt_dev *wdev;
217 	u32 rs;
218 	int ret;
219 
220 	omap_wdt = devm_kzalloc(&pdev->dev, sizeof(*omap_wdt), GFP_KERNEL);
221 	if (!omap_wdt)
222 		return -ENOMEM;
223 
224 	wdev = devm_kzalloc(&pdev->dev, sizeof(*wdev), GFP_KERNEL);
225 	if (!wdev)
226 		return -ENOMEM;
227 
228 	wdev->omap_wdt_users	= false;
229 	wdev->dev		= &pdev->dev;
230 	wdev->wdt_trgr_pattern	= 0x1234;
231 	mutex_init(&wdev->lock);
232 
233 	/* reserve static register mappings */
234 	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
235 	wdev->base = devm_ioremap_resource(&pdev->dev, res);
236 	if (IS_ERR(wdev->base))
237 		return PTR_ERR(wdev->base);
238 
239 	omap_wdt->info	      = &omap_wdt_info;
240 	omap_wdt->ops	      = &omap_wdt_ops;
241 	omap_wdt->min_timeout = TIMER_MARGIN_MIN;
242 	omap_wdt->max_timeout = TIMER_MARGIN_MAX;
243 
244 	if (timer_margin >= TIMER_MARGIN_MIN &&
245 	    timer_margin <= TIMER_MARGIN_MAX)
246 		omap_wdt->timeout = timer_margin;
247 	else
248 		omap_wdt->timeout = TIMER_MARGIN_DEFAULT;
249 
250 	watchdog_set_drvdata(omap_wdt, wdev);
251 	watchdog_set_nowayout(omap_wdt, nowayout);
252 
253 	platform_set_drvdata(pdev, omap_wdt);
254 
255 	pm_runtime_enable(wdev->dev);
256 	pm_runtime_get_sync(wdev->dev);
257 
258 	if (pdata && pdata->read_reset_sources)
259 		rs = pdata->read_reset_sources();
260 	else
261 		rs = 0;
262 	omap_wdt->bootstatus = (rs & (1 << OMAP_MPU_WD_RST_SRC_ID_SHIFT)) ?
263 				WDIOF_CARDRESET : 0;
264 
265 	omap_wdt_disable(wdev);
266 
267 	ret = watchdog_register_device(omap_wdt);
268 	if (ret) {
269 		pm_runtime_disable(wdev->dev);
270 		return ret;
271 	}
272 
273 	pr_info("OMAP Watchdog Timer Rev 0x%02x: initial timeout %d sec\n",
274 		readl_relaxed(wdev->base + OMAP_WATCHDOG_REV) & 0xFF,
275 		omap_wdt->timeout);
276 
277 	pm_runtime_put_sync(wdev->dev);
278 
279 	return 0;
280 }
281 
omap_wdt_shutdown(struct platform_device * pdev)282 static void omap_wdt_shutdown(struct platform_device *pdev)
283 {
284 	struct watchdog_device *wdog = platform_get_drvdata(pdev);
285 	struct omap_wdt_dev *wdev = watchdog_get_drvdata(wdog);
286 
287 	mutex_lock(&wdev->lock);
288 	if (wdev->omap_wdt_users) {
289 		omap_wdt_disable(wdev);
290 		pm_runtime_put_sync(wdev->dev);
291 	}
292 	mutex_unlock(&wdev->lock);
293 }
294 
omap_wdt_remove(struct platform_device * pdev)295 static int omap_wdt_remove(struct platform_device *pdev)
296 {
297 	struct watchdog_device *wdog = platform_get_drvdata(pdev);
298 	struct omap_wdt_dev *wdev = watchdog_get_drvdata(wdog);
299 
300 	pm_runtime_disable(wdev->dev);
301 	watchdog_unregister_device(wdog);
302 
303 	return 0;
304 }
305 
306 #ifdef	CONFIG_PM
307 
308 /* REVISIT ... not clear this is the best way to handle system suspend; and
309  * it's very inappropriate for selective device suspend (e.g. suspending this
310  * through sysfs rather than by stopping the watchdog daemon).  Also, this
311  * may not play well enough with NOWAYOUT...
312  */
313 
omap_wdt_suspend(struct platform_device * pdev,pm_message_t state)314 static int omap_wdt_suspend(struct platform_device *pdev, pm_message_t state)
315 {
316 	struct watchdog_device *wdog = platform_get_drvdata(pdev);
317 	struct omap_wdt_dev *wdev = watchdog_get_drvdata(wdog);
318 
319 	mutex_lock(&wdev->lock);
320 	if (wdev->omap_wdt_users) {
321 		omap_wdt_disable(wdev);
322 		pm_runtime_put_sync(wdev->dev);
323 	}
324 	mutex_unlock(&wdev->lock);
325 
326 	return 0;
327 }
328 
omap_wdt_resume(struct platform_device * pdev)329 static int omap_wdt_resume(struct platform_device *pdev)
330 {
331 	struct watchdog_device *wdog = platform_get_drvdata(pdev);
332 	struct omap_wdt_dev *wdev = watchdog_get_drvdata(wdog);
333 
334 	mutex_lock(&wdev->lock);
335 	if (wdev->omap_wdt_users) {
336 		pm_runtime_get_sync(wdev->dev);
337 		omap_wdt_enable(wdev);
338 		omap_wdt_reload(wdev);
339 	}
340 	mutex_unlock(&wdev->lock);
341 
342 	return 0;
343 }
344 
345 #else
346 #define	omap_wdt_suspend	NULL
347 #define	omap_wdt_resume		NULL
348 #endif
349 
350 static const struct of_device_id omap_wdt_of_match[] = {
351 	{ .compatible = "ti,omap3-wdt", },
352 	{},
353 };
354 MODULE_DEVICE_TABLE(of, omap_wdt_of_match);
355 
356 static struct platform_driver omap_wdt_driver = {
357 	.probe		= omap_wdt_probe,
358 	.remove		= omap_wdt_remove,
359 	.shutdown	= omap_wdt_shutdown,
360 	.suspend	= omap_wdt_suspend,
361 	.resume		= omap_wdt_resume,
362 	.driver		= {
363 		.name	= "omap_wdt",
364 		.of_match_table = omap_wdt_of_match,
365 	},
366 };
367 
368 module_platform_driver(omap_wdt_driver);
369 
370 MODULE_AUTHOR("George G. Davis");
371 MODULE_LICENSE("GPL");
372 MODULE_ALIAS("platform:omap_wdt");
373