1/*
2 *	HP WatchDog Driver
3 *	based on
4 *
5 *	SoftDog	0.05:	A Software Watchdog Device
6 *
7 *	(c) Copyright 2007 Hewlett-Packard Development Company, L.P.
8 *	Thomas Mingarelli <thomas.mingarelli@hp.com>
9 *
10 *	This program is free software; you can redistribute it and/or
11 *	modify it under the terms of the GNU General Public License
12 *	version 2 as published by the Free Software Foundation
13 *
14 */
15
16#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
17
18#include <linux/device.h>
19#include <linux/fs.h>
20#include <linux/io.h>
21#include <linux/bitops.h>
22#include <linux/kernel.h>
23#include <linux/miscdevice.h>
24#include <linux/module.h>
25#include <linux/moduleparam.h>
26#include <linux/pci.h>
27#include <linux/pci_ids.h>
28#include <linux/types.h>
29#include <linux/uaccess.h>
30#include <linux/watchdog.h>
31#ifdef CONFIG_HPWDT_NMI_DECODING
32#include <linux/dmi.h>
33#include <linux/spinlock.h>
34#include <linux/nmi.h>
35#include <linux/kdebug.h>
36#include <linux/notifier.h>
37#include <asm/cacheflush.h>
38#endif /* CONFIG_HPWDT_NMI_DECODING */
39#include <asm/nmi.h>
40
41#define HPWDT_VERSION			"1.3.3"
42#define SECS_TO_TICKS(secs)		((secs) * 1000 / 128)
43#define TICKS_TO_SECS(ticks)		((ticks) * 128 / 1000)
44#define HPWDT_MAX_TIMER			TICKS_TO_SECS(65535)
45#define DEFAULT_MARGIN			30
46
47static unsigned int soft_margin = DEFAULT_MARGIN;	/* in seconds */
48static unsigned int reload;			/* the computed soft_margin */
49static bool nowayout = WATCHDOG_NOWAYOUT;
50static char expect_release;
51static unsigned long hpwdt_is_open;
52
53static void __iomem *pci_mem_addr;		/* the PCI-memory address */
54static unsigned long __iomem *hpwdt_timer_reg;
55static unsigned long __iomem *hpwdt_timer_con;
56
57static const struct pci_device_id hpwdt_devices[] = {
58	{ PCI_DEVICE(PCI_VENDOR_ID_COMPAQ, 0xB203) },	/* iLO2 */
59	{ PCI_DEVICE(PCI_VENDOR_ID_HP, 0x3306) },	/* iLO3 */
60	{0},			/* terminate list */
61};
62MODULE_DEVICE_TABLE(pci, hpwdt_devices);
63
64#ifdef CONFIG_HPWDT_NMI_DECODING
65#define PCI_BIOS32_SD_VALUE		0x5F32335F	/* "_32_" */
66#define CRU_BIOS_SIGNATURE_VALUE	0x55524324
67#define PCI_BIOS32_PARAGRAPH_LEN	16
68#define PCI_ROM_BASE1			0x000F0000
69#define ROM_SIZE			0x10000
70
71struct bios32_service_dir {
72	u32 signature;
73	u32 entry_point;
74	u8 revision;
75	u8 length;
76	u8 checksum;
77	u8 reserved[5];
78};
79
80/* type 212 */
81struct smbios_cru64_info {
82	u8 type;
83	u8 byte_length;
84	u16 handle;
85	u32 signature;
86	u64 physical_address;
87	u32 double_length;
88	u32 double_offset;
89};
90#define SMBIOS_CRU64_INFORMATION	212
91
92/* type 219 */
93struct smbios_proliant_info {
94	u8 type;
95	u8 byte_length;
96	u16 handle;
97	u32 power_features;
98	u32 omega_features;
99	u32 reserved;
100	u32 misc_features;
101};
102#define SMBIOS_ICRU_INFORMATION		219
103
104
105struct cmn_registers {
106	union {
107		struct {
108			u8 ral;
109			u8 rah;
110			u16 rea2;
111		};
112		u32 reax;
113	} u1;
114	union {
115		struct {
116			u8 rbl;
117			u8 rbh;
118			u8 reb2l;
119			u8 reb2h;
120		};
121		u32 rebx;
122	} u2;
123	union {
124		struct {
125			u8 rcl;
126			u8 rch;
127			u16 rec2;
128		};
129		u32 recx;
130	} u3;
131	union {
132		struct {
133			u8 rdl;
134			u8 rdh;
135			u16 red2;
136		};
137		u32 redx;
138	} u4;
139
140	u32 resi;
141	u32 redi;
142	u16 rds;
143	u16 res;
144	u32 reflags;
145}  __attribute__((packed));
146
147static unsigned int hpwdt_nmi_decoding;
148static unsigned int allow_kdump = 1;
149static unsigned int is_icru;
150static unsigned int is_uefi;
151static DEFINE_SPINLOCK(rom_lock);
152static void *cru_rom_addr;
153static struct cmn_registers cmn_regs;
154
155extern asmlinkage void asminline_call(struct cmn_registers *pi86Regs,
156						unsigned long *pRomEntry);
157
158#ifdef CONFIG_X86_32
159/* --32 Bit Bios------------------------------------------------------------ */
160
161#define HPWDT_ARCH	32
162
163asm(".text                          \n\t"
164    ".align 4                       \n\t"
165    ".globl asminline_call	    \n"
166    "asminline_call:                \n\t"
167    "pushl       %ebp               \n\t"
168    "movl        %esp, %ebp         \n\t"
169    "pusha                          \n\t"
170    "pushf                          \n\t"
171    "push        %es                \n\t"
172    "push        %ds                \n\t"
173    "pop         %es                \n\t"
174    "movl        8(%ebp),%eax       \n\t"
175    "movl        4(%eax),%ebx       \n\t"
176    "movl        8(%eax),%ecx       \n\t"
177    "movl        12(%eax),%edx      \n\t"
178    "movl        16(%eax),%esi      \n\t"
179    "movl        20(%eax),%edi      \n\t"
180    "movl        (%eax),%eax        \n\t"
181    "push        %cs                \n\t"
182    "call        *12(%ebp)          \n\t"
183    "pushf                          \n\t"
184    "pushl       %eax               \n\t"
185    "movl        8(%ebp),%eax       \n\t"
186    "movl        %ebx,4(%eax)       \n\t"
187    "movl        %ecx,8(%eax)       \n\t"
188    "movl        %edx,12(%eax)      \n\t"
189    "movl        %esi,16(%eax)      \n\t"
190    "movl        %edi,20(%eax)      \n\t"
191    "movw        %ds,24(%eax)       \n\t"
192    "movw        %es,26(%eax)       \n\t"
193    "popl        %ebx               \n\t"
194    "movl        %ebx,(%eax)        \n\t"
195    "popl        %ebx               \n\t"
196    "movl        %ebx,28(%eax)      \n\t"
197    "pop         %es                \n\t"
198    "popf                           \n\t"
199    "popa                           \n\t"
200    "leave                          \n\t"
201    "ret                            \n\t"
202    ".previous");
203
204
205/*
206 *	cru_detect
207 *
208 *	Routine Description:
209 *	This function uses the 32-bit BIOS Service Directory record to
210 *	search for a $CRU record.
211 *
212 *	Return Value:
213 *	0        :  SUCCESS
214 *	<0       :  FAILURE
215 */
216static int cru_detect(unsigned long map_entry,
217	unsigned long map_offset)
218{
219	void *bios32_map;
220	unsigned long *bios32_entrypoint;
221	unsigned long cru_physical_address;
222	unsigned long cru_length;
223	unsigned long physical_bios_base = 0;
224	unsigned long physical_bios_offset = 0;
225	int retval = -ENODEV;
226
227	bios32_map = ioremap(map_entry, (2 * PAGE_SIZE));
228
229	if (bios32_map == NULL)
230		return -ENODEV;
231
232	bios32_entrypoint = bios32_map + map_offset;
233
234	cmn_regs.u1.reax = CRU_BIOS_SIGNATURE_VALUE;
235
236	set_memory_x((unsigned long)bios32_map, 2);
237	asminline_call(&cmn_regs, bios32_entrypoint);
238
239	if (cmn_regs.u1.ral != 0) {
240		pr_warn("Call succeeded but with an error: 0x%x\n",
241			cmn_regs.u1.ral);
242	} else {
243		physical_bios_base = cmn_regs.u2.rebx;
244		physical_bios_offset = cmn_regs.u4.redx;
245		cru_length = cmn_regs.u3.recx;
246		cru_physical_address =
247			physical_bios_base + physical_bios_offset;
248
249		/* If the values look OK, then map it in. */
250		if ((physical_bios_base + physical_bios_offset)) {
251			cru_rom_addr =
252				ioremap(cru_physical_address, cru_length);
253			if (cru_rom_addr) {
254				set_memory_x((unsigned long)cru_rom_addr & PAGE_MASK,
255					(cru_length + PAGE_SIZE - 1) >> PAGE_SHIFT);
256				retval = 0;
257			}
258		}
259
260		pr_debug("CRU Base Address:   0x%lx\n", physical_bios_base);
261		pr_debug("CRU Offset Address: 0x%lx\n", physical_bios_offset);
262		pr_debug("CRU Length:         0x%lx\n", cru_length);
263		pr_debug("CRU Mapped Address: %p\n", &cru_rom_addr);
264	}
265	iounmap(bios32_map);
266	return retval;
267}
268
269/*
270 *	bios_checksum
271 */
272static int bios_checksum(const char __iomem *ptr, int len)
273{
274	char sum = 0;
275	int i;
276
277	/*
278	 * calculate checksum of size bytes. This should add up
279	 * to zero if we have a valid header.
280	 */
281	for (i = 0; i < len; i++)
282		sum += ptr[i];
283
284	return ((sum == 0) && (len > 0));
285}
286
287/*
288 *	bios32_present
289 *
290 *	Routine Description:
291 *	This function finds the 32-bit BIOS Service Directory
292 *
293 *	Return Value:
294 *	0        :  SUCCESS
295 *	<0       :  FAILURE
296 */
297static int bios32_present(const char __iomem *p)
298{
299	struct bios32_service_dir *bios_32_ptr;
300	int length;
301	unsigned long map_entry, map_offset;
302
303	bios_32_ptr = (struct bios32_service_dir *) p;
304
305	/*
306	 * Search for signature by checking equal to the swizzled value
307	 * instead of calling another routine to perform a strcmp.
308	 */
309	if (bios_32_ptr->signature == PCI_BIOS32_SD_VALUE) {
310		length = bios_32_ptr->length * PCI_BIOS32_PARAGRAPH_LEN;
311		if (bios_checksum(p, length)) {
312			/*
313			 * According to the spec, we're looking for the
314			 * first 4KB-aligned address below the entrypoint
315			 * listed in the header. The Service Directory code
316			 * is guaranteed to occupy no more than 2 4KB pages.
317			 */
318			map_entry = bios_32_ptr->entry_point & ~(PAGE_SIZE - 1);
319			map_offset = bios_32_ptr->entry_point - map_entry;
320
321			return cru_detect(map_entry, map_offset);
322		}
323	}
324	return -ENODEV;
325}
326
327static int detect_cru_service(void)
328{
329	char __iomem *p, *q;
330	int rc = -1;
331
332	/*
333	 * Search from 0x0f0000 through 0x0fffff, inclusive.
334	 */
335	p = ioremap(PCI_ROM_BASE1, ROM_SIZE);
336	if (p == NULL)
337		return -ENOMEM;
338
339	for (q = p; q < p + ROM_SIZE; q += 16) {
340		rc = bios32_present(q);
341		if (!rc)
342			break;
343	}
344	iounmap(p);
345	return rc;
346}
347/* ------------------------------------------------------------------------- */
348#endif /* CONFIG_X86_32 */
349#ifdef CONFIG_X86_64
350/* --64 Bit Bios------------------------------------------------------------ */
351
352#define HPWDT_ARCH	64
353
354asm(".text                      \n\t"
355    ".align 4                   \n\t"
356    ".globl asminline_call	\n"
357    "asminline_call:            \n\t"
358    "pushq      %rbp            \n\t"
359    "movq       %rsp, %rbp      \n\t"
360    "pushq      %rax            \n\t"
361    "pushq      %rbx            \n\t"
362    "pushq      %rdx            \n\t"
363    "pushq      %r12            \n\t"
364    "pushq      %r9             \n\t"
365    "movq       %rsi, %r12      \n\t"
366    "movq       %rdi, %r9       \n\t"
367    "movl       4(%r9),%ebx     \n\t"
368    "movl       8(%r9),%ecx     \n\t"
369    "movl       12(%r9),%edx    \n\t"
370    "movl       16(%r9),%esi    \n\t"
371    "movl       20(%r9),%edi    \n\t"
372    "movl       (%r9),%eax      \n\t"
373    "call       *%r12           \n\t"
374    "pushfq                     \n\t"
375    "popq        %r12           \n\t"
376    "movl       %eax, (%r9)     \n\t"
377    "movl       %ebx, 4(%r9)    \n\t"
378    "movl       %ecx, 8(%r9)    \n\t"
379    "movl       %edx, 12(%r9)   \n\t"
380    "movl       %esi, 16(%r9)   \n\t"
381    "movl       %edi, 20(%r9)   \n\t"
382    "movq       %r12, %rax      \n\t"
383    "movl       %eax, 28(%r9)   \n\t"
384    "popq       %r9             \n\t"
385    "popq       %r12            \n\t"
386    "popq       %rdx            \n\t"
387    "popq       %rbx            \n\t"
388    "popq       %rax            \n\t"
389    "leave                      \n\t"
390    "ret                        \n\t"
391    ".previous");
392
393/*
394 *	dmi_find_cru
395 *
396 *	Routine Description:
397 *	This function checks whether or not a SMBIOS/DMI record is
398 *	the 64bit CRU info or not
399 */
400static void dmi_find_cru(const struct dmi_header *dm, void *dummy)
401{
402	struct smbios_cru64_info *smbios_cru64_ptr;
403	unsigned long cru_physical_address;
404
405	if (dm->type == SMBIOS_CRU64_INFORMATION) {
406		smbios_cru64_ptr = (struct smbios_cru64_info *) dm;
407		if (smbios_cru64_ptr->signature == CRU_BIOS_SIGNATURE_VALUE) {
408			cru_physical_address =
409				smbios_cru64_ptr->physical_address +
410				smbios_cru64_ptr->double_offset;
411			cru_rom_addr = ioremap(cru_physical_address,
412				smbios_cru64_ptr->double_length);
413			set_memory_x((unsigned long)cru_rom_addr & PAGE_MASK,
414				smbios_cru64_ptr->double_length >> PAGE_SHIFT);
415		}
416	}
417}
418
419static int detect_cru_service(void)
420{
421	cru_rom_addr = NULL;
422
423	dmi_walk(dmi_find_cru, NULL);
424
425	/* if cru_rom_addr has been set then we found a CRU service */
426	return ((cru_rom_addr != NULL) ? 0 : -ENODEV);
427}
428/* ------------------------------------------------------------------------- */
429#endif /* CONFIG_X86_64 */
430#endif /* CONFIG_HPWDT_NMI_DECODING */
431
432/*
433 *	Watchdog operations
434 */
435static void hpwdt_start(void)
436{
437	reload = SECS_TO_TICKS(soft_margin);
438	iowrite16(reload, hpwdt_timer_reg);
439	iowrite8(0x85, hpwdt_timer_con);
440}
441
442static void hpwdt_stop(void)
443{
444	unsigned long data;
445
446	data = ioread8(hpwdt_timer_con);
447	data &= 0xFE;
448	iowrite8(data, hpwdt_timer_con);
449}
450
451static void hpwdt_ping(void)
452{
453	iowrite16(reload, hpwdt_timer_reg);
454}
455
456static int hpwdt_change_timer(int new_margin)
457{
458	if (new_margin < 1 || new_margin > HPWDT_MAX_TIMER) {
459		pr_warn("New value passed in is invalid: %d seconds\n",
460			new_margin);
461		return -EINVAL;
462	}
463
464	soft_margin = new_margin;
465	pr_debug("New timer passed in is %d seconds\n", new_margin);
466	reload = SECS_TO_TICKS(soft_margin);
467
468	return 0;
469}
470
471static int hpwdt_time_left(void)
472{
473	return TICKS_TO_SECS(ioread16(hpwdt_timer_reg));
474}
475
476#ifdef CONFIG_HPWDT_NMI_DECODING
477/*
478 *	NMI Handler
479 */
480static int hpwdt_pretimeout(unsigned int ulReason, struct pt_regs *regs)
481{
482	unsigned long rom_pl;
483	static int die_nmi_called;
484
485	if (!hpwdt_nmi_decoding)
486		goto out;
487
488	spin_lock_irqsave(&rom_lock, rom_pl);
489	if (!die_nmi_called && !is_icru && !is_uefi)
490		asminline_call(&cmn_regs, cru_rom_addr);
491	die_nmi_called = 1;
492	spin_unlock_irqrestore(&rom_lock, rom_pl);
493
494	if (allow_kdump)
495		hpwdt_stop();
496
497	if (!is_icru && !is_uefi) {
498		if (cmn_regs.u1.ral == 0) {
499			panic("An NMI occurred, "
500				"but unable to determine source.\n");
501		}
502	}
503	panic("An NMI occurred. Depending on your system the reason "
504		"for the NMI is logged in any one of the following "
505		"resources:\n"
506		"1. Integrated Management Log (IML)\n"
507		"2. OA Syslog\n"
508		"3. OA Forward Progress Log\n"
509		"4. iLO Event Log");
510
511out:
512	return NMI_DONE;
513}
514#endif /* CONFIG_HPWDT_NMI_DECODING */
515
516/*
517 *	/dev/watchdog handling
518 */
519static int hpwdt_open(struct inode *inode, struct file *file)
520{
521	/* /dev/watchdog can only be opened once */
522	if (test_and_set_bit(0, &hpwdt_is_open))
523		return -EBUSY;
524
525	/* Start the watchdog */
526	hpwdt_start();
527	hpwdt_ping();
528
529	return nonseekable_open(inode, file);
530}
531
532static int hpwdt_release(struct inode *inode, struct file *file)
533{
534	/* Stop the watchdog */
535	if (expect_release == 42) {
536		hpwdt_stop();
537	} else {
538		pr_crit("Unexpected close, not stopping watchdog!\n");
539		hpwdt_ping();
540	}
541
542	expect_release = 0;
543
544	/* /dev/watchdog is being closed, make sure it can be re-opened */
545	clear_bit(0, &hpwdt_is_open);
546
547	return 0;
548}
549
550static ssize_t hpwdt_write(struct file *file, const char __user *data,
551	size_t len, loff_t *ppos)
552{
553	/* See if we got the magic character 'V' and reload the timer */
554	if (len) {
555		if (!nowayout) {
556			size_t i;
557
558			/* note: just in case someone wrote the magic character
559			 * five months ago... */
560			expect_release = 0;
561
562			/* scan to see whether or not we got the magic char. */
563			for (i = 0; i != len; i++) {
564				char c;
565				if (get_user(c, data + i))
566					return -EFAULT;
567				if (c == 'V')
568					expect_release = 42;
569			}
570		}
571
572		/* someone wrote to us, we should reload the timer */
573		hpwdt_ping();
574	}
575
576	return len;
577}
578
579static const struct watchdog_info ident = {
580	.options = WDIOF_SETTIMEOUT |
581		   WDIOF_KEEPALIVEPING |
582		   WDIOF_MAGICCLOSE,
583	.identity = "HP iLO2+ HW Watchdog Timer",
584};
585
586static long hpwdt_ioctl(struct file *file, unsigned int cmd,
587	unsigned long arg)
588{
589	void __user *argp = (void __user *)arg;
590	int __user *p = argp;
591	int new_margin;
592	int ret = -ENOTTY;
593
594	switch (cmd) {
595	case WDIOC_GETSUPPORT:
596		ret = 0;
597		if (copy_to_user(argp, &ident, sizeof(ident)))
598			ret = -EFAULT;
599		break;
600
601	case WDIOC_GETSTATUS:
602	case WDIOC_GETBOOTSTATUS:
603		ret = put_user(0, p);
604		break;
605
606	case WDIOC_KEEPALIVE:
607		hpwdt_ping();
608		ret = 0;
609		break;
610
611	case WDIOC_SETTIMEOUT:
612		ret = get_user(new_margin, p);
613		if (ret)
614			break;
615
616		ret = hpwdt_change_timer(new_margin);
617		if (ret)
618			break;
619
620		hpwdt_ping();
621		/* Fall */
622	case WDIOC_GETTIMEOUT:
623		ret = put_user(soft_margin, p);
624		break;
625
626	case WDIOC_GETTIMELEFT:
627		ret = put_user(hpwdt_time_left(), p);
628		break;
629	}
630	return ret;
631}
632
633/*
634 *	Kernel interfaces
635 */
636static const struct file_operations hpwdt_fops = {
637	.owner = THIS_MODULE,
638	.llseek = no_llseek,
639	.write = hpwdt_write,
640	.unlocked_ioctl = hpwdt_ioctl,
641	.open = hpwdt_open,
642	.release = hpwdt_release,
643};
644
645static struct miscdevice hpwdt_miscdev = {
646	.minor = WATCHDOG_MINOR,
647	.name = "watchdog",
648	.fops = &hpwdt_fops,
649};
650
651/*
652 *	Init & Exit
653 */
654
655#ifdef CONFIG_HPWDT_NMI_DECODING
656#ifdef CONFIG_X86_LOCAL_APIC
657static void hpwdt_check_nmi_decoding(struct pci_dev *dev)
658{
659	/*
660	 * If nmi_watchdog is turned off then we can turn on
661	 * our nmi decoding capability.
662	 */
663	hpwdt_nmi_decoding = 1;
664}
665#else
666static void hpwdt_check_nmi_decoding(struct pci_dev *dev)
667{
668	dev_warn(&dev->dev, "NMI decoding is disabled. "
669		"Your kernel does not support a NMI Watchdog.\n");
670}
671#endif /* CONFIG_X86_LOCAL_APIC */
672
673/*
674 *	dmi_find_icru
675 *
676 *	Routine Description:
677 *	This function checks whether or not we are on an iCRU-based server.
678 *	This check is independent of architecture and needs to be made for
679 *	any ProLiant system.
680 */
681static void dmi_find_icru(const struct dmi_header *dm, void *dummy)
682{
683	struct smbios_proliant_info *smbios_proliant_ptr;
684
685	if (dm->type == SMBIOS_ICRU_INFORMATION) {
686		smbios_proliant_ptr = (struct smbios_proliant_info *) dm;
687		if (smbios_proliant_ptr->misc_features & 0x01)
688			is_icru = 1;
689		if (smbios_proliant_ptr->misc_features & 0x408)
690			is_uefi = 1;
691	}
692}
693
694static int hpwdt_init_nmi_decoding(struct pci_dev *dev)
695{
696	int retval;
697
698	/*
699	 * On typical CRU-based systems we need to map that service in
700	 * the BIOS. For 32 bit Operating Systems we need to go through
701	 * the 32 Bit BIOS Service Directory. For 64 bit Operating
702	 * Systems we get that service through SMBIOS.
703	 *
704	 * On systems that support the new iCRU service all we need to
705	 * do is call dmi_walk to get the supported flag value and skip
706	 * the old cru detect code.
707	 */
708	dmi_walk(dmi_find_icru, NULL);
709	if (!is_icru && !is_uefi) {
710
711		/*
712		* We need to map the ROM to get the CRU service.
713		* For 32 bit Operating Systems we need to go through the 32 Bit
714		* BIOS Service Directory
715		* For 64 bit Operating Systems we get that service through SMBIOS.
716		*/
717		retval = detect_cru_service();
718		if (retval < 0) {
719			dev_warn(&dev->dev,
720				"Unable to detect the %d Bit CRU Service.\n",
721				HPWDT_ARCH);
722			return retval;
723		}
724
725		/*
726		* We know this is the only CRU call we need to make so lets keep as
727		* few instructions as possible once the NMI comes in.
728		*/
729		cmn_regs.u1.rah = 0x0D;
730		cmn_regs.u1.ral = 0x02;
731	}
732
733	/*
734	 * Only one function can register for NMI_UNKNOWN
735	 */
736	retval = register_nmi_handler(NMI_UNKNOWN, hpwdt_pretimeout, 0, "hpwdt");
737	if (retval)
738		goto error;
739	retval = register_nmi_handler(NMI_SERR, hpwdt_pretimeout, 0, "hpwdt");
740	if (retval)
741		goto error1;
742	retval = register_nmi_handler(NMI_IO_CHECK, hpwdt_pretimeout, 0, "hpwdt");
743	if (retval)
744		goto error2;
745
746	dev_info(&dev->dev,
747			"HP Watchdog Timer Driver: NMI decoding initialized"
748			", allow kernel dump: %s (default = 1/ON)\n",
749			(allow_kdump == 0) ? "OFF" : "ON");
750	return 0;
751
752error2:
753	unregister_nmi_handler(NMI_SERR, "hpwdt");
754error1:
755	unregister_nmi_handler(NMI_UNKNOWN, "hpwdt");
756error:
757	dev_warn(&dev->dev,
758		"Unable to register a die notifier (err=%d).\n",
759		retval);
760	if (cru_rom_addr)
761		iounmap(cru_rom_addr);
762	return retval;
763}
764
765static void hpwdt_exit_nmi_decoding(void)
766{
767	unregister_nmi_handler(NMI_UNKNOWN, "hpwdt");
768	unregister_nmi_handler(NMI_SERR, "hpwdt");
769	unregister_nmi_handler(NMI_IO_CHECK, "hpwdt");
770	if (cru_rom_addr)
771		iounmap(cru_rom_addr);
772}
773#else /* !CONFIG_HPWDT_NMI_DECODING */
774static void hpwdt_check_nmi_decoding(struct pci_dev *dev)
775{
776}
777
778static int hpwdt_init_nmi_decoding(struct pci_dev *dev)
779{
780	return 0;
781}
782
783static void hpwdt_exit_nmi_decoding(void)
784{
785}
786#endif /* CONFIG_HPWDT_NMI_DECODING */
787
788static int hpwdt_init_one(struct pci_dev *dev,
789					const struct pci_device_id *ent)
790{
791	int retval;
792
793	/*
794	 * Check if we can do NMI decoding or not
795	 */
796	hpwdt_check_nmi_decoding(dev);
797
798	/*
799	 * First let's find out if we are on an iLO2+ server. We will
800	 * not run on a legacy ASM box.
801	 * So we only support the G5 ProLiant servers and higher.
802	 */
803	if (dev->subsystem_vendor != PCI_VENDOR_ID_HP) {
804		dev_warn(&dev->dev,
805			"This server does not have an iLO2+ ASIC.\n");
806		return -ENODEV;
807	}
808
809	/*
810	 * Ignore all auxilary iLO devices with the following PCI ID
811	 */
812	if (dev->subsystem_device == 0x1979)
813		return -ENODEV;
814
815	if (pci_enable_device(dev)) {
816		dev_warn(&dev->dev,
817			"Not possible to enable PCI Device: 0x%x:0x%x.\n",
818			ent->vendor, ent->device);
819		return -ENODEV;
820	}
821
822	pci_mem_addr = pci_iomap(dev, 1, 0x80);
823	if (!pci_mem_addr) {
824		dev_warn(&dev->dev,
825			"Unable to detect the iLO2+ server memory.\n");
826		retval = -ENOMEM;
827		goto error_pci_iomap;
828	}
829	hpwdt_timer_reg = pci_mem_addr + 0x70;
830	hpwdt_timer_con = pci_mem_addr + 0x72;
831
832	/* Make sure that timer is disabled until /dev/watchdog is opened */
833	hpwdt_stop();
834
835	/* Make sure that we have a valid soft_margin */
836	if (hpwdt_change_timer(soft_margin))
837		hpwdt_change_timer(DEFAULT_MARGIN);
838
839	/* Initialize NMI Decoding functionality */
840	retval = hpwdt_init_nmi_decoding(dev);
841	if (retval != 0)
842		goto error_init_nmi_decoding;
843
844	retval = misc_register(&hpwdt_miscdev);
845	if (retval < 0) {
846		dev_warn(&dev->dev,
847			"Unable to register miscdev on minor=%d (err=%d).\n",
848			WATCHDOG_MINOR, retval);
849		goto error_misc_register;
850	}
851
852	dev_info(&dev->dev, "HP Watchdog Timer Driver: %s"
853			", timer margin: %d seconds (nowayout=%d).\n",
854			HPWDT_VERSION, soft_margin, nowayout);
855	return 0;
856
857error_misc_register:
858	hpwdt_exit_nmi_decoding();
859error_init_nmi_decoding:
860	pci_iounmap(dev, pci_mem_addr);
861error_pci_iomap:
862	pci_disable_device(dev);
863	return retval;
864}
865
866static void hpwdt_exit(struct pci_dev *dev)
867{
868	if (!nowayout)
869		hpwdt_stop();
870
871	misc_deregister(&hpwdt_miscdev);
872	hpwdt_exit_nmi_decoding();
873	pci_iounmap(dev, pci_mem_addr);
874	pci_disable_device(dev);
875}
876
877static struct pci_driver hpwdt_driver = {
878	.name = "hpwdt",
879	.id_table = hpwdt_devices,
880	.probe = hpwdt_init_one,
881	.remove = hpwdt_exit,
882};
883
884MODULE_AUTHOR("Tom Mingarelli");
885MODULE_DESCRIPTION("hp watchdog driver");
886MODULE_LICENSE("GPL");
887MODULE_VERSION(HPWDT_VERSION);
888
889module_param(soft_margin, int, 0);
890MODULE_PARM_DESC(soft_margin, "Watchdog timeout in seconds");
891
892module_param(nowayout, bool, 0);
893MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started (default="
894		__MODULE_STRING(WATCHDOG_NOWAYOUT) ")");
895
896#ifdef CONFIG_HPWDT_NMI_DECODING
897module_param(allow_kdump, int, 0);
898MODULE_PARM_DESC(allow_kdump, "Start a kernel dump after NMI occurs");
899#endif /* !CONFIG_HPWDT_NMI_DECODING */
900
901module_pci_driver(hpwdt_driver);
902