1/* 2 * linux/drivers/video/sa1100fb.c 3 * 4 * Copyright (C) 1999 Eric A. Thomas 5 * Based on acornfb.c Copyright (C) Russell King. 6 * 7 * This file is subject to the terms and conditions of the GNU General Public 8 * License. See the file COPYING in the main directory of this archive for 9 * more details. 10 * 11 * StrongARM 1100 LCD Controller Frame Buffer Driver 12 * 13 * Please direct your questions and comments on this driver to the following 14 * email address: 15 * 16 * linux-arm-kernel@lists.arm.linux.org.uk 17 * 18 * Clean patches should be sent to the ARM Linux Patch System. Please see the 19 * following web page for more information: 20 * 21 * http://www.arm.linux.org.uk/developer/patches/info.shtml 22 * 23 * Thank you. 24 * 25 * Known problems: 26 * - With the Neponset plugged into an Assabet, LCD powerdown 27 * doesn't work (LCD stays powered up). Therefore we shouldn't 28 * blank the screen. 29 * - We don't limit the CPU clock rate nor the mode selection 30 * according to the available SDRAM bandwidth. 31 * 32 * Other notes: 33 * - Linear grayscale palettes and the kernel. 34 * Such code does not belong in the kernel. The kernel frame buffer 35 * drivers do not expect a linear colourmap, but a colourmap based on 36 * the VT100 standard mapping. 37 * 38 * If your _userspace_ requires a linear colourmap, then the setup of 39 * such a colourmap belongs _in userspace_, not in the kernel. Code 40 * to set the colourmap correctly from user space has been sent to 41 * David Neuer. It's around 8 lines of C code, plus another 4 to 42 * detect if we are using grayscale. 43 * 44 * - The following must never be specified in a panel definition: 45 * LCCR0_LtlEnd, LCCR3_PixClkDiv, LCCR3_VrtSnchL, LCCR3_HorSnchL 46 * 47 * - The following should be specified: 48 * either LCCR0_Color or LCCR0_Mono 49 * either LCCR0_Sngl or LCCR0_Dual 50 * either LCCR0_Act or LCCR0_Pas 51 * either LCCR3_OutEnH or LCCD3_OutEnL 52 * either LCCR3_PixRsEdg or LCCR3_PixFlEdg 53 * either LCCR3_ACBsDiv or LCCR3_ACBsCntOff 54 * 55 * Code Status: 56 * 1999/04/01: 57 * - Driver appears to be working for Brutus 320x200x8bpp mode. Other 58 * resolutions are working, but only the 8bpp mode is supported. 59 * Changes need to be made to the palette encode and decode routines 60 * to support 4 and 16 bpp modes. 61 * Driver is not designed to be a module. The FrameBuffer is statically 62 * allocated since dynamic allocation of a 300k buffer cannot be 63 * guaranteed. 64 * 65 * 1999/06/17: 66 * - FrameBuffer memory is now allocated at run-time when the 67 * driver is initialized. 68 * 69 * 2000/04/10: Nicolas Pitre <nico@fluxnic.net> 70 * - Big cleanup for dynamic selection of machine type at run time. 71 * 72 * 2000/07/19: Jamey Hicks <jamey@crl.dec.com> 73 * - Support for Bitsy aka Compaq iPAQ H3600 added. 74 * 75 * 2000/08/07: Tak-Shing Chan <tchan.rd@idthk.com> 76 * Jeff Sutherland <jsutherland@accelent.com> 77 * - Resolved an issue caused by a change made to the Assabet's PLD 78 * earlier this year which broke the framebuffer driver for newer 79 * Phase 4 Assabets. Some other parameters were changed to optimize 80 * for the Sharp display. 81 * 82 * 2000/08/09: Kunihiko IMAI <imai@vasara.co.jp> 83 * - XP860 support added 84 * 85 * 2000/08/19: Mark Huang <mhuang@livetoy.com> 86 * - Allows standard options to be passed on the kernel command line 87 * for most common passive displays. 88 * 89 * 2000/08/29: 90 * - s/save_flags_cli/local_irq_save/ 91 * - remove unneeded extra save_flags_cli in sa1100fb_enable_lcd_controller 92 * 93 * 2000/10/10: Erik Mouw <J.A.K.Mouw@its.tudelft.nl> 94 * - Updated LART stuff. Fixed some minor bugs. 95 * 96 * 2000/10/30: Murphy Chen <murphy@mail.dialogue.com.tw> 97 * - Pangolin support added 98 * 99 * 2000/10/31: Roman Jordan <jor@hoeft-wessel.de> 100 * - Huw Webpanel support added 101 * 102 * 2000/11/23: Eric Peng <ericpeng@coventive.com> 103 * - Freebird add 104 * 105 * 2001/02/07: Jamey Hicks <jamey.hicks@compaq.com> 106 * Cliff Brake <cbrake@accelent.com> 107 * - Added PM callback 108 * 109 * 2001/05/26: <rmk@arm.linux.org.uk> 110 * - Fix 16bpp so that (a) we use the right colours rather than some 111 * totally random colour depending on what was in page 0, and (b) 112 * we don't de-reference a NULL pointer. 113 * - remove duplicated implementation of consistent_alloc() 114 * - convert dma address types to dma_addr_t 115 * - remove unused 'montype' stuff 116 * - remove redundant zero inits of init_var after the initial 117 * memset. 118 * - remove allow_modeset (acornfb idea does not belong here) 119 * 120 * 2001/05/28: <rmk@arm.linux.org.uk> 121 * - massive cleanup - move machine dependent data into structures 122 * - I've left various #warnings in - if you see one, and know 123 * the hardware concerned, please get in contact with me. 124 * 125 * 2001/05/31: <rmk@arm.linux.org.uk> 126 * - Fix LCCR1 HSW value, fix all machine type specifications to 127 * keep values in line. (Please check your machine type specs) 128 * 129 * 2001/06/10: <rmk@arm.linux.org.uk> 130 * - Fiddle with the LCD controller from task context only; mainly 131 * so that we can run with interrupts on, and sleep. 132 * - Convert #warnings into #errors. No pain, no gain. ;) 133 * 134 * 2001/06/14: <rmk@arm.linux.org.uk> 135 * - Make the palette BPS value for 12bpp come out correctly. 136 * - Take notice of "greyscale" on any colour depth. 137 * - Make truecolor visuals use the RGB channel encoding information. 138 * 139 * 2001/07/02: <rmk@arm.linux.org.uk> 140 * - Fix colourmap problems. 141 * 142 * 2001/07/13: <abraham@2d3d.co.za> 143 * - Added support for the ICP LCD-Kit01 on LART. This LCD is 144 * manufactured by Prime View, model no V16C6448AB 145 * 146 * 2001/07/23: <rmk@arm.linux.org.uk> 147 * - Hand merge version from handhelds.org CVS tree. See patch 148 * notes for 595/1 for more information. 149 * - Drop 12bpp (it's 16bpp with different colour register mappings). 150 * - This hardware can not do direct colour. Therefore we don't 151 * support it. 152 * 153 * 2001/07/27: <rmk@arm.linux.org.uk> 154 * - Halve YRES on dual scan LCDs. 155 * 156 * 2001/08/22: <rmk@arm.linux.org.uk> 157 * - Add b/w iPAQ pixclock value. 158 * 159 * 2001/10/12: <rmk@arm.linux.org.uk> 160 * - Add patch 681/1 and clean up stork definitions. 161 */ 162 163#include <linux/module.h> 164#include <linux/kernel.h> 165#include <linux/sched.h> 166#include <linux/errno.h> 167#include <linux/string.h> 168#include <linux/interrupt.h> 169#include <linux/slab.h> 170#include <linux/mm.h> 171#include <linux/fb.h> 172#include <linux/delay.h> 173#include <linux/init.h> 174#include <linux/ioport.h> 175#include <linux/cpufreq.h> 176#include <linux/gpio.h> 177#include <linux/platform_device.h> 178#include <linux/dma-mapping.h> 179#include <linux/mutex.h> 180#include <linux/io.h> 181#include <linux/clk.h> 182 183#include <video/sa1100fb.h> 184 185#include <mach/hardware.h> 186#include <asm/mach-types.h> 187#include <mach/shannon.h> 188 189/* 190 * Complain if VAR is out of range. 191 */ 192#define DEBUG_VAR 1 193 194#include "sa1100fb.h" 195 196static const struct sa1100fb_rgb rgb_4 = { 197 .red = { .offset = 0, .length = 4, }, 198 .green = { .offset = 0, .length = 4, }, 199 .blue = { .offset = 0, .length = 4, }, 200 .transp = { .offset = 0, .length = 0, }, 201}; 202 203static const struct sa1100fb_rgb rgb_8 = { 204 .red = { .offset = 0, .length = 8, }, 205 .green = { .offset = 0, .length = 8, }, 206 .blue = { .offset = 0, .length = 8, }, 207 .transp = { .offset = 0, .length = 0, }, 208}; 209 210static const struct sa1100fb_rgb def_rgb_16 = { 211 .red = { .offset = 11, .length = 5, }, 212 .green = { .offset = 5, .length = 6, }, 213 .blue = { .offset = 0, .length = 5, }, 214 .transp = { .offset = 0, .length = 0, }, 215}; 216 217 218 219static int sa1100fb_activate_var(struct fb_var_screeninfo *var, struct sa1100fb_info *); 220static void set_ctrlr_state(struct sa1100fb_info *fbi, u_int state); 221 222static inline void sa1100fb_schedule_work(struct sa1100fb_info *fbi, u_int state) 223{ 224 unsigned long flags; 225 226 local_irq_save(flags); 227 /* 228 * We need to handle two requests being made at the same time. 229 * There are two important cases: 230 * 1. When we are changing VT (C_REENABLE) while unblanking (C_ENABLE) 231 * We must perform the unblanking, which will do our REENABLE for us. 232 * 2. When we are blanking, but immediately unblank before we have 233 * blanked. We do the "REENABLE" thing here as well, just to be sure. 234 */ 235 if (fbi->task_state == C_ENABLE && state == C_REENABLE) 236 state = (u_int) -1; 237 if (fbi->task_state == C_DISABLE && state == C_ENABLE) 238 state = C_REENABLE; 239 240 if (state != (u_int)-1) { 241 fbi->task_state = state; 242 schedule_work(&fbi->task); 243 } 244 local_irq_restore(flags); 245} 246 247static inline u_int chan_to_field(u_int chan, struct fb_bitfield *bf) 248{ 249 chan &= 0xffff; 250 chan >>= 16 - bf->length; 251 return chan << bf->offset; 252} 253 254/* 255 * Convert bits-per-pixel to a hardware palette PBS value. 256 */ 257static inline u_int palette_pbs(struct fb_var_screeninfo *var) 258{ 259 int ret = 0; 260 switch (var->bits_per_pixel) { 261 case 4: ret = 0 << 12; break; 262 case 8: ret = 1 << 12; break; 263 case 16: ret = 2 << 12; break; 264 } 265 return ret; 266} 267 268static int 269sa1100fb_setpalettereg(u_int regno, u_int red, u_int green, u_int blue, 270 u_int trans, struct fb_info *info) 271{ 272 struct sa1100fb_info *fbi = 273 container_of(info, struct sa1100fb_info, fb); 274 u_int val, ret = 1; 275 276 if (regno < fbi->palette_size) { 277 val = ((red >> 4) & 0xf00); 278 val |= ((green >> 8) & 0x0f0); 279 val |= ((blue >> 12) & 0x00f); 280 281 if (regno == 0) 282 val |= palette_pbs(&fbi->fb.var); 283 284 fbi->palette_cpu[regno] = val; 285 ret = 0; 286 } 287 return ret; 288} 289 290static int 291sa1100fb_setcolreg(u_int regno, u_int red, u_int green, u_int blue, 292 u_int trans, struct fb_info *info) 293{ 294 struct sa1100fb_info *fbi = 295 container_of(info, struct sa1100fb_info, fb); 296 unsigned int val; 297 int ret = 1; 298 299 /* 300 * If inverse mode was selected, invert all the colours 301 * rather than the register number. The register number 302 * is what you poke into the framebuffer to produce the 303 * colour you requested. 304 */ 305 if (fbi->inf->cmap_inverse) { 306 red = 0xffff - red; 307 green = 0xffff - green; 308 blue = 0xffff - blue; 309 } 310 311 /* 312 * If greyscale is true, then we convert the RGB value 313 * to greyscale no mater what visual we are using. 314 */ 315 if (fbi->fb.var.grayscale) 316 red = green = blue = (19595 * red + 38470 * green + 317 7471 * blue) >> 16; 318 319 switch (fbi->fb.fix.visual) { 320 case FB_VISUAL_TRUECOLOR: 321 /* 322 * 12 or 16-bit True Colour. We encode the RGB value 323 * according to the RGB bitfield information. 324 */ 325 if (regno < 16) { 326 u32 *pal = fbi->fb.pseudo_palette; 327 328 val = chan_to_field(red, &fbi->fb.var.red); 329 val |= chan_to_field(green, &fbi->fb.var.green); 330 val |= chan_to_field(blue, &fbi->fb.var.blue); 331 332 pal[regno] = val; 333 ret = 0; 334 } 335 break; 336 337 case FB_VISUAL_STATIC_PSEUDOCOLOR: 338 case FB_VISUAL_PSEUDOCOLOR: 339 ret = sa1100fb_setpalettereg(regno, red, green, blue, trans, info); 340 break; 341 } 342 343 return ret; 344} 345 346#ifdef CONFIG_CPU_FREQ 347/* 348 * sa1100fb_display_dma_period() 349 * Calculate the minimum period (in picoseconds) between two DMA 350 * requests for the LCD controller. If we hit this, it means we're 351 * doing nothing but LCD DMA. 352 */ 353static inline unsigned int sa1100fb_display_dma_period(struct fb_var_screeninfo *var) 354{ 355 /* 356 * Period = pixclock * bits_per_byte * bytes_per_transfer 357 * / memory_bits_per_pixel; 358 */ 359 return var->pixclock * 8 * 16 / var->bits_per_pixel; 360} 361#endif 362 363/* 364 * sa1100fb_check_var(): 365 * Round up in the following order: bits_per_pixel, xres, 366 * yres, xres_virtual, yres_virtual, xoffset, yoffset, grayscale, 367 * bitfields, horizontal timing, vertical timing. 368 */ 369static int 370sa1100fb_check_var(struct fb_var_screeninfo *var, struct fb_info *info) 371{ 372 struct sa1100fb_info *fbi = 373 container_of(info, struct sa1100fb_info, fb); 374 int rgbidx; 375 376 if (var->xres < MIN_XRES) 377 var->xres = MIN_XRES; 378 if (var->yres < MIN_YRES) 379 var->yres = MIN_YRES; 380 if (var->xres > fbi->inf->xres) 381 var->xres = fbi->inf->xres; 382 if (var->yres > fbi->inf->yres) 383 var->yres = fbi->inf->yres; 384 var->xres_virtual = max(var->xres_virtual, var->xres); 385 var->yres_virtual = max(var->yres_virtual, var->yres); 386 387 dev_dbg(fbi->dev, "var->bits_per_pixel=%d\n", var->bits_per_pixel); 388 switch (var->bits_per_pixel) { 389 case 4: 390 rgbidx = RGB_4; 391 break; 392 case 8: 393 rgbidx = RGB_8; 394 break; 395 case 16: 396 rgbidx = RGB_16; 397 break; 398 default: 399 return -EINVAL; 400 } 401 402 /* 403 * Copy the RGB parameters for this display 404 * from the machine specific parameters. 405 */ 406 var->red = fbi->rgb[rgbidx]->red; 407 var->green = fbi->rgb[rgbidx]->green; 408 var->blue = fbi->rgb[rgbidx]->blue; 409 var->transp = fbi->rgb[rgbidx]->transp; 410 411 dev_dbg(fbi->dev, "RGBT length = %d:%d:%d:%d\n", 412 var->red.length, var->green.length, var->blue.length, 413 var->transp.length); 414 415 dev_dbg(fbi->dev, "RGBT offset = %d:%d:%d:%d\n", 416 var->red.offset, var->green.offset, var->blue.offset, 417 var->transp.offset); 418 419#ifdef CONFIG_CPU_FREQ 420 dev_dbg(fbi->dev, "dma period = %d ps, clock = %ld kHz\n", 421 sa1100fb_display_dma_period(var), 422 clk_get_rate(fbi->clk) / 1000); 423#endif 424 425 return 0; 426} 427 428static void sa1100fb_set_visual(struct sa1100fb_info *fbi, u32 visual) 429{ 430 if (fbi->inf->set_visual) 431 fbi->inf->set_visual(visual); 432} 433 434/* 435 * sa1100fb_set_par(): 436 * Set the user defined part of the display for the specified console 437 */ 438static int sa1100fb_set_par(struct fb_info *info) 439{ 440 struct sa1100fb_info *fbi = 441 container_of(info, struct sa1100fb_info, fb); 442 struct fb_var_screeninfo *var = &info->var; 443 unsigned long palette_mem_size; 444 445 dev_dbg(fbi->dev, "set_par\n"); 446 447 if (var->bits_per_pixel == 16) 448 fbi->fb.fix.visual = FB_VISUAL_TRUECOLOR; 449 else if (!fbi->inf->cmap_static) 450 fbi->fb.fix.visual = FB_VISUAL_PSEUDOCOLOR; 451 else { 452 /* 453 * Some people have weird ideas about wanting static 454 * pseudocolor maps. I suspect their user space 455 * applications are broken. 456 */ 457 fbi->fb.fix.visual = FB_VISUAL_STATIC_PSEUDOCOLOR; 458 } 459 460 fbi->fb.fix.line_length = var->xres_virtual * 461 var->bits_per_pixel / 8; 462 fbi->palette_size = var->bits_per_pixel == 8 ? 256 : 16; 463 464 palette_mem_size = fbi->palette_size * sizeof(u16); 465 466 dev_dbg(fbi->dev, "palette_mem_size = 0x%08lx\n", palette_mem_size); 467 468 fbi->palette_cpu = (u16 *)(fbi->map_cpu + PAGE_SIZE - palette_mem_size); 469 fbi->palette_dma = fbi->map_dma + PAGE_SIZE - palette_mem_size; 470 471 /* 472 * Set (any) board control register to handle new color depth 473 */ 474 sa1100fb_set_visual(fbi, fbi->fb.fix.visual); 475 sa1100fb_activate_var(var, fbi); 476 477 return 0; 478} 479 480#if 0 481static int 482sa1100fb_set_cmap(struct fb_cmap *cmap, int kspc, int con, 483 struct fb_info *info) 484{ 485 struct sa1100fb_info *fbi = (struct sa1100fb_info *)info; 486 487 /* 488 * Make sure the user isn't doing something stupid. 489 */ 490 if (!kspc && (fbi->fb.var.bits_per_pixel == 16 || fbi->inf->cmap_static)) 491 return -EINVAL; 492 493 return gen_set_cmap(cmap, kspc, con, info); 494} 495#endif 496 497/* 498 * Formal definition of the VESA spec: 499 * On 500 * This refers to the state of the display when it is in full operation 501 * Stand-By 502 * This defines an optional operating state of minimal power reduction with 503 * the shortest recovery time 504 * Suspend 505 * This refers to a level of power management in which substantial power 506 * reduction is achieved by the display. The display can have a longer 507 * recovery time from this state than from the Stand-by state 508 * Off 509 * This indicates that the display is consuming the lowest level of power 510 * and is non-operational. Recovery from this state may optionally require 511 * the user to manually power on the monitor 512 * 513 * Now, the fbdev driver adds an additional state, (blank), where they 514 * turn off the video (maybe by colormap tricks), but don't mess with the 515 * video itself: think of it semantically between on and Stand-By. 516 * 517 * So here's what we should do in our fbdev blank routine: 518 * 519 * VESA_NO_BLANKING (mode 0) Video on, front/back light on 520 * VESA_VSYNC_SUSPEND (mode 1) Video on, front/back light off 521 * VESA_HSYNC_SUSPEND (mode 2) Video on, front/back light off 522 * VESA_POWERDOWN (mode 3) Video off, front/back light off 523 * 524 * This will match the matrox implementation. 525 */ 526/* 527 * sa1100fb_blank(): 528 * Blank the display by setting all palette values to zero. Note, the 529 * 12 and 16 bpp modes don't really use the palette, so this will not 530 * blank the display in all modes. 531 */ 532static int sa1100fb_blank(int blank, struct fb_info *info) 533{ 534 struct sa1100fb_info *fbi = 535 container_of(info, struct sa1100fb_info, fb); 536 int i; 537 538 dev_dbg(fbi->dev, "sa1100fb_blank: blank=%d\n", blank); 539 540 switch (blank) { 541 case FB_BLANK_POWERDOWN: 542 case FB_BLANK_VSYNC_SUSPEND: 543 case FB_BLANK_HSYNC_SUSPEND: 544 case FB_BLANK_NORMAL: 545 if (fbi->fb.fix.visual == FB_VISUAL_PSEUDOCOLOR || 546 fbi->fb.fix.visual == FB_VISUAL_STATIC_PSEUDOCOLOR) 547 for (i = 0; i < fbi->palette_size; i++) 548 sa1100fb_setpalettereg(i, 0, 0, 0, 0, info); 549 sa1100fb_schedule_work(fbi, C_DISABLE); 550 break; 551 552 case FB_BLANK_UNBLANK: 553 if (fbi->fb.fix.visual == FB_VISUAL_PSEUDOCOLOR || 554 fbi->fb.fix.visual == FB_VISUAL_STATIC_PSEUDOCOLOR) 555 fb_set_cmap(&fbi->fb.cmap, info); 556 sa1100fb_schedule_work(fbi, C_ENABLE); 557 } 558 return 0; 559} 560 561static int sa1100fb_mmap(struct fb_info *info, 562 struct vm_area_struct *vma) 563{ 564 struct sa1100fb_info *fbi = 565 container_of(info, struct sa1100fb_info, fb); 566 unsigned long off = vma->vm_pgoff << PAGE_SHIFT; 567 568 if (off < info->fix.smem_len) { 569 vma->vm_pgoff += 1; /* skip over the palette */ 570 return dma_mmap_writecombine(fbi->dev, vma, fbi->map_cpu, 571 fbi->map_dma, fbi->map_size); 572 } 573 574 vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot); 575 576 return vm_iomap_memory(vma, info->fix.mmio_start, info->fix.mmio_len); 577} 578 579static struct fb_ops sa1100fb_ops = { 580 .owner = THIS_MODULE, 581 .fb_check_var = sa1100fb_check_var, 582 .fb_set_par = sa1100fb_set_par, 583// .fb_set_cmap = sa1100fb_set_cmap, 584 .fb_setcolreg = sa1100fb_setcolreg, 585 .fb_fillrect = cfb_fillrect, 586 .fb_copyarea = cfb_copyarea, 587 .fb_imageblit = cfb_imageblit, 588 .fb_blank = sa1100fb_blank, 589 .fb_mmap = sa1100fb_mmap, 590}; 591 592/* 593 * Calculate the PCD value from the clock rate (in picoseconds). 594 * We take account of the PPCR clock setting. 595 */ 596static inline unsigned int get_pcd(struct sa1100fb_info *fbi, 597 unsigned int pixclock) 598{ 599 unsigned int pcd = clk_get_rate(fbi->clk) / 100 / 1000; 600 601 pcd *= pixclock; 602 pcd /= 10000000; 603 604 return pcd + 1; /* make up for integer math truncations */ 605} 606 607/* 608 * sa1100fb_activate_var(): 609 * Configures LCD Controller based on entries in var parameter. Settings are 610 * only written to the controller if changes were made. 611 */ 612static int sa1100fb_activate_var(struct fb_var_screeninfo *var, struct sa1100fb_info *fbi) 613{ 614 struct sa1100fb_lcd_reg new_regs; 615 u_int half_screen_size, yres, pcd; 616 u_long flags; 617 618 dev_dbg(fbi->dev, "Configuring SA1100 LCD\n"); 619 620 dev_dbg(fbi->dev, "var: xres=%d hslen=%d lm=%d rm=%d\n", 621 var->xres, var->hsync_len, 622 var->left_margin, var->right_margin); 623 dev_dbg(fbi->dev, "var: yres=%d vslen=%d um=%d bm=%d\n", 624 var->yres, var->vsync_len, 625 var->upper_margin, var->lower_margin); 626 627#if DEBUG_VAR 628 if (var->xres < 16 || var->xres > 1024) 629 dev_err(fbi->dev, "%s: invalid xres %d\n", 630 fbi->fb.fix.id, var->xres); 631 if (var->hsync_len < 1 || var->hsync_len > 64) 632 dev_err(fbi->dev, "%s: invalid hsync_len %d\n", 633 fbi->fb.fix.id, var->hsync_len); 634 if (var->left_margin < 1 || var->left_margin > 255) 635 dev_err(fbi->dev, "%s: invalid left_margin %d\n", 636 fbi->fb.fix.id, var->left_margin); 637 if (var->right_margin < 1 || var->right_margin > 255) 638 dev_err(fbi->dev, "%s: invalid right_margin %d\n", 639 fbi->fb.fix.id, var->right_margin); 640 if (var->yres < 1 || var->yres > 1024) 641 dev_err(fbi->dev, "%s: invalid yres %d\n", 642 fbi->fb.fix.id, var->yres); 643 if (var->vsync_len < 1 || var->vsync_len > 64) 644 dev_err(fbi->dev, "%s: invalid vsync_len %d\n", 645 fbi->fb.fix.id, var->vsync_len); 646 if (var->upper_margin < 0 || var->upper_margin > 255) 647 dev_err(fbi->dev, "%s: invalid upper_margin %d\n", 648 fbi->fb.fix.id, var->upper_margin); 649 if (var->lower_margin < 0 || var->lower_margin > 255) 650 dev_err(fbi->dev, "%s: invalid lower_margin %d\n", 651 fbi->fb.fix.id, var->lower_margin); 652#endif 653 654 new_regs.lccr0 = fbi->inf->lccr0 | 655 LCCR0_LEN | LCCR0_LDM | LCCR0_BAM | 656 LCCR0_ERM | LCCR0_LtlEnd | LCCR0_DMADel(0); 657 658 new_regs.lccr1 = 659 LCCR1_DisWdth(var->xres) + 660 LCCR1_HorSnchWdth(var->hsync_len) + 661 LCCR1_BegLnDel(var->left_margin) + 662 LCCR1_EndLnDel(var->right_margin); 663 664 /* 665 * If we have a dual scan LCD, then we need to halve 666 * the YRES parameter. 667 */ 668 yres = var->yres; 669 if (fbi->inf->lccr0 & LCCR0_Dual) 670 yres /= 2; 671 672 new_regs.lccr2 = 673 LCCR2_DisHght(yres) + 674 LCCR2_VrtSnchWdth(var->vsync_len) + 675 LCCR2_BegFrmDel(var->upper_margin) + 676 LCCR2_EndFrmDel(var->lower_margin); 677 678 pcd = get_pcd(fbi, var->pixclock); 679 new_regs.lccr3 = LCCR3_PixClkDiv(pcd) | fbi->inf->lccr3 | 680 (var->sync & FB_SYNC_HOR_HIGH_ACT ? LCCR3_HorSnchH : LCCR3_HorSnchL) | 681 (var->sync & FB_SYNC_VERT_HIGH_ACT ? LCCR3_VrtSnchH : LCCR3_VrtSnchL); 682 683 dev_dbg(fbi->dev, "nlccr0 = 0x%08lx\n", new_regs.lccr0); 684 dev_dbg(fbi->dev, "nlccr1 = 0x%08lx\n", new_regs.lccr1); 685 dev_dbg(fbi->dev, "nlccr2 = 0x%08lx\n", new_regs.lccr2); 686 dev_dbg(fbi->dev, "nlccr3 = 0x%08lx\n", new_regs.lccr3); 687 688 half_screen_size = var->bits_per_pixel; 689 half_screen_size = half_screen_size * var->xres * var->yres / 16; 690 691 /* Update shadow copy atomically */ 692 local_irq_save(flags); 693 fbi->dbar1 = fbi->palette_dma; 694 fbi->dbar2 = fbi->screen_dma + half_screen_size; 695 696 fbi->reg_lccr0 = new_regs.lccr0; 697 fbi->reg_lccr1 = new_regs.lccr1; 698 fbi->reg_lccr2 = new_regs.lccr2; 699 fbi->reg_lccr3 = new_regs.lccr3; 700 local_irq_restore(flags); 701 702 /* 703 * Only update the registers if the controller is enabled 704 * and something has changed. 705 */ 706 if (readl_relaxed(fbi->base + LCCR0) != fbi->reg_lccr0 || 707 readl_relaxed(fbi->base + LCCR1) != fbi->reg_lccr1 || 708 readl_relaxed(fbi->base + LCCR2) != fbi->reg_lccr2 || 709 readl_relaxed(fbi->base + LCCR3) != fbi->reg_lccr3 || 710 readl_relaxed(fbi->base + DBAR1) != fbi->dbar1 || 711 readl_relaxed(fbi->base + DBAR2) != fbi->dbar2) 712 sa1100fb_schedule_work(fbi, C_REENABLE); 713 714 return 0; 715} 716 717/* 718 * NOTE! The following functions are purely helpers for set_ctrlr_state. 719 * Do not call them directly; set_ctrlr_state does the correct serialisation 720 * to ensure that things happen in the right way 100% of time time. 721 * -- rmk 722 */ 723static inline void __sa1100fb_backlight_power(struct sa1100fb_info *fbi, int on) 724{ 725 dev_dbg(fbi->dev, "backlight o%s\n", on ? "n" : "ff"); 726 727 if (fbi->inf->backlight_power) 728 fbi->inf->backlight_power(on); 729} 730 731static inline void __sa1100fb_lcd_power(struct sa1100fb_info *fbi, int on) 732{ 733 dev_dbg(fbi->dev, "LCD power o%s\n", on ? "n" : "ff"); 734 735 if (fbi->inf->lcd_power) 736 fbi->inf->lcd_power(on); 737} 738 739static void sa1100fb_setup_gpio(struct sa1100fb_info *fbi) 740{ 741 u_int mask = 0; 742 743 /* 744 * Enable GPIO<9:2> for LCD use if: 745 * 1. Active display, or 746 * 2. Color Dual Passive display 747 * 748 * see table 11.8 on page 11-27 in the SA1100 manual 749 * -- Erik. 750 * 751 * SA1110 spec update nr. 25 says we can and should 752 * clear LDD15 to 12 for 4 or 8bpp modes with active 753 * panels. 754 */ 755 if ((fbi->reg_lccr0 & LCCR0_CMS) == LCCR0_Color && 756 (fbi->reg_lccr0 & (LCCR0_Dual|LCCR0_Act)) != 0) { 757 mask = GPIO_LDD11 | GPIO_LDD10 | GPIO_LDD9 | GPIO_LDD8; 758 759 if (fbi->fb.var.bits_per_pixel > 8 || 760 (fbi->reg_lccr0 & (LCCR0_Dual|LCCR0_Act)) == LCCR0_Dual) 761 mask |= GPIO_LDD15 | GPIO_LDD14 | GPIO_LDD13 | GPIO_LDD12; 762 763 } 764 765 if (mask) { 766 unsigned long flags; 767 768 /* 769 * SA-1100 requires the GPIO direction register set 770 * appropriately for the alternate function. Hence 771 * we set it here via bitmask rather than excessive 772 * fiddling via the GPIO subsystem - and even then 773 * we'll still have to deal with GAFR. 774 */ 775 local_irq_save(flags); 776 GPDR |= mask; 777 GAFR |= mask; 778 local_irq_restore(flags); 779 } 780} 781 782static void sa1100fb_enable_controller(struct sa1100fb_info *fbi) 783{ 784 dev_dbg(fbi->dev, "Enabling LCD controller\n"); 785 786 /* 787 * Make sure the mode bits are present in the first palette entry 788 */ 789 fbi->palette_cpu[0] &= 0xcfff; 790 fbi->palette_cpu[0] |= palette_pbs(&fbi->fb.var); 791 792 /* enable LCD controller clock */ 793 clk_prepare_enable(fbi->clk); 794 795 /* Sequence from 11.7.10 */ 796 writel_relaxed(fbi->reg_lccr3, fbi->base + LCCR3); 797 writel_relaxed(fbi->reg_lccr2, fbi->base + LCCR2); 798 writel_relaxed(fbi->reg_lccr1, fbi->base + LCCR1); 799 writel_relaxed(fbi->reg_lccr0 & ~LCCR0_LEN, fbi->base + LCCR0); 800 writel_relaxed(fbi->dbar1, fbi->base + DBAR1); 801 writel_relaxed(fbi->dbar2, fbi->base + DBAR2); 802 writel_relaxed(fbi->reg_lccr0 | LCCR0_LEN, fbi->base + LCCR0); 803 804 if (machine_is_shannon()) 805 gpio_set_value(SHANNON_GPIO_DISP_EN, 1); 806 807 dev_dbg(fbi->dev, "DBAR1: 0x%08x\n", readl_relaxed(fbi->base + DBAR1)); 808 dev_dbg(fbi->dev, "DBAR2: 0x%08x\n", readl_relaxed(fbi->base + DBAR2)); 809 dev_dbg(fbi->dev, "LCCR0: 0x%08x\n", readl_relaxed(fbi->base + LCCR0)); 810 dev_dbg(fbi->dev, "LCCR1: 0x%08x\n", readl_relaxed(fbi->base + LCCR1)); 811 dev_dbg(fbi->dev, "LCCR2: 0x%08x\n", readl_relaxed(fbi->base + LCCR2)); 812 dev_dbg(fbi->dev, "LCCR3: 0x%08x\n", readl_relaxed(fbi->base + LCCR3)); 813} 814 815static void sa1100fb_disable_controller(struct sa1100fb_info *fbi) 816{ 817 DECLARE_WAITQUEUE(wait, current); 818 u32 lccr0; 819 820 dev_dbg(fbi->dev, "Disabling LCD controller\n"); 821 822 if (machine_is_shannon()) 823 gpio_set_value(SHANNON_GPIO_DISP_EN, 0); 824 825 set_current_state(TASK_UNINTERRUPTIBLE); 826 add_wait_queue(&fbi->ctrlr_wait, &wait); 827 828 /* Clear LCD Status Register */ 829 writel_relaxed(~0, fbi->base + LCSR); 830 831 lccr0 = readl_relaxed(fbi->base + LCCR0); 832 lccr0 &= ~LCCR0_LDM; /* Enable LCD Disable Done Interrupt */ 833 writel_relaxed(lccr0, fbi->base + LCCR0); 834 lccr0 &= ~LCCR0_LEN; /* Disable LCD Controller */ 835 writel_relaxed(lccr0, fbi->base + LCCR0); 836 837 schedule_timeout(20 * HZ / 1000); 838 remove_wait_queue(&fbi->ctrlr_wait, &wait); 839 840 /* disable LCD controller clock */ 841 clk_disable_unprepare(fbi->clk); 842} 843 844/* 845 * sa1100fb_handle_irq: Handle 'LCD DONE' interrupts. 846 */ 847static irqreturn_t sa1100fb_handle_irq(int irq, void *dev_id) 848{ 849 struct sa1100fb_info *fbi = dev_id; 850 unsigned int lcsr = readl_relaxed(fbi->base + LCSR); 851 852 if (lcsr & LCSR_LDD) { 853 u32 lccr0 = readl_relaxed(fbi->base + LCCR0) | LCCR0_LDM; 854 writel_relaxed(lccr0, fbi->base + LCCR0); 855 wake_up(&fbi->ctrlr_wait); 856 } 857 858 writel_relaxed(lcsr, fbi->base + LCSR); 859 return IRQ_HANDLED; 860} 861 862/* 863 * This function must be called from task context only, since it will 864 * sleep when disabling the LCD controller, or if we get two contending 865 * processes trying to alter state. 866 */ 867static void set_ctrlr_state(struct sa1100fb_info *fbi, u_int state) 868{ 869 u_int old_state; 870 871 mutex_lock(&fbi->ctrlr_lock); 872 873 old_state = fbi->state; 874 875 /* 876 * Hack around fbcon initialisation. 877 */ 878 if (old_state == C_STARTUP && state == C_REENABLE) 879 state = C_ENABLE; 880 881 switch (state) { 882 case C_DISABLE_CLKCHANGE: 883 /* 884 * Disable controller for clock change. If the 885 * controller is already disabled, then do nothing. 886 */ 887 if (old_state != C_DISABLE && old_state != C_DISABLE_PM) { 888 fbi->state = state; 889 sa1100fb_disable_controller(fbi); 890 } 891 break; 892 893 case C_DISABLE_PM: 894 case C_DISABLE: 895 /* 896 * Disable controller 897 */ 898 if (old_state != C_DISABLE) { 899 fbi->state = state; 900 901 __sa1100fb_backlight_power(fbi, 0); 902 if (old_state != C_DISABLE_CLKCHANGE) 903 sa1100fb_disable_controller(fbi); 904 __sa1100fb_lcd_power(fbi, 0); 905 } 906 break; 907 908 case C_ENABLE_CLKCHANGE: 909 /* 910 * Enable the controller after clock change. Only 911 * do this if we were disabled for the clock change. 912 */ 913 if (old_state == C_DISABLE_CLKCHANGE) { 914 fbi->state = C_ENABLE; 915 sa1100fb_enable_controller(fbi); 916 } 917 break; 918 919 case C_REENABLE: 920 /* 921 * Re-enable the controller only if it was already 922 * enabled. This is so we reprogram the control 923 * registers. 924 */ 925 if (old_state == C_ENABLE) { 926 sa1100fb_disable_controller(fbi); 927 sa1100fb_setup_gpio(fbi); 928 sa1100fb_enable_controller(fbi); 929 } 930 break; 931 932 case C_ENABLE_PM: 933 /* 934 * Re-enable the controller after PM. This is not 935 * perfect - think about the case where we were doing 936 * a clock change, and we suspended half-way through. 937 */ 938 if (old_state != C_DISABLE_PM) 939 break; 940 /* fall through */ 941 942 case C_ENABLE: 943 /* 944 * Power up the LCD screen, enable controller, and 945 * turn on the backlight. 946 */ 947 if (old_state != C_ENABLE) { 948 fbi->state = C_ENABLE; 949 sa1100fb_setup_gpio(fbi); 950 __sa1100fb_lcd_power(fbi, 1); 951 sa1100fb_enable_controller(fbi); 952 __sa1100fb_backlight_power(fbi, 1); 953 } 954 break; 955 } 956 mutex_unlock(&fbi->ctrlr_lock); 957} 958 959/* 960 * Our LCD controller task (which is called when we blank or unblank) 961 * via keventd. 962 */ 963static void sa1100fb_task(struct work_struct *w) 964{ 965 struct sa1100fb_info *fbi = container_of(w, struct sa1100fb_info, task); 966 u_int state = xchg(&fbi->task_state, -1); 967 968 set_ctrlr_state(fbi, state); 969} 970 971#ifdef CONFIG_CPU_FREQ 972/* 973 * Calculate the minimum DMA period over all displays that we own. 974 * This, together with the SDRAM bandwidth defines the slowest CPU 975 * frequency that can be selected. 976 */ 977static unsigned int sa1100fb_min_dma_period(struct sa1100fb_info *fbi) 978{ 979#if 0 980 unsigned int min_period = (unsigned int)-1; 981 int i; 982 983 for (i = 0; i < MAX_NR_CONSOLES; i++) { 984 struct display *disp = &fb_display[i]; 985 unsigned int period; 986 987 /* 988 * Do we own this display? 989 */ 990 if (disp->fb_info != &fbi->fb) 991 continue; 992 993 /* 994 * Ok, calculate its DMA period 995 */ 996 period = sa1100fb_display_dma_period(&disp->var); 997 if (period < min_period) 998 min_period = period; 999 } 1000 1001 return min_period; 1002#else 1003 /* 1004 * FIXME: we need to verify _all_ consoles. 1005 */ 1006 return sa1100fb_display_dma_period(&fbi->fb.var); 1007#endif 1008} 1009 1010/* 1011 * CPU clock speed change handler. We need to adjust the LCD timing 1012 * parameters when the CPU clock is adjusted by the power management 1013 * subsystem. 1014 */ 1015static int 1016sa1100fb_freq_transition(struct notifier_block *nb, unsigned long val, 1017 void *data) 1018{ 1019 struct sa1100fb_info *fbi = TO_INF(nb, freq_transition); 1020 u_int pcd; 1021 1022 switch (val) { 1023 case CPUFREQ_PRECHANGE: 1024 set_ctrlr_state(fbi, C_DISABLE_CLKCHANGE); 1025 break; 1026 1027 case CPUFREQ_POSTCHANGE: 1028 pcd = get_pcd(fbi, fbi->fb.var.pixclock); 1029 fbi->reg_lccr3 = (fbi->reg_lccr3 & ~0xff) | LCCR3_PixClkDiv(pcd); 1030 set_ctrlr_state(fbi, C_ENABLE_CLKCHANGE); 1031 break; 1032 } 1033 return 0; 1034} 1035 1036static int 1037sa1100fb_freq_policy(struct notifier_block *nb, unsigned long val, 1038 void *data) 1039{ 1040 struct sa1100fb_info *fbi = TO_INF(nb, freq_policy); 1041 struct cpufreq_policy *policy = data; 1042 1043 switch (val) { 1044 case CPUFREQ_ADJUST: 1045 case CPUFREQ_INCOMPATIBLE: 1046 dev_dbg(fbi->dev, "min dma period: %d ps, " 1047 "new clock %d kHz\n", sa1100fb_min_dma_period(fbi), 1048 policy->max); 1049 /* todo: fill in min/max values */ 1050 break; 1051 case CPUFREQ_NOTIFY: 1052 do {} while(0); 1053 /* todo: panic if min/max values aren't fulfilled 1054 * [can't really happen unless there's a bug in the 1055 * CPU policy verififcation process * 1056 */ 1057 break; 1058 } 1059 return 0; 1060} 1061#endif 1062 1063#ifdef CONFIG_PM 1064/* 1065 * Power management hooks. Note that we won't be called from IRQ context, 1066 * unlike the blank functions above, so we may sleep. 1067 */ 1068static int sa1100fb_suspend(struct platform_device *dev, pm_message_t state) 1069{ 1070 struct sa1100fb_info *fbi = platform_get_drvdata(dev); 1071 1072 set_ctrlr_state(fbi, C_DISABLE_PM); 1073 return 0; 1074} 1075 1076static int sa1100fb_resume(struct platform_device *dev) 1077{ 1078 struct sa1100fb_info *fbi = platform_get_drvdata(dev); 1079 1080 set_ctrlr_state(fbi, C_ENABLE_PM); 1081 return 0; 1082} 1083#else 1084#define sa1100fb_suspend NULL 1085#define sa1100fb_resume NULL 1086#endif 1087 1088/* 1089 * sa1100fb_map_video_memory(): 1090 * Allocates the DRAM memory for the frame buffer. This buffer is 1091 * remapped into a non-cached, non-buffered, memory region to 1092 * allow palette and pixel writes to occur without flushing the 1093 * cache. Once this area is remapped, all virtual memory 1094 * access to the video memory should occur at the new region. 1095 */ 1096static int sa1100fb_map_video_memory(struct sa1100fb_info *fbi) 1097{ 1098 /* 1099 * We reserve one page for the palette, plus the size 1100 * of the framebuffer. 1101 */ 1102 fbi->map_size = PAGE_ALIGN(fbi->fb.fix.smem_len + PAGE_SIZE); 1103 fbi->map_cpu = dma_alloc_writecombine(fbi->dev, fbi->map_size, 1104 &fbi->map_dma, GFP_KERNEL); 1105 1106 if (fbi->map_cpu) { 1107 fbi->fb.screen_base = fbi->map_cpu + PAGE_SIZE; 1108 fbi->screen_dma = fbi->map_dma + PAGE_SIZE; 1109 /* 1110 * FIXME: this is actually the wrong thing to place in 1111 * smem_start. But fbdev suffers from the problem that 1112 * it needs an API which doesn't exist (in this case, 1113 * dma_writecombine_mmap) 1114 */ 1115 fbi->fb.fix.smem_start = fbi->screen_dma; 1116 } 1117 1118 return fbi->map_cpu ? 0 : -ENOMEM; 1119} 1120 1121/* Fake monspecs to fill in fbinfo structure */ 1122static struct fb_monspecs monspecs = { 1123 .hfmin = 30000, 1124 .hfmax = 70000, 1125 .vfmin = 50, 1126 .vfmax = 65, 1127}; 1128 1129 1130static struct sa1100fb_info *sa1100fb_init_fbinfo(struct device *dev) 1131{ 1132 struct sa1100fb_mach_info *inf = dev_get_platdata(dev); 1133 struct sa1100fb_info *fbi; 1134 unsigned i; 1135 1136 fbi = kmalloc(sizeof(struct sa1100fb_info) + sizeof(u32) * 16, 1137 GFP_KERNEL); 1138 if (!fbi) 1139 return NULL; 1140 1141 memset(fbi, 0, sizeof(struct sa1100fb_info)); 1142 fbi->dev = dev; 1143 1144 strcpy(fbi->fb.fix.id, SA1100_NAME); 1145 1146 fbi->fb.fix.type = FB_TYPE_PACKED_PIXELS; 1147 fbi->fb.fix.type_aux = 0; 1148 fbi->fb.fix.xpanstep = 0; 1149 fbi->fb.fix.ypanstep = 0; 1150 fbi->fb.fix.ywrapstep = 0; 1151 fbi->fb.fix.accel = FB_ACCEL_NONE; 1152 1153 fbi->fb.var.nonstd = 0; 1154 fbi->fb.var.activate = FB_ACTIVATE_NOW; 1155 fbi->fb.var.height = -1; 1156 fbi->fb.var.width = -1; 1157 fbi->fb.var.accel_flags = 0; 1158 fbi->fb.var.vmode = FB_VMODE_NONINTERLACED; 1159 1160 fbi->fb.fbops = &sa1100fb_ops; 1161 fbi->fb.flags = FBINFO_DEFAULT; 1162 fbi->fb.monspecs = monspecs; 1163 fbi->fb.pseudo_palette = (fbi + 1); 1164 1165 fbi->rgb[RGB_4] = &rgb_4; 1166 fbi->rgb[RGB_8] = &rgb_8; 1167 fbi->rgb[RGB_16] = &def_rgb_16; 1168 1169 /* 1170 * People just don't seem to get this. We don't support 1171 * anything but correct entries now, so panic if someone 1172 * does something stupid. 1173 */ 1174 if (inf->lccr3 & (LCCR3_VrtSnchL|LCCR3_HorSnchL|0xff) || 1175 inf->pixclock == 0) 1176 panic("sa1100fb error: invalid LCCR3 fields set or zero " 1177 "pixclock."); 1178 1179 fbi->fb.var.xres = inf->xres; 1180 fbi->fb.var.xres_virtual = inf->xres; 1181 fbi->fb.var.yres = inf->yres; 1182 fbi->fb.var.yres_virtual = inf->yres; 1183 fbi->fb.var.bits_per_pixel = inf->bpp; 1184 fbi->fb.var.pixclock = inf->pixclock; 1185 fbi->fb.var.hsync_len = inf->hsync_len; 1186 fbi->fb.var.left_margin = inf->left_margin; 1187 fbi->fb.var.right_margin = inf->right_margin; 1188 fbi->fb.var.vsync_len = inf->vsync_len; 1189 fbi->fb.var.upper_margin = inf->upper_margin; 1190 fbi->fb.var.lower_margin = inf->lower_margin; 1191 fbi->fb.var.sync = inf->sync; 1192 fbi->fb.var.grayscale = inf->cmap_greyscale; 1193 fbi->state = C_STARTUP; 1194 fbi->task_state = (u_char)-1; 1195 fbi->fb.fix.smem_len = inf->xres * inf->yres * 1196 inf->bpp / 8; 1197 fbi->inf = inf; 1198 1199 /* Copy the RGB bitfield overrides */ 1200 for (i = 0; i < NR_RGB; i++) 1201 if (inf->rgb[i]) 1202 fbi->rgb[i] = inf->rgb[i]; 1203 1204 init_waitqueue_head(&fbi->ctrlr_wait); 1205 INIT_WORK(&fbi->task, sa1100fb_task); 1206 mutex_init(&fbi->ctrlr_lock); 1207 1208 return fbi; 1209} 1210 1211static int sa1100fb_probe(struct platform_device *pdev) 1212{ 1213 struct sa1100fb_info *fbi; 1214 struct resource *res; 1215 int ret, irq; 1216 1217 if (!dev_get_platdata(&pdev->dev)) { 1218 dev_err(&pdev->dev, "no platform LCD data\n"); 1219 return -EINVAL; 1220 } 1221 1222 res = platform_get_resource(pdev, IORESOURCE_MEM, 0); 1223 irq = platform_get_irq(pdev, 0); 1224 if (irq < 0 || !res) 1225 return -EINVAL; 1226 1227 if (!request_mem_region(res->start, resource_size(res), "LCD")) 1228 return -EBUSY; 1229 1230 fbi = sa1100fb_init_fbinfo(&pdev->dev); 1231 ret = -ENOMEM; 1232 if (!fbi) 1233 goto failed; 1234 1235 fbi->clk = clk_get(&pdev->dev, NULL); 1236 if (IS_ERR(fbi->clk)) { 1237 ret = PTR_ERR(fbi->clk); 1238 fbi->clk = NULL; 1239 goto failed; 1240 } 1241 1242 fbi->base = ioremap(res->start, resource_size(res)); 1243 if (!fbi->base) 1244 goto failed; 1245 1246 /* Initialize video memory */ 1247 ret = sa1100fb_map_video_memory(fbi); 1248 if (ret) 1249 goto failed; 1250 1251 ret = request_irq(irq, sa1100fb_handle_irq, 0, "LCD", fbi); 1252 if (ret) { 1253 dev_err(&pdev->dev, "request_irq failed: %d\n", ret); 1254 goto failed; 1255 } 1256 1257 if (machine_is_shannon()) { 1258 ret = gpio_request_one(SHANNON_GPIO_DISP_EN, 1259 GPIOF_OUT_INIT_LOW, "display enable"); 1260 if (ret) 1261 goto err_free_irq; 1262 } 1263 1264 /* 1265 * This makes sure that our colour bitfield 1266 * descriptors are correctly initialised. 1267 */ 1268 sa1100fb_check_var(&fbi->fb.var, &fbi->fb); 1269 1270 platform_set_drvdata(pdev, fbi); 1271 1272 ret = register_framebuffer(&fbi->fb); 1273 if (ret < 0) 1274 goto err_reg_fb; 1275 1276#ifdef CONFIG_CPU_FREQ 1277 fbi->freq_transition.notifier_call = sa1100fb_freq_transition; 1278 fbi->freq_policy.notifier_call = sa1100fb_freq_policy; 1279 cpufreq_register_notifier(&fbi->freq_transition, CPUFREQ_TRANSITION_NOTIFIER); 1280 cpufreq_register_notifier(&fbi->freq_policy, CPUFREQ_POLICY_NOTIFIER); 1281#endif 1282 1283 /* This driver cannot be unloaded at the moment */ 1284 return 0; 1285 1286 err_reg_fb: 1287 if (machine_is_shannon()) 1288 gpio_free(SHANNON_GPIO_DISP_EN); 1289 err_free_irq: 1290 free_irq(irq, fbi); 1291 failed: 1292 if (fbi) 1293 iounmap(fbi->base); 1294 if (fbi->clk) 1295 clk_put(fbi->clk); 1296 kfree(fbi); 1297 release_mem_region(res->start, resource_size(res)); 1298 return ret; 1299} 1300 1301static struct platform_driver sa1100fb_driver = { 1302 .probe = sa1100fb_probe, 1303 .suspend = sa1100fb_suspend, 1304 .resume = sa1100fb_resume, 1305 .driver = { 1306 .name = "sa11x0-fb", 1307 }, 1308}; 1309 1310int __init sa1100fb_init(void) 1311{ 1312 if (fb_get_options("sa1100fb", NULL)) 1313 return -ENODEV; 1314 1315 return platform_driver_register(&sa1100fb_driver); 1316} 1317 1318int __init sa1100fb_setup(char *options) 1319{ 1320#if 0 1321 char *this_opt; 1322 1323 if (!options || !*options) 1324 return 0; 1325 1326 while ((this_opt = strsep(&options, ",")) != NULL) { 1327 1328 if (!strncmp(this_opt, "bpp:", 4)) 1329 current_par.max_bpp = 1330 simple_strtoul(this_opt + 4, NULL, 0); 1331 1332 if (!strncmp(this_opt, "lccr0:", 6)) 1333 lcd_shadow.lccr0 = 1334 simple_strtoul(this_opt + 6, NULL, 0); 1335 if (!strncmp(this_opt, "lccr1:", 6)) { 1336 lcd_shadow.lccr1 = 1337 simple_strtoul(this_opt + 6, NULL, 0); 1338 current_par.max_xres = 1339 (lcd_shadow.lccr1 & 0x3ff) + 16; 1340 } 1341 if (!strncmp(this_opt, "lccr2:", 6)) { 1342 lcd_shadow.lccr2 = 1343 simple_strtoul(this_opt + 6, NULL, 0); 1344 current_par.max_yres = 1345 (lcd_shadow. 1346 lccr0 & LCCR0_SDS) ? ((lcd_shadow. 1347 lccr2 & 0x3ff) + 1348 1) * 1349 2 : ((lcd_shadow.lccr2 & 0x3ff) + 1); 1350 } 1351 if (!strncmp(this_opt, "lccr3:", 6)) 1352 lcd_shadow.lccr3 = 1353 simple_strtoul(this_opt + 6, NULL, 0); 1354 } 1355#endif 1356 return 0; 1357} 1358 1359module_init(sa1100fb_init); 1360MODULE_DESCRIPTION("StrongARM-1100/1110 framebuffer driver"); 1361MODULE_LICENSE("GPL"); 1362