1/*
2 * linux/drivers/video/omap2/dss/rfbi.c
3 *
4 * Copyright (C) 2009 Nokia Corporation
5 * Author: Tomi Valkeinen <tomi.valkeinen@nokia.com>
6 *
7 * Some code and ideas taken from drivers/video/omap/ driver
8 * by Imre Deak.
9 *
10 * This program is free software; you can redistribute it and/or modify it
11 * under the terms of the GNU General Public License version 2 as published by
12 * the Free Software Foundation.
13 *
14 * This program is distributed in the hope that it will be useful, but WITHOUT
15 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
16 * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
17 * more details.
18 *
19 * You should have received a copy of the GNU General Public License along with
20 * this program.  If not, see <http://www.gnu.org/licenses/>.
21 */
22
23#define DSS_SUBSYS_NAME "RFBI"
24
25#include <linux/kernel.h>
26#include <linux/dma-mapping.h>
27#include <linux/export.h>
28#include <linux/vmalloc.h>
29#include <linux/clk.h>
30#include <linux/io.h>
31#include <linux/delay.h>
32#include <linux/kfifo.h>
33#include <linux/ktime.h>
34#include <linux/hrtimer.h>
35#include <linux/seq_file.h>
36#include <linux/semaphore.h>
37#include <linux/platform_device.h>
38#include <linux/pm_runtime.h>
39
40#include <video/omapdss.h>
41#include "dss.h"
42
43struct rfbi_reg { u16 idx; };
44
45#define RFBI_REG(idx)		((const struct rfbi_reg) { idx })
46
47#define RFBI_REVISION		RFBI_REG(0x0000)
48#define RFBI_SYSCONFIG		RFBI_REG(0x0010)
49#define RFBI_SYSSTATUS		RFBI_REG(0x0014)
50#define RFBI_CONTROL		RFBI_REG(0x0040)
51#define RFBI_PIXEL_CNT		RFBI_REG(0x0044)
52#define RFBI_LINE_NUMBER	RFBI_REG(0x0048)
53#define RFBI_CMD		RFBI_REG(0x004c)
54#define RFBI_PARAM		RFBI_REG(0x0050)
55#define RFBI_DATA		RFBI_REG(0x0054)
56#define RFBI_READ		RFBI_REG(0x0058)
57#define RFBI_STATUS		RFBI_REG(0x005c)
58
59#define RFBI_CONFIG(n)		RFBI_REG(0x0060 + (n)*0x18)
60#define RFBI_ONOFF_TIME(n)	RFBI_REG(0x0064 + (n)*0x18)
61#define RFBI_CYCLE_TIME(n)	RFBI_REG(0x0068 + (n)*0x18)
62#define RFBI_DATA_CYCLE1(n)	RFBI_REG(0x006c + (n)*0x18)
63#define RFBI_DATA_CYCLE2(n)	RFBI_REG(0x0070 + (n)*0x18)
64#define RFBI_DATA_CYCLE3(n)	RFBI_REG(0x0074 + (n)*0x18)
65
66#define RFBI_VSYNC_WIDTH	RFBI_REG(0x0090)
67#define RFBI_HSYNC_WIDTH	RFBI_REG(0x0094)
68
69#define REG_FLD_MOD(idx, val, start, end) \
70	rfbi_write_reg(idx, FLD_MOD(rfbi_read_reg(idx), val, start, end))
71
72enum omap_rfbi_cycleformat {
73	OMAP_DSS_RFBI_CYCLEFORMAT_1_1 = 0,
74	OMAP_DSS_RFBI_CYCLEFORMAT_2_1 = 1,
75	OMAP_DSS_RFBI_CYCLEFORMAT_3_1 = 2,
76	OMAP_DSS_RFBI_CYCLEFORMAT_3_2 = 3,
77};
78
79enum omap_rfbi_datatype {
80	OMAP_DSS_RFBI_DATATYPE_12 = 0,
81	OMAP_DSS_RFBI_DATATYPE_16 = 1,
82	OMAP_DSS_RFBI_DATATYPE_18 = 2,
83	OMAP_DSS_RFBI_DATATYPE_24 = 3,
84};
85
86enum omap_rfbi_parallelmode {
87	OMAP_DSS_RFBI_PARALLELMODE_8 = 0,
88	OMAP_DSS_RFBI_PARALLELMODE_9 = 1,
89	OMAP_DSS_RFBI_PARALLELMODE_12 = 2,
90	OMAP_DSS_RFBI_PARALLELMODE_16 = 3,
91};
92
93static int rfbi_convert_timings(struct rfbi_timings *t);
94static void rfbi_get_clk_info(u32 *clk_period, u32 *max_clk_div);
95
96static struct {
97	struct platform_device *pdev;
98	void __iomem	*base;
99
100	unsigned long	l4_khz;
101
102	enum omap_rfbi_datatype datatype;
103	enum omap_rfbi_parallelmode parallelmode;
104
105	enum omap_rfbi_te_mode te_mode;
106	int te_enabled;
107
108	void (*framedone_callback)(void *data);
109	void *framedone_callback_data;
110
111	struct omap_dss_device *dssdev[2];
112
113	struct semaphore bus_lock;
114
115	struct omap_video_timings timings;
116	int pixel_size;
117	int data_lines;
118	struct rfbi_timings intf_timings;
119
120	struct omap_dss_device output;
121} rfbi;
122
123static inline void rfbi_write_reg(const struct rfbi_reg idx, u32 val)
124{
125	__raw_writel(val, rfbi.base + idx.idx);
126}
127
128static inline u32 rfbi_read_reg(const struct rfbi_reg idx)
129{
130	return __raw_readl(rfbi.base + idx.idx);
131}
132
133static int rfbi_runtime_get(void)
134{
135	int r;
136
137	DSSDBG("rfbi_runtime_get\n");
138
139	r = pm_runtime_get_sync(&rfbi.pdev->dev);
140	WARN_ON(r < 0);
141	return r < 0 ? r : 0;
142}
143
144static void rfbi_runtime_put(void)
145{
146	int r;
147
148	DSSDBG("rfbi_runtime_put\n");
149
150	r = pm_runtime_put_sync(&rfbi.pdev->dev);
151	WARN_ON(r < 0 && r != -ENOSYS);
152}
153
154static void rfbi_bus_lock(void)
155{
156	down(&rfbi.bus_lock);
157}
158
159static void rfbi_bus_unlock(void)
160{
161	up(&rfbi.bus_lock);
162}
163
164static void rfbi_write_command(const void *buf, u32 len)
165{
166	switch (rfbi.parallelmode) {
167	case OMAP_DSS_RFBI_PARALLELMODE_8:
168	{
169		const u8 *b = buf;
170		for (; len; len--)
171			rfbi_write_reg(RFBI_CMD, *b++);
172		break;
173	}
174
175	case OMAP_DSS_RFBI_PARALLELMODE_16:
176	{
177		const u16 *w = buf;
178		BUG_ON(len & 1);
179		for (; len; len -= 2)
180			rfbi_write_reg(RFBI_CMD, *w++);
181		break;
182	}
183
184	case OMAP_DSS_RFBI_PARALLELMODE_9:
185	case OMAP_DSS_RFBI_PARALLELMODE_12:
186	default:
187		BUG();
188	}
189}
190
191static void rfbi_read_data(void *buf, u32 len)
192{
193	switch (rfbi.parallelmode) {
194	case OMAP_DSS_RFBI_PARALLELMODE_8:
195	{
196		u8 *b = buf;
197		for (; len; len--) {
198			rfbi_write_reg(RFBI_READ, 0);
199			*b++ = rfbi_read_reg(RFBI_READ);
200		}
201		break;
202	}
203
204	case OMAP_DSS_RFBI_PARALLELMODE_16:
205	{
206		u16 *w = buf;
207		BUG_ON(len & ~1);
208		for (; len; len -= 2) {
209			rfbi_write_reg(RFBI_READ, 0);
210			*w++ = rfbi_read_reg(RFBI_READ);
211		}
212		break;
213	}
214
215	case OMAP_DSS_RFBI_PARALLELMODE_9:
216	case OMAP_DSS_RFBI_PARALLELMODE_12:
217	default:
218		BUG();
219	}
220}
221
222static void rfbi_write_data(const void *buf, u32 len)
223{
224	switch (rfbi.parallelmode) {
225	case OMAP_DSS_RFBI_PARALLELMODE_8:
226	{
227		const u8 *b = buf;
228		for (; len; len--)
229			rfbi_write_reg(RFBI_PARAM, *b++);
230		break;
231	}
232
233	case OMAP_DSS_RFBI_PARALLELMODE_16:
234	{
235		const u16 *w = buf;
236		BUG_ON(len & 1);
237		for (; len; len -= 2)
238			rfbi_write_reg(RFBI_PARAM, *w++);
239		break;
240	}
241
242	case OMAP_DSS_RFBI_PARALLELMODE_9:
243	case OMAP_DSS_RFBI_PARALLELMODE_12:
244	default:
245		BUG();
246
247	}
248}
249
250static void rfbi_write_pixels(const void __iomem *buf, int scr_width,
251		u16 x, u16 y,
252		u16 w, u16 h)
253{
254	int start_offset = scr_width * y + x;
255	int horiz_offset = scr_width - w;
256	int i;
257
258	if (rfbi.datatype == OMAP_DSS_RFBI_DATATYPE_16 &&
259	   rfbi.parallelmode == OMAP_DSS_RFBI_PARALLELMODE_8) {
260		const u16 __iomem *pd = buf;
261		pd += start_offset;
262
263		for (; h; --h) {
264			for (i = 0; i < w; ++i) {
265				const u8 __iomem *b = (const u8 __iomem *)pd;
266				rfbi_write_reg(RFBI_PARAM, __raw_readb(b+1));
267				rfbi_write_reg(RFBI_PARAM, __raw_readb(b+0));
268				++pd;
269			}
270			pd += horiz_offset;
271		}
272	} else if (rfbi.datatype == OMAP_DSS_RFBI_DATATYPE_24 &&
273	   rfbi.parallelmode == OMAP_DSS_RFBI_PARALLELMODE_8) {
274		const u32 __iomem *pd = buf;
275		pd += start_offset;
276
277		for (; h; --h) {
278			for (i = 0; i < w; ++i) {
279				const u8 __iomem *b = (const u8 __iomem *)pd;
280				rfbi_write_reg(RFBI_PARAM, __raw_readb(b+2));
281				rfbi_write_reg(RFBI_PARAM, __raw_readb(b+1));
282				rfbi_write_reg(RFBI_PARAM, __raw_readb(b+0));
283				++pd;
284			}
285			pd += horiz_offset;
286		}
287	} else if (rfbi.datatype == OMAP_DSS_RFBI_DATATYPE_16 &&
288	   rfbi.parallelmode == OMAP_DSS_RFBI_PARALLELMODE_16) {
289		const u16 __iomem *pd = buf;
290		pd += start_offset;
291
292		for (; h; --h) {
293			for (i = 0; i < w; ++i) {
294				rfbi_write_reg(RFBI_PARAM, __raw_readw(pd));
295				++pd;
296			}
297			pd += horiz_offset;
298		}
299	} else {
300		BUG();
301	}
302}
303
304static int rfbi_transfer_area(struct omap_dss_device *dssdev,
305		void (*callback)(void *data), void *data)
306{
307	u32 l;
308	int r;
309	struct omap_overlay_manager *mgr = rfbi.output.manager;
310	u16 width = rfbi.timings.x_res;
311	u16 height = rfbi.timings.y_res;
312
313	/*BUG_ON(callback == 0);*/
314	BUG_ON(rfbi.framedone_callback != NULL);
315
316	DSSDBG("rfbi_transfer_area %dx%d\n", width, height);
317
318	dss_mgr_set_timings(mgr, &rfbi.timings);
319
320	r = dss_mgr_enable(mgr);
321	if (r)
322		return r;
323
324	rfbi.framedone_callback = callback;
325	rfbi.framedone_callback_data = data;
326
327	rfbi_write_reg(RFBI_PIXEL_CNT, width * height);
328
329	l = rfbi_read_reg(RFBI_CONTROL);
330	l = FLD_MOD(l, 1, 0, 0); /* enable */
331	if (!rfbi.te_enabled)
332		l = FLD_MOD(l, 1, 4, 4); /* ITE */
333
334	rfbi_write_reg(RFBI_CONTROL, l);
335
336	return 0;
337}
338
339static void framedone_callback(void *data)
340{
341	void (*callback)(void *data);
342
343	DSSDBG("FRAMEDONE\n");
344
345	REG_FLD_MOD(RFBI_CONTROL, 0, 0, 0);
346
347	callback = rfbi.framedone_callback;
348	rfbi.framedone_callback = NULL;
349
350	if (callback != NULL)
351		callback(rfbi.framedone_callback_data);
352}
353
354#if 1 /* VERBOSE */
355static void rfbi_print_timings(void)
356{
357	u32 l;
358	u32 time;
359
360	l = rfbi_read_reg(RFBI_CONFIG(0));
361	time = 1000000000 / rfbi.l4_khz;
362	if (l & (1 << 4))
363		time *= 2;
364
365	DSSDBG("Tick time %u ps\n", time);
366	l = rfbi_read_reg(RFBI_ONOFF_TIME(0));
367	DSSDBG("CSONTIME %d, CSOFFTIME %d, WEONTIME %d, WEOFFTIME %d, "
368		"REONTIME %d, REOFFTIME %d\n",
369		l & 0x0f, (l >> 4) & 0x3f, (l >> 10) & 0x0f, (l >> 14) & 0x3f,
370		(l >> 20) & 0x0f, (l >> 24) & 0x3f);
371
372	l = rfbi_read_reg(RFBI_CYCLE_TIME(0));
373	DSSDBG("WECYCLETIME %d, RECYCLETIME %d, CSPULSEWIDTH %d, "
374		"ACCESSTIME %d\n",
375		(l & 0x3f), (l >> 6) & 0x3f, (l >> 12) & 0x3f,
376		(l >> 22) & 0x3f);
377}
378#else
379static void rfbi_print_timings(void) {}
380#endif
381
382
383
384
385static u32 extif_clk_period;
386
387static inline unsigned long round_to_extif_ticks(unsigned long ps, int div)
388{
389	int bus_tick = extif_clk_period * div;
390	return (ps + bus_tick - 1) / bus_tick * bus_tick;
391}
392
393static int calc_reg_timing(struct rfbi_timings *t, int div)
394{
395	t->clk_div = div;
396
397	t->cs_on_time = round_to_extif_ticks(t->cs_on_time, div);
398
399	t->we_on_time = round_to_extif_ticks(t->we_on_time, div);
400	t->we_off_time = round_to_extif_ticks(t->we_off_time, div);
401	t->we_cycle_time = round_to_extif_ticks(t->we_cycle_time, div);
402
403	t->re_on_time = round_to_extif_ticks(t->re_on_time, div);
404	t->re_off_time = round_to_extif_ticks(t->re_off_time, div);
405	t->re_cycle_time = round_to_extif_ticks(t->re_cycle_time, div);
406
407	t->access_time = round_to_extif_ticks(t->access_time, div);
408	t->cs_off_time = round_to_extif_ticks(t->cs_off_time, div);
409	t->cs_pulse_width = round_to_extif_ticks(t->cs_pulse_width, div);
410
411	DSSDBG("[reg]cson %d csoff %d reon %d reoff %d\n",
412	       t->cs_on_time, t->cs_off_time, t->re_on_time, t->re_off_time);
413	DSSDBG("[reg]weon %d weoff %d recyc %d wecyc %d\n",
414	       t->we_on_time, t->we_off_time, t->re_cycle_time,
415	       t->we_cycle_time);
416	DSSDBG("[reg]rdaccess %d cspulse %d\n",
417	       t->access_time, t->cs_pulse_width);
418
419	return rfbi_convert_timings(t);
420}
421
422static int calc_extif_timings(struct rfbi_timings *t)
423{
424	u32 max_clk_div;
425	int div;
426
427	rfbi_get_clk_info(&extif_clk_period, &max_clk_div);
428	for (div = 1; div <= max_clk_div; div++) {
429		if (calc_reg_timing(t, div) == 0)
430			break;
431	}
432
433	if (div <= max_clk_div)
434		return 0;
435
436	DSSERR("can't setup timings\n");
437	return -1;
438}
439
440
441static void rfbi_set_timings(int rfbi_module, struct rfbi_timings *t)
442{
443	int r;
444
445	if (!t->converted) {
446		r = calc_extif_timings(t);
447		if (r < 0)
448			DSSERR("Failed to calc timings\n");
449	}
450
451	BUG_ON(!t->converted);
452
453	rfbi_write_reg(RFBI_ONOFF_TIME(rfbi_module), t->tim[0]);
454	rfbi_write_reg(RFBI_CYCLE_TIME(rfbi_module), t->tim[1]);
455
456	/* TIMEGRANULARITY */
457	REG_FLD_MOD(RFBI_CONFIG(rfbi_module),
458		    (t->tim[2] ? 1 : 0), 4, 4);
459
460	rfbi_print_timings();
461}
462
463static int ps_to_rfbi_ticks(int time, int div)
464{
465	unsigned long tick_ps;
466	int ret;
467
468	/* Calculate in picosecs to yield more exact results */
469	tick_ps = 1000000000 / (rfbi.l4_khz) * div;
470
471	ret = (time + tick_ps - 1) / tick_ps;
472
473	return ret;
474}
475
476static void rfbi_get_clk_info(u32 *clk_period, u32 *max_clk_div)
477{
478	*clk_period = 1000000000 / rfbi.l4_khz;
479	*max_clk_div = 2;
480}
481
482static int rfbi_convert_timings(struct rfbi_timings *t)
483{
484	u32 l;
485	int reon, reoff, weon, weoff, cson, csoff, cs_pulse;
486	int actim, recyc, wecyc;
487	int div = t->clk_div;
488
489	if (div <= 0 || div > 2)
490		return -1;
491
492	/* Make sure that after conversion it still holds that:
493	 * weoff > weon, reoff > reon, recyc >= reoff, wecyc >= weoff,
494	 * csoff > cson, csoff >= max(weoff, reoff), actim > reon
495	 */
496	weon = ps_to_rfbi_ticks(t->we_on_time, div);
497	weoff = ps_to_rfbi_ticks(t->we_off_time, div);
498	if (weoff <= weon)
499		weoff = weon + 1;
500	if (weon > 0x0f)
501		return -1;
502	if (weoff > 0x3f)
503		return -1;
504
505	reon = ps_to_rfbi_ticks(t->re_on_time, div);
506	reoff = ps_to_rfbi_ticks(t->re_off_time, div);
507	if (reoff <= reon)
508		reoff = reon + 1;
509	if (reon > 0x0f)
510		return -1;
511	if (reoff > 0x3f)
512		return -1;
513
514	cson = ps_to_rfbi_ticks(t->cs_on_time, div);
515	csoff = ps_to_rfbi_ticks(t->cs_off_time, div);
516	if (csoff <= cson)
517		csoff = cson + 1;
518	if (csoff < max(weoff, reoff))
519		csoff = max(weoff, reoff);
520	if (cson > 0x0f)
521		return -1;
522	if (csoff > 0x3f)
523		return -1;
524
525	l =  cson;
526	l |= csoff << 4;
527	l |= weon  << 10;
528	l |= weoff << 14;
529	l |= reon  << 20;
530	l |= reoff << 24;
531
532	t->tim[0] = l;
533
534	actim = ps_to_rfbi_ticks(t->access_time, div);
535	if (actim <= reon)
536		actim = reon + 1;
537	if (actim > 0x3f)
538		return -1;
539
540	wecyc = ps_to_rfbi_ticks(t->we_cycle_time, div);
541	if (wecyc < weoff)
542		wecyc = weoff;
543	if (wecyc > 0x3f)
544		return -1;
545
546	recyc = ps_to_rfbi_ticks(t->re_cycle_time, div);
547	if (recyc < reoff)
548		recyc = reoff;
549	if (recyc > 0x3f)
550		return -1;
551
552	cs_pulse = ps_to_rfbi_ticks(t->cs_pulse_width, div);
553	if (cs_pulse > 0x3f)
554		return -1;
555
556	l =  wecyc;
557	l |= recyc    << 6;
558	l |= cs_pulse << 12;
559	l |= actim    << 22;
560
561	t->tim[1] = l;
562
563	t->tim[2] = div - 1;
564
565	t->converted = 1;
566
567	return 0;
568}
569
570/* xxx FIX module selection missing */
571static int rfbi_setup_te(enum omap_rfbi_te_mode mode,
572			     unsigned hs_pulse_time, unsigned vs_pulse_time,
573			     int hs_pol_inv, int vs_pol_inv, int extif_div)
574{
575	int hs, vs;
576	int min;
577	u32 l;
578
579	hs = ps_to_rfbi_ticks(hs_pulse_time, 1);
580	vs = ps_to_rfbi_ticks(vs_pulse_time, 1);
581	if (hs < 2)
582		return -EDOM;
583	if (mode == OMAP_DSS_RFBI_TE_MODE_2)
584		min = 2;
585	else /* OMAP_DSS_RFBI_TE_MODE_1 */
586		min = 4;
587	if (vs < min)
588		return -EDOM;
589	if (vs == hs)
590		return -EINVAL;
591	rfbi.te_mode = mode;
592	DSSDBG("setup_te: mode %d hs %d vs %d hs_inv %d vs_inv %d\n",
593		mode, hs, vs, hs_pol_inv, vs_pol_inv);
594
595	rfbi_write_reg(RFBI_HSYNC_WIDTH, hs);
596	rfbi_write_reg(RFBI_VSYNC_WIDTH, vs);
597
598	l = rfbi_read_reg(RFBI_CONFIG(0));
599	if (hs_pol_inv)
600		l &= ~(1 << 21);
601	else
602		l |= 1 << 21;
603	if (vs_pol_inv)
604		l &= ~(1 << 20);
605	else
606		l |= 1 << 20;
607
608	return 0;
609}
610
611/* xxx FIX module selection missing */
612static int rfbi_enable_te(bool enable, unsigned line)
613{
614	u32 l;
615
616	DSSDBG("te %d line %d mode %d\n", enable, line, rfbi.te_mode);
617	if (line > (1 << 11) - 1)
618		return -EINVAL;
619
620	l = rfbi_read_reg(RFBI_CONFIG(0));
621	l &= ~(0x3 << 2);
622	if (enable) {
623		rfbi.te_enabled = 1;
624		l |= rfbi.te_mode << 2;
625	} else
626		rfbi.te_enabled = 0;
627	rfbi_write_reg(RFBI_CONFIG(0), l);
628	rfbi_write_reg(RFBI_LINE_NUMBER, line);
629
630	return 0;
631}
632
633static int rfbi_configure_bus(int rfbi_module, int bpp, int lines)
634{
635	u32 l;
636	int cycle1 = 0, cycle2 = 0, cycle3 = 0;
637	enum omap_rfbi_cycleformat cycleformat;
638	enum omap_rfbi_datatype datatype;
639	enum omap_rfbi_parallelmode parallelmode;
640
641	switch (bpp) {
642	case 12:
643		datatype = OMAP_DSS_RFBI_DATATYPE_12;
644		break;
645	case 16:
646		datatype = OMAP_DSS_RFBI_DATATYPE_16;
647		break;
648	case 18:
649		datatype = OMAP_DSS_RFBI_DATATYPE_18;
650		break;
651	case 24:
652		datatype = OMAP_DSS_RFBI_DATATYPE_24;
653		break;
654	default:
655		BUG();
656		return 1;
657	}
658	rfbi.datatype = datatype;
659
660	switch (lines) {
661	case 8:
662		parallelmode = OMAP_DSS_RFBI_PARALLELMODE_8;
663		break;
664	case 9:
665		parallelmode = OMAP_DSS_RFBI_PARALLELMODE_9;
666		break;
667	case 12:
668		parallelmode = OMAP_DSS_RFBI_PARALLELMODE_12;
669		break;
670	case 16:
671		parallelmode = OMAP_DSS_RFBI_PARALLELMODE_16;
672		break;
673	default:
674		BUG();
675		return 1;
676	}
677	rfbi.parallelmode = parallelmode;
678
679	if ((bpp % lines) == 0) {
680		switch (bpp / lines) {
681		case 1:
682			cycleformat = OMAP_DSS_RFBI_CYCLEFORMAT_1_1;
683			break;
684		case 2:
685			cycleformat = OMAP_DSS_RFBI_CYCLEFORMAT_2_1;
686			break;
687		case 3:
688			cycleformat = OMAP_DSS_RFBI_CYCLEFORMAT_3_1;
689			break;
690		default:
691			BUG();
692			return 1;
693		}
694	} else if ((2 * bpp % lines) == 0) {
695		if ((2 * bpp / lines) == 3)
696			cycleformat = OMAP_DSS_RFBI_CYCLEFORMAT_3_2;
697		else {
698			BUG();
699			return 1;
700		}
701	} else {
702		BUG();
703		return 1;
704	}
705
706	switch (cycleformat) {
707	case OMAP_DSS_RFBI_CYCLEFORMAT_1_1:
708		cycle1 = lines;
709		break;
710
711	case OMAP_DSS_RFBI_CYCLEFORMAT_2_1:
712		cycle1 = lines;
713		cycle2 = lines;
714		break;
715
716	case OMAP_DSS_RFBI_CYCLEFORMAT_3_1:
717		cycle1 = lines;
718		cycle2 = lines;
719		cycle3 = lines;
720		break;
721
722	case OMAP_DSS_RFBI_CYCLEFORMAT_3_2:
723		cycle1 = lines;
724		cycle2 = (lines / 2) | ((lines / 2) << 16);
725		cycle3 = (lines << 16);
726		break;
727	}
728
729	REG_FLD_MOD(RFBI_CONTROL, 0, 3, 2); /* clear CS */
730
731	l = 0;
732	l |= FLD_VAL(parallelmode, 1, 0);
733	l |= FLD_VAL(0, 3, 2);		/* TRIGGERMODE: ITE */
734	l |= FLD_VAL(0, 4, 4);		/* TIMEGRANULARITY */
735	l |= FLD_VAL(datatype, 6, 5);
736	/* l |= FLD_VAL(2, 8, 7); */	/* L4FORMAT, 2pix/L4 */
737	l |= FLD_VAL(0, 8, 7);	/* L4FORMAT, 1pix/L4 */
738	l |= FLD_VAL(cycleformat, 10, 9);
739	l |= FLD_VAL(0, 12, 11);	/* UNUSEDBITS */
740	l |= FLD_VAL(0, 16, 16);	/* A0POLARITY */
741	l |= FLD_VAL(0, 17, 17);	/* REPOLARITY */
742	l |= FLD_VAL(0, 18, 18);	/* WEPOLARITY */
743	l |= FLD_VAL(0, 19, 19);	/* CSPOLARITY */
744	l |= FLD_VAL(1, 20, 20);	/* TE_VSYNC_POLARITY */
745	l |= FLD_VAL(1, 21, 21);	/* HSYNCPOLARITY */
746	rfbi_write_reg(RFBI_CONFIG(rfbi_module), l);
747
748	rfbi_write_reg(RFBI_DATA_CYCLE1(rfbi_module), cycle1);
749	rfbi_write_reg(RFBI_DATA_CYCLE2(rfbi_module), cycle2);
750	rfbi_write_reg(RFBI_DATA_CYCLE3(rfbi_module), cycle3);
751
752
753	l = rfbi_read_reg(RFBI_CONTROL);
754	l = FLD_MOD(l, rfbi_module+1, 3, 2); /* Select CSx */
755	l = FLD_MOD(l, 0, 1, 1); /* clear bypass */
756	rfbi_write_reg(RFBI_CONTROL, l);
757
758
759	DSSDBG("RFBI config: bpp %d, lines %d, cycles: 0x%x 0x%x 0x%x\n",
760	       bpp, lines, cycle1, cycle2, cycle3);
761
762	return 0;
763}
764
765static int rfbi_configure(struct omap_dss_device *dssdev)
766{
767	return rfbi_configure_bus(dssdev->phy.rfbi.channel, rfbi.pixel_size,
768			rfbi.data_lines);
769}
770
771static int rfbi_update(struct omap_dss_device *dssdev, void (*callback)(void *),
772		void *data)
773{
774	return rfbi_transfer_area(dssdev, callback, data);
775}
776
777static void rfbi_set_size(struct omap_dss_device *dssdev, u16 w, u16 h)
778{
779	rfbi.timings.x_res = w;
780	rfbi.timings.y_res = h;
781}
782
783static void rfbi_set_pixel_size(struct omap_dss_device *dssdev, int pixel_size)
784{
785	rfbi.pixel_size = pixel_size;
786}
787
788static void rfbi_set_data_lines(struct omap_dss_device *dssdev, int data_lines)
789{
790	rfbi.data_lines = data_lines;
791}
792
793static void rfbi_set_interface_timings(struct omap_dss_device *dssdev,
794		struct rfbi_timings *timings)
795{
796	rfbi.intf_timings = *timings;
797}
798
799static void rfbi_dump_regs(struct seq_file *s)
800{
801#define DUMPREG(r) seq_printf(s, "%-35s %08x\n", #r, rfbi_read_reg(r))
802
803	if (rfbi_runtime_get())
804		return;
805
806	DUMPREG(RFBI_REVISION);
807	DUMPREG(RFBI_SYSCONFIG);
808	DUMPREG(RFBI_SYSSTATUS);
809	DUMPREG(RFBI_CONTROL);
810	DUMPREG(RFBI_PIXEL_CNT);
811	DUMPREG(RFBI_LINE_NUMBER);
812	DUMPREG(RFBI_CMD);
813	DUMPREG(RFBI_PARAM);
814	DUMPREG(RFBI_DATA);
815	DUMPREG(RFBI_READ);
816	DUMPREG(RFBI_STATUS);
817
818	DUMPREG(RFBI_CONFIG(0));
819	DUMPREG(RFBI_ONOFF_TIME(0));
820	DUMPREG(RFBI_CYCLE_TIME(0));
821	DUMPREG(RFBI_DATA_CYCLE1(0));
822	DUMPREG(RFBI_DATA_CYCLE2(0));
823	DUMPREG(RFBI_DATA_CYCLE3(0));
824
825	DUMPREG(RFBI_CONFIG(1));
826	DUMPREG(RFBI_ONOFF_TIME(1));
827	DUMPREG(RFBI_CYCLE_TIME(1));
828	DUMPREG(RFBI_DATA_CYCLE1(1));
829	DUMPREG(RFBI_DATA_CYCLE2(1));
830	DUMPREG(RFBI_DATA_CYCLE3(1));
831
832	DUMPREG(RFBI_VSYNC_WIDTH);
833	DUMPREG(RFBI_HSYNC_WIDTH);
834
835	rfbi_runtime_put();
836#undef DUMPREG
837}
838
839static void rfbi_config_lcd_manager(struct omap_dss_device *dssdev)
840{
841	struct omap_overlay_manager *mgr = rfbi.output.manager;
842	struct dss_lcd_mgr_config mgr_config;
843
844	mgr_config.io_pad_mode = DSS_IO_PAD_MODE_RFBI;
845
846	mgr_config.stallmode = true;
847	/* Do we need fifohandcheck for RFBI? */
848	mgr_config.fifohandcheck = false;
849
850	mgr_config.video_port_width = rfbi.pixel_size;
851	mgr_config.lcden_sig_polarity = 0;
852
853	dss_mgr_set_lcd_config(mgr, &mgr_config);
854
855	/*
856	 * Set rfbi.timings with default values, the x_res and y_res fields
857	 * are expected to be already configured by the panel driver via
858	 * omapdss_rfbi_set_size()
859	 */
860	rfbi.timings.hsw = 1;
861	rfbi.timings.hfp = 1;
862	rfbi.timings.hbp = 1;
863	rfbi.timings.vsw = 1;
864	rfbi.timings.vfp = 0;
865	rfbi.timings.vbp = 0;
866
867	rfbi.timings.interlace = false;
868	rfbi.timings.hsync_level = OMAPDSS_SIG_ACTIVE_HIGH;
869	rfbi.timings.vsync_level = OMAPDSS_SIG_ACTIVE_HIGH;
870	rfbi.timings.data_pclk_edge = OMAPDSS_DRIVE_SIG_RISING_EDGE;
871	rfbi.timings.de_level = OMAPDSS_SIG_ACTIVE_HIGH;
872	rfbi.timings.sync_pclk_edge = OMAPDSS_DRIVE_SIG_FALLING_EDGE;
873
874	dss_mgr_set_timings(mgr, &rfbi.timings);
875}
876
877static int rfbi_display_enable(struct omap_dss_device *dssdev)
878{
879	struct omap_dss_device *out = &rfbi.output;
880	int r;
881
882	if (out == NULL || out->manager == NULL) {
883		DSSERR("failed to enable display: no output/manager\n");
884		return -ENODEV;
885	}
886
887	r = rfbi_runtime_get();
888	if (r)
889		return r;
890
891	r = dss_mgr_register_framedone_handler(out->manager,
892			framedone_callback, NULL);
893	if (r) {
894		DSSERR("can't get FRAMEDONE irq\n");
895		goto err1;
896	}
897
898	rfbi_config_lcd_manager(dssdev);
899
900	rfbi_configure_bus(dssdev->phy.rfbi.channel, rfbi.pixel_size,
901			rfbi.data_lines);
902
903	rfbi_set_timings(dssdev->phy.rfbi.channel, &rfbi.intf_timings);
904
905	return 0;
906err1:
907	rfbi_runtime_put();
908	return r;
909}
910
911static void rfbi_display_disable(struct omap_dss_device *dssdev)
912{
913	struct omap_dss_device *out = &rfbi.output;
914
915	dss_mgr_unregister_framedone_handler(out->manager,
916			framedone_callback, NULL);
917
918	rfbi_runtime_put();
919}
920
921static int rfbi_init_display(struct omap_dss_device *dssdev)
922{
923	rfbi.dssdev[dssdev->phy.rfbi.channel] = dssdev;
924	return 0;
925}
926
927static void rfbi_init_output(struct platform_device *pdev)
928{
929	struct omap_dss_device *out = &rfbi.output;
930
931	out->dev = &pdev->dev;
932	out->id = OMAP_DSS_OUTPUT_DBI;
933	out->output_type = OMAP_DISPLAY_TYPE_DBI;
934	out->name = "rfbi.0";
935	out->dispc_channel = OMAP_DSS_CHANNEL_LCD;
936	out->owner = THIS_MODULE;
937
938	omapdss_register_output(out);
939}
940
941static void __exit rfbi_uninit_output(struct platform_device *pdev)
942{
943	struct omap_dss_device *out = &rfbi.output;
944
945	omapdss_unregister_output(out);
946}
947
948/* RFBI HW IP initialisation */
949static int omap_rfbihw_probe(struct platform_device *pdev)
950{
951	u32 rev;
952	struct resource *rfbi_mem;
953	struct clk *clk;
954	int r;
955
956	rfbi.pdev = pdev;
957
958	sema_init(&rfbi.bus_lock, 1);
959
960	rfbi_mem = platform_get_resource(rfbi.pdev, IORESOURCE_MEM, 0);
961	if (!rfbi_mem) {
962		DSSERR("can't get IORESOURCE_MEM RFBI\n");
963		return -EINVAL;
964	}
965
966	rfbi.base = devm_ioremap(&pdev->dev, rfbi_mem->start,
967				 resource_size(rfbi_mem));
968	if (!rfbi.base) {
969		DSSERR("can't ioremap RFBI\n");
970		return -ENOMEM;
971	}
972
973	clk = clk_get(&pdev->dev, "ick");
974	if (IS_ERR(clk)) {
975		DSSERR("can't get ick\n");
976		return PTR_ERR(clk);
977	}
978
979	rfbi.l4_khz = clk_get_rate(clk) / 1000;
980
981	clk_put(clk);
982
983	pm_runtime_enable(&pdev->dev);
984
985	r = rfbi_runtime_get();
986	if (r)
987		goto err_runtime_get;
988
989	msleep(10);
990
991	rev = rfbi_read_reg(RFBI_REVISION);
992	dev_dbg(&pdev->dev, "OMAP RFBI rev %d.%d\n",
993	       FLD_GET(rev, 7, 4), FLD_GET(rev, 3, 0));
994
995	rfbi_runtime_put();
996
997	dss_debugfs_create_file("rfbi", rfbi_dump_regs);
998
999	rfbi_init_output(pdev);
1000
1001	return 0;
1002
1003err_runtime_get:
1004	pm_runtime_disable(&pdev->dev);
1005	return r;
1006}
1007
1008static int __exit omap_rfbihw_remove(struct platform_device *pdev)
1009{
1010	rfbi_uninit_output(pdev);
1011
1012	pm_runtime_disable(&pdev->dev);
1013
1014	return 0;
1015}
1016
1017static int rfbi_runtime_suspend(struct device *dev)
1018{
1019	dispc_runtime_put();
1020
1021	return 0;
1022}
1023
1024static int rfbi_runtime_resume(struct device *dev)
1025{
1026	int r;
1027
1028	r = dispc_runtime_get();
1029	if (r < 0)
1030		return r;
1031
1032	return 0;
1033}
1034
1035static const struct dev_pm_ops rfbi_pm_ops = {
1036	.runtime_suspend = rfbi_runtime_suspend,
1037	.runtime_resume = rfbi_runtime_resume,
1038};
1039
1040static struct platform_driver omap_rfbihw_driver = {
1041	.probe		= omap_rfbihw_probe,
1042	.remove         = __exit_p(omap_rfbihw_remove),
1043	.driver         = {
1044		.name   = "omapdss_rfbi",
1045		.pm	= &rfbi_pm_ops,
1046		.suppress_bind_attrs = true,
1047	},
1048};
1049
1050int __init rfbi_init_platform_driver(void)
1051{
1052	return platform_driver_register(&omap_rfbihw_driver);
1053}
1054
1055void __exit rfbi_uninit_platform_driver(void)
1056{
1057	platform_driver_unregister(&omap_rfbihw_driver);
1058}
1059