1/* 2 * Copyright (C) 2005-2006 by Texas Instruments 3 * 4 * This file is part of the Inventra Controller Driver for Linux. 5 * 6 * The Inventra Controller Driver for Linux is free software; you 7 * can redistribute it and/or modify it under the terms of the GNU 8 * General Public License version 2 as published by the Free Software 9 * Foundation. 10 * 11 * The Inventra Controller Driver for Linux is distributed in 12 * the hope that it will be useful, but WITHOUT ANY WARRANTY; 13 * without even the implied warranty of MERCHANTABILITY or 14 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public 15 * License for more details. 16 * 17 * You should have received a copy of the GNU General Public License 18 * along with The Inventra Controller Driver for Linux ; if not, 19 * write to the Free Software Foundation, Inc., 59 Temple Place, 20 * Suite 330, Boston, MA 02111-1307 USA 21 * 22 */ 23 24#include <linux/module.h> 25#include <linux/kernel.h> 26#include <linux/sched.h> 27#include <linux/list.h> 28#include <linux/delay.h> 29#include <linux/clk.h> 30#include <linux/err.h> 31#include <linux/io.h> 32#include <linux/gpio.h> 33#include <linux/platform_device.h> 34#include <linux/dma-mapping.h> 35#include <linux/usb/usb_phy_generic.h> 36 37#include <mach/cputype.h> 38#include <mach/hardware.h> 39 40#include <asm/mach-types.h> 41 42#include "musb_core.h" 43 44#ifdef CONFIG_MACH_DAVINCI_EVM 45#define GPIO_nVBUS_DRV 160 46#endif 47 48#include "davinci.h" 49#include "cppi_dma.h" 50 51 52#define USB_PHY_CTRL IO_ADDRESS(USBPHY_CTL_PADDR) 53#define DM355_DEEPSLEEP IO_ADDRESS(DM355_DEEPSLEEP_PADDR) 54 55struct davinci_glue { 56 struct device *dev; 57 struct platform_device *musb; 58 struct clk *clk; 59}; 60 61/* REVISIT (PM) we should be able to keep the PHY in low power mode most 62 * of the time (24 MHZ oscillator and PLL off, etc) by setting POWER.D0 63 * and, when in host mode, autosuspending idle root ports... PHYPLLON 64 * (overriding SUSPENDM?) then likely needs to stay off. 65 */ 66 67static inline void phy_on(void) 68{ 69 u32 phy_ctrl = __raw_readl(USB_PHY_CTRL); 70 71 /* power everything up; start the on-chip PHY and its PLL */ 72 phy_ctrl &= ~(USBPHY_OSCPDWN | USBPHY_OTGPDWN | USBPHY_PHYPDWN); 73 phy_ctrl |= USBPHY_SESNDEN | USBPHY_VBDTCTEN | USBPHY_PHYPLLON; 74 __raw_writel(phy_ctrl, USB_PHY_CTRL); 75 76 /* wait for PLL to lock before proceeding */ 77 while ((__raw_readl(USB_PHY_CTRL) & USBPHY_PHYCLKGD) == 0) 78 cpu_relax(); 79} 80 81static inline void phy_off(void) 82{ 83 u32 phy_ctrl = __raw_readl(USB_PHY_CTRL); 84 85 /* powerdown the on-chip PHY, its PLL, and the OTG block */ 86 phy_ctrl &= ~(USBPHY_SESNDEN | USBPHY_VBDTCTEN | USBPHY_PHYPLLON); 87 phy_ctrl |= USBPHY_OSCPDWN | USBPHY_OTGPDWN | USBPHY_PHYPDWN; 88 __raw_writel(phy_ctrl, USB_PHY_CTRL); 89} 90 91static int dma_off = 1; 92 93static void davinci_musb_enable(struct musb *musb) 94{ 95 u32 tmp, old, val; 96 97 /* workaround: setup irqs through both register sets */ 98 tmp = (musb->epmask & DAVINCI_USB_TX_ENDPTS_MASK) 99 << DAVINCI_USB_TXINT_SHIFT; 100 musb_writel(musb->ctrl_base, DAVINCI_USB_INT_MASK_SET_REG, tmp); 101 old = tmp; 102 tmp = (musb->epmask & (0xfffe & DAVINCI_USB_RX_ENDPTS_MASK)) 103 << DAVINCI_USB_RXINT_SHIFT; 104 musb_writel(musb->ctrl_base, DAVINCI_USB_INT_MASK_SET_REG, tmp); 105 tmp |= old; 106 107 val = ~MUSB_INTR_SOF; 108 tmp |= ((val & 0x01ff) << DAVINCI_USB_USBINT_SHIFT); 109 musb_writel(musb->ctrl_base, DAVINCI_USB_INT_MASK_SET_REG, tmp); 110 111 if (is_dma_capable() && !dma_off) 112 printk(KERN_WARNING "%s %s: dma not reactivated\n", 113 __FILE__, __func__); 114 else 115 dma_off = 0; 116 117 /* force a DRVVBUS irq so we can start polling for ID change */ 118 musb_writel(musb->ctrl_base, DAVINCI_USB_INT_SET_REG, 119 DAVINCI_INTR_DRVVBUS << DAVINCI_USB_USBINT_SHIFT); 120} 121 122/* 123 * Disable the HDRC and flush interrupts 124 */ 125static void davinci_musb_disable(struct musb *musb) 126{ 127 /* because we don't set CTRLR.UINT, "important" to: 128 * - not read/write INTRUSB/INTRUSBE 129 * - (except during initial setup, as workaround) 130 * - use INTSETR/INTCLRR instead 131 */ 132 musb_writel(musb->ctrl_base, DAVINCI_USB_INT_MASK_CLR_REG, 133 DAVINCI_USB_USBINT_MASK 134 | DAVINCI_USB_TXINT_MASK 135 | DAVINCI_USB_RXINT_MASK); 136 musb_writeb(musb->mregs, MUSB_DEVCTL, 0); 137 musb_writel(musb->ctrl_base, DAVINCI_USB_EOI_REG, 0); 138 139 if (is_dma_capable() && !dma_off) 140 WARNING("dma still active\n"); 141} 142 143 144#define portstate(stmt) stmt 145 146/* 147 * VBUS SWITCHING IS BOARD-SPECIFIC ... at least for the DM6446 EVM, 148 * which doesn't wire DRVVBUS to the FET that switches it. Unclear 149 * if that's a problem with the DM6446 chip or just with that board. 150 * 151 * In either case, the DM355 EVM automates DRVVBUS the normal way, 152 * when J10 is out, and TI documents it as handling OTG. 153 */ 154 155#ifdef CONFIG_MACH_DAVINCI_EVM 156 157static int vbus_state = -1; 158 159/* I2C operations are always synchronous, and require a task context. 160 * With unloaded systems, using the shared workqueue seems to suffice 161 * to satisfy the 100msec A_WAIT_VRISE timeout... 162 */ 163static void evm_deferred_drvvbus(struct work_struct *ignored) 164{ 165 gpio_set_value_cansleep(GPIO_nVBUS_DRV, vbus_state); 166 vbus_state = !vbus_state; 167} 168 169#endif /* EVM */ 170 171static void davinci_musb_source_power(struct musb *musb, int is_on, int immediate) 172{ 173#ifdef CONFIG_MACH_DAVINCI_EVM 174 if (is_on) 175 is_on = 1; 176 177 if (vbus_state == is_on) 178 return; 179 vbus_state = !is_on; /* 0/1 vs "-1 == unknown/init" */ 180 181 if (machine_is_davinci_evm()) { 182 static DECLARE_WORK(evm_vbus_work, evm_deferred_drvvbus); 183 184 if (immediate) 185 gpio_set_value_cansleep(GPIO_nVBUS_DRV, vbus_state); 186 else 187 schedule_work(&evm_vbus_work); 188 } 189 if (immediate) 190 vbus_state = is_on; 191#endif 192} 193 194static void davinci_musb_set_vbus(struct musb *musb, int is_on) 195{ 196 WARN_ON(is_on && is_peripheral_active(musb)); 197 davinci_musb_source_power(musb, is_on, 0); 198} 199 200 201#define POLL_SECONDS 2 202 203static struct timer_list otg_workaround; 204 205static void otg_timer(unsigned long _musb) 206{ 207 struct musb *musb = (void *)_musb; 208 void __iomem *mregs = musb->mregs; 209 u8 devctl; 210 unsigned long flags; 211 212 /* We poll because DaVinci's won't expose several OTG-critical 213 * status change events (from the transceiver) otherwise. 214 */ 215 devctl = musb_readb(mregs, MUSB_DEVCTL); 216 dev_dbg(musb->controller, "poll devctl %02x (%s)\n", devctl, 217 usb_otg_state_string(musb->xceiv->otg->state)); 218 219 spin_lock_irqsave(&musb->lock, flags); 220 switch (musb->xceiv->otg->state) { 221 case OTG_STATE_A_WAIT_VFALL: 222 /* Wait till VBUS falls below SessionEnd (~0.2V); the 1.3 RTL 223 * seems to mis-handle session "start" otherwise (or in our 224 * case "recover"), in routine "VBUS was valid by the time 225 * VBUSERR got reported during enumeration" cases. 226 */ 227 if (devctl & MUSB_DEVCTL_VBUS) { 228 mod_timer(&otg_workaround, jiffies + POLL_SECONDS * HZ); 229 break; 230 } 231 musb->xceiv->otg->state = OTG_STATE_A_WAIT_VRISE; 232 musb_writel(musb->ctrl_base, DAVINCI_USB_INT_SET_REG, 233 MUSB_INTR_VBUSERROR << DAVINCI_USB_USBINT_SHIFT); 234 break; 235 case OTG_STATE_B_IDLE: 236 /* 237 * There's no ID-changed IRQ, so we have no good way to tell 238 * when to switch to the A-Default state machine (by setting 239 * the DEVCTL.SESSION flag). 240 * 241 * Workaround: whenever we're in B_IDLE, try setting the 242 * session flag every few seconds. If it works, ID was 243 * grounded and we're now in the A-Default state machine. 244 * 245 * NOTE setting the session flag is _supposed_ to trigger 246 * SRP, but clearly it doesn't. 247 */ 248 musb_writeb(mregs, MUSB_DEVCTL, 249 devctl | MUSB_DEVCTL_SESSION); 250 devctl = musb_readb(mregs, MUSB_DEVCTL); 251 if (devctl & MUSB_DEVCTL_BDEVICE) 252 mod_timer(&otg_workaround, jiffies + POLL_SECONDS * HZ); 253 else 254 musb->xceiv->otg->state = OTG_STATE_A_IDLE; 255 break; 256 default: 257 break; 258 } 259 spin_unlock_irqrestore(&musb->lock, flags); 260} 261 262static irqreturn_t davinci_musb_interrupt(int irq, void *__hci) 263{ 264 unsigned long flags; 265 irqreturn_t retval = IRQ_NONE; 266 struct musb *musb = __hci; 267 struct usb_otg *otg = musb->xceiv->otg; 268 void __iomem *tibase = musb->ctrl_base; 269 struct cppi *cppi; 270 u32 tmp; 271 272 spin_lock_irqsave(&musb->lock, flags); 273 274 /* NOTE: DaVinci shadows the Mentor IRQs. Don't manage them through 275 * the Mentor registers (except for setup), use the TI ones and EOI. 276 * 277 * Docs describe irq "vector" registers associated with the CPPI and 278 * USB EOI registers. These hold a bitmask corresponding to the 279 * current IRQ, not an irq handler address. Would using those bits 280 * resolve some of the races observed in this dispatch code?? 281 */ 282 283 /* CPPI interrupts share the same IRQ line, but have their own 284 * mask, state, "vector", and EOI registers. 285 */ 286 cppi = container_of(musb->dma_controller, struct cppi, controller); 287 if (is_cppi_enabled() && musb->dma_controller && !cppi->irq) 288 retval = cppi_interrupt(irq, __hci); 289 290 /* ack and handle non-CPPI interrupts */ 291 tmp = musb_readl(tibase, DAVINCI_USB_INT_SRC_MASKED_REG); 292 musb_writel(tibase, DAVINCI_USB_INT_SRC_CLR_REG, tmp); 293 dev_dbg(musb->controller, "IRQ %08x\n", tmp); 294 295 musb->int_rx = (tmp & DAVINCI_USB_RXINT_MASK) 296 >> DAVINCI_USB_RXINT_SHIFT; 297 musb->int_tx = (tmp & DAVINCI_USB_TXINT_MASK) 298 >> DAVINCI_USB_TXINT_SHIFT; 299 musb->int_usb = (tmp & DAVINCI_USB_USBINT_MASK) 300 >> DAVINCI_USB_USBINT_SHIFT; 301 302 /* DRVVBUS irqs are the only proxy we have (a very poor one!) for 303 * DaVinci's missing ID change IRQ. We need an ID change IRQ to 304 * switch appropriately between halves of the OTG state machine. 305 * Managing DEVCTL.SESSION per Mentor docs requires we know its 306 * value, but DEVCTL.BDEVICE is invalid without DEVCTL.SESSION set. 307 * Also, DRVVBUS pulses for SRP (but not at 5V) ... 308 */ 309 if (tmp & (DAVINCI_INTR_DRVVBUS << DAVINCI_USB_USBINT_SHIFT)) { 310 int drvvbus = musb_readl(tibase, DAVINCI_USB_STAT_REG); 311 void __iomem *mregs = musb->mregs; 312 u8 devctl = musb_readb(mregs, MUSB_DEVCTL); 313 int err = musb->int_usb & MUSB_INTR_VBUSERROR; 314 315 err = musb->int_usb & MUSB_INTR_VBUSERROR; 316 if (err) { 317 /* The Mentor core doesn't debounce VBUS as needed 318 * to cope with device connect current spikes. This 319 * means it's not uncommon for bus-powered devices 320 * to get VBUS errors during enumeration. 321 * 322 * This is a workaround, but newer RTL from Mentor 323 * seems to allow a better one: "re"starting sessions 324 * without waiting (on EVM, a **long** time) for VBUS 325 * to stop registering in devctl. 326 */ 327 musb->int_usb &= ~MUSB_INTR_VBUSERROR; 328 musb->xceiv->otg->state = OTG_STATE_A_WAIT_VFALL; 329 mod_timer(&otg_workaround, jiffies + POLL_SECONDS * HZ); 330 WARNING("VBUS error workaround (delay coming)\n"); 331 } else if (drvvbus) { 332 MUSB_HST_MODE(musb); 333 otg->default_a = 1; 334 musb->xceiv->otg->state = OTG_STATE_A_WAIT_VRISE; 335 portstate(musb->port1_status |= USB_PORT_STAT_POWER); 336 del_timer(&otg_workaround); 337 } else { 338 musb->is_active = 0; 339 MUSB_DEV_MODE(musb); 340 otg->default_a = 0; 341 musb->xceiv->otg->state = OTG_STATE_B_IDLE; 342 portstate(musb->port1_status &= ~USB_PORT_STAT_POWER); 343 } 344 345 /* NOTE: this must complete poweron within 100 msec 346 * (OTG_TIME_A_WAIT_VRISE) but we don't check for that. 347 */ 348 davinci_musb_source_power(musb, drvvbus, 0); 349 dev_dbg(musb->controller, "VBUS %s (%s)%s, devctl %02x\n", 350 drvvbus ? "on" : "off", 351 usb_otg_state_string(musb->xceiv->otg->state), 352 err ? " ERROR" : "", 353 devctl); 354 retval = IRQ_HANDLED; 355 } 356 357 if (musb->int_tx || musb->int_rx || musb->int_usb) 358 retval |= musb_interrupt(musb); 359 360 /* irq stays asserted until EOI is written */ 361 musb_writel(tibase, DAVINCI_USB_EOI_REG, 0); 362 363 /* poll for ID change */ 364 if (musb->xceiv->otg->state == OTG_STATE_B_IDLE) 365 mod_timer(&otg_workaround, jiffies + POLL_SECONDS * HZ); 366 367 spin_unlock_irqrestore(&musb->lock, flags); 368 369 return retval; 370} 371 372static int davinci_musb_set_mode(struct musb *musb, u8 mode) 373{ 374 /* EVM can't do this (right?) */ 375 return -EIO; 376} 377 378static int davinci_musb_init(struct musb *musb) 379{ 380 void __iomem *tibase = musb->ctrl_base; 381 u32 revision; 382 int ret = -ENODEV; 383 384 musb->xceiv = usb_get_phy(USB_PHY_TYPE_USB2); 385 if (IS_ERR_OR_NULL(musb->xceiv)) { 386 ret = -EPROBE_DEFER; 387 goto unregister; 388 } 389 390 musb->mregs += DAVINCI_BASE_OFFSET; 391 392 /* returns zero if e.g. not clocked */ 393 revision = musb_readl(tibase, DAVINCI_USB_VERSION_REG); 394 if (revision == 0) 395 goto fail; 396 397 setup_timer(&otg_workaround, otg_timer, (unsigned long) musb); 398 399 davinci_musb_source_power(musb, 0, 1); 400 401 /* dm355 EVM swaps D+/D- for signal integrity, and 402 * is clocked from the main 24 MHz crystal. 403 */ 404 if (machine_is_davinci_dm355_evm()) { 405 u32 phy_ctrl = __raw_readl(USB_PHY_CTRL); 406 407 phy_ctrl &= ~(3 << 9); 408 phy_ctrl |= USBPHY_DATAPOL; 409 __raw_writel(phy_ctrl, USB_PHY_CTRL); 410 } 411 412 /* On dm355, the default-A state machine needs DRVVBUS control. 413 * If we won't be a host, there's no need to turn it on. 414 */ 415 if (cpu_is_davinci_dm355()) { 416 u32 deepsleep = __raw_readl(DM355_DEEPSLEEP); 417 418 deepsleep &= ~DRVVBUS_FORCE; 419 __raw_writel(deepsleep, DM355_DEEPSLEEP); 420 } 421 422 /* reset the controller */ 423 musb_writel(tibase, DAVINCI_USB_CTRL_REG, 0x1); 424 425 /* start the on-chip PHY and its PLL */ 426 phy_on(); 427 428 msleep(5); 429 430 /* NOTE: irqs are in mixed mode, not bypass to pure-musb */ 431 pr_debug("DaVinci OTG revision %08x phy %03x control %02x\n", 432 revision, __raw_readl(USB_PHY_CTRL), 433 musb_readb(tibase, DAVINCI_USB_CTRL_REG)); 434 435 musb->isr = davinci_musb_interrupt; 436 return 0; 437 438fail: 439 usb_put_phy(musb->xceiv); 440unregister: 441 usb_phy_generic_unregister(); 442 return ret; 443} 444 445static int davinci_musb_exit(struct musb *musb) 446{ 447 del_timer_sync(&otg_workaround); 448 449 /* force VBUS off */ 450 if (cpu_is_davinci_dm355()) { 451 u32 deepsleep = __raw_readl(DM355_DEEPSLEEP); 452 453 deepsleep &= ~DRVVBUS_FORCE; 454 deepsleep |= DRVVBUS_OVERRIDE; 455 __raw_writel(deepsleep, DM355_DEEPSLEEP); 456 } 457 458 davinci_musb_source_power(musb, 0 /*off*/, 1); 459 460 /* delay, to avoid problems with module reload */ 461 if (musb->xceiv->otg->default_a) { 462 int maxdelay = 30; 463 u8 devctl, warn = 0; 464 465 /* if there's no peripheral connected, this can take a 466 * long time to fall, especially on EVM with huge C133. 467 */ 468 do { 469 devctl = musb_readb(musb->mregs, MUSB_DEVCTL); 470 if (!(devctl & MUSB_DEVCTL_VBUS)) 471 break; 472 if ((devctl & MUSB_DEVCTL_VBUS) != warn) { 473 warn = devctl & MUSB_DEVCTL_VBUS; 474 dev_dbg(musb->controller, "VBUS %d\n", 475 warn >> MUSB_DEVCTL_VBUS_SHIFT); 476 } 477 msleep(1000); 478 maxdelay--; 479 } while (maxdelay > 0); 480 481 /* in OTG mode, another host might be connected */ 482 if (devctl & MUSB_DEVCTL_VBUS) 483 dev_dbg(musb->controller, "VBUS off timeout (devctl %02x)\n", devctl); 484 } 485 486 phy_off(); 487 488 usb_put_phy(musb->xceiv); 489 490 return 0; 491} 492 493static const struct musb_platform_ops davinci_ops = { 494 .init = davinci_musb_init, 495 .exit = davinci_musb_exit, 496 497 .enable = davinci_musb_enable, 498 .disable = davinci_musb_disable, 499 500 .set_mode = davinci_musb_set_mode, 501 502 .set_vbus = davinci_musb_set_vbus, 503}; 504 505static const struct platform_device_info davinci_dev_info = { 506 .name = "musb-hdrc", 507 .id = PLATFORM_DEVID_AUTO, 508 .dma_mask = DMA_BIT_MASK(32), 509}; 510 511static int davinci_probe(struct platform_device *pdev) 512{ 513 struct resource musb_resources[3]; 514 struct musb_hdrc_platform_data *pdata = dev_get_platdata(&pdev->dev); 515 struct platform_device *musb; 516 struct davinci_glue *glue; 517 struct platform_device_info pinfo; 518 struct clk *clk; 519 520 int ret = -ENOMEM; 521 522 glue = devm_kzalloc(&pdev->dev, sizeof(*glue), GFP_KERNEL); 523 if (!glue) 524 goto err0; 525 526 clk = devm_clk_get(&pdev->dev, "usb"); 527 if (IS_ERR(clk)) { 528 dev_err(&pdev->dev, "failed to get clock\n"); 529 ret = PTR_ERR(clk); 530 goto err0; 531 } 532 533 ret = clk_enable(clk); 534 if (ret) { 535 dev_err(&pdev->dev, "failed to enable clock\n"); 536 goto err0; 537 } 538 539 glue->dev = &pdev->dev; 540 glue->clk = clk; 541 542 pdata->platform_ops = &davinci_ops; 543 544 usb_phy_generic_register(); 545 platform_set_drvdata(pdev, glue); 546 547 memset(musb_resources, 0x00, sizeof(*musb_resources) * 548 ARRAY_SIZE(musb_resources)); 549 550 musb_resources[0].name = pdev->resource[0].name; 551 musb_resources[0].start = pdev->resource[0].start; 552 musb_resources[0].end = pdev->resource[0].end; 553 musb_resources[0].flags = pdev->resource[0].flags; 554 555 musb_resources[1].name = pdev->resource[1].name; 556 musb_resources[1].start = pdev->resource[1].start; 557 musb_resources[1].end = pdev->resource[1].end; 558 musb_resources[1].flags = pdev->resource[1].flags; 559 560 /* 561 * For DM6467 3 resources are passed. A placeholder for the 3rd 562 * resource is always there, so it's safe to always copy it... 563 */ 564 musb_resources[2].name = pdev->resource[2].name; 565 musb_resources[2].start = pdev->resource[2].start; 566 musb_resources[2].end = pdev->resource[2].end; 567 musb_resources[2].flags = pdev->resource[2].flags; 568 569 pinfo = davinci_dev_info; 570 pinfo.parent = &pdev->dev; 571 pinfo.res = musb_resources; 572 pinfo.num_res = ARRAY_SIZE(musb_resources); 573 pinfo.data = pdata; 574 pinfo.size_data = sizeof(*pdata); 575 576 glue->musb = musb = platform_device_register_full(&pinfo); 577 if (IS_ERR(musb)) { 578 ret = PTR_ERR(musb); 579 dev_err(&pdev->dev, "failed to register musb device: %d\n", ret); 580 goto err1; 581 } 582 583 return 0; 584 585err1: 586 clk_disable(clk); 587 588err0: 589 return ret; 590} 591 592static int davinci_remove(struct platform_device *pdev) 593{ 594 struct davinci_glue *glue = platform_get_drvdata(pdev); 595 596 platform_device_unregister(glue->musb); 597 usb_phy_generic_unregister(); 598 clk_disable(glue->clk); 599 600 return 0; 601} 602 603static struct platform_driver davinci_driver = { 604 .probe = davinci_probe, 605 .remove = davinci_remove, 606 .driver = { 607 .name = "musb-davinci", 608 }, 609}; 610 611MODULE_DESCRIPTION("DaVinci MUSB Glue Layer"); 612MODULE_AUTHOR("Felipe Balbi <balbi@ti.com>"); 613MODULE_LICENSE("GPL v2"); 614module_platform_driver(davinci_driver); 615