1/* 2 * linux/drivers/usb/gadget/s3c2410_udc.c 3 * 4 * Samsung S3C24xx series on-chip full speed USB device controllers 5 * 6 * Copyright (C) 2004-2007 Herbert Pötzl - Arnaud Patard 7 * Additional cleanups by Ben Dooks <ben-linux@fluff.org> 8 * 9 * This program is free software; you can redistribute it and/or modify 10 * it under the terms of the GNU General Public License as published by 11 * the Free Software Foundation; either version 2 of the License, or 12 * (at your option) any later version. 13 */ 14 15#define pr_fmt(fmt) "s3c2410_udc: " fmt 16 17#include <linux/module.h> 18#include <linux/kernel.h> 19#include <linux/delay.h> 20#include <linux/ioport.h> 21#include <linux/sched.h> 22#include <linux/slab.h> 23#include <linux/errno.h> 24#include <linux/init.h> 25#include <linux/timer.h> 26#include <linux/list.h> 27#include <linux/interrupt.h> 28#include <linux/platform_device.h> 29#include <linux/clk.h> 30#include <linux/gpio.h> 31#include <linux/prefetch.h> 32#include <linux/io.h> 33 34#include <linux/debugfs.h> 35#include <linux/seq_file.h> 36 37#include <linux/usb.h> 38#include <linux/usb/gadget.h> 39 40#include <asm/byteorder.h> 41#include <asm/irq.h> 42#include <asm/unaligned.h> 43#include <mach/irqs.h> 44 45#include <mach/hardware.h> 46 47#include <plat/regs-udc.h> 48#include <linux/platform_data/usb-s3c2410_udc.h> 49 50 51#include "s3c2410_udc.h" 52 53#define DRIVER_DESC "S3C2410 USB Device Controller Gadget" 54#define DRIVER_VERSION "29 Apr 2007" 55#define DRIVER_AUTHOR "Herbert Pötzl <herbert@13thfloor.at>, " \ 56 "Arnaud Patard <arnaud.patard@rtp-net.org>" 57 58static const char gadget_name[] = "s3c2410_udc"; 59static const char driver_desc[] = DRIVER_DESC; 60 61static struct s3c2410_udc *the_controller; 62static struct clk *udc_clock; 63static struct clk *usb_bus_clock; 64static void __iomem *base_addr; 65static u64 rsrc_start; 66static u64 rsrc_len; 67static struct dentry *s3c2410_udc_debugfs_root; 68 69static inline u32 udc_read(u32 reg) 70{ 71 return readb(base_addr + reg); 72} 73 74static inline void udc_write(u32 value, u32 reg) 75{ 76 writeb(value, base_addr + reg); 77} 78 79static inline void udc_writeb(void __iomem *base, u32 value, u32 reg) 80{ 81 writeb(value, base + reg); 82} 83 84static struct s3c2410_udc_mach_info *udc_info; 85 86/*************************** DEBUG FUNCTION ***************************/ 87#define DEBUG_NORMAL 1 88#define DEBUG_VERBOSE 2 89 90#ifdef CONFIG_USB_S3C2410_DEBUG 91#define USB_S3C2410_DEBUG_LEVEL 0 92 93static uint32_t s3c2410_ticks = 0; 94 95static int dprintk(int level, const char *fmt, ...) 96{ 97 static char printk_buf[1024]; 98 static long prevticks; 99 static int invocation; 100 va_list args; 101 int len; 102 103 if (level > USB_S3C2410_DEBUG_LEVEL) 104 return 0; 105 106 if (s3c2410_ticks != prevticks) { 107 prevticks = s3c2410_ticks; 108 invocation = 0; 109 } 110 111 len = scnprintf(printk_buf, 112 sizeof(printk_buf), "%1lu.%02d USB: ", 113 prevticks, invocation++); 114 115 va_start(args, fmt); 116 len = vscnprintf(printk_buf+len, 117 sizeof(printk_buf)-len, fmt, args); 118 va_end(args); 119 120 pr_debug("%s", printk_buf); 121 return len; 122} 123#else 124static int dprintk(int level, const char *fmt, ...) 125{ 126 return 0; 127} 128#endif 129static int s3c2410_udc_debugfs_seq_show(struct seq_file *m, void *p) 130{ 131 u32 addr_reg, pwr_reg, ep_int_reg, usb_int_reg; 132 u32 ep_int_en_reg, usb_int_en_reg, ep0_csr; 133 u32 ep1_i_csr1, ep1_i_csr2, ep1_o_csr1, ep1_o_csr2; 134 u32 ep2_i_csr1, ep2_i_csr2, ep2_o_csr1, ep2_o_csr2; 135 136 addr_reg = udc_read(S3C2410_UDC_FUNC_ADDR_REG); 137 pwr_reg = udc_read(S3C2410_UDC_PWR_REG); 138 ep_int_reg = udc_read(S3C2410_UDC_EP_INT_REG); 139 usb_int_reg = udc_read(S3C2410_UDC_USB_INT_REG); 140 ep_int_en_reg = udc_read(S3C2410_UDC_EP_INT_EN_REG); 141 usb_int_en_reg = udc_read(S3C2410_UDC_USB_INT_EN_REG); 142 udc_write(0, S3C2410_UDC_INDEX_REG); 143 ep0_csr = udc_read(S3C2410_UDC_IN_CSR1_REG); 144 udc_write(1, S3C2410_UDC_INDEX_REG); 145 ep1_i_csr1 = udc_read(S3C2410_UDC_IN_CSR1_REG); 146 ep1_i_csr2 = udc_read(S3C2410_UDC_IN_CSR2_REG); 147 ep1_o_csr1 = udc_read(S3C2410_UDC_IN_CSR1_REG); 148 ep1_o_csr2 = udc_read(S3C2410_UDC_IN_CSR2_REG); 149 udc_write(2, S3C2410_UDC_INDEX_REG); 150 ep2_i_csr1 = udc_read(S3C2410_UDC_IN_CSR1_REG); 151 ep2_i_csr2 = udc_read(S3C2410_UDC_IN_CSR2_REG); 152 ep2_o_csr1 = udc_read(S3C2410_UDC_IN_CSR1_REG); 153 ep2_o_csr2 = udc_read(S3C2410_UDC_IN_CSR2_REG); 154 155 seq_printf(m, "FUNC_ADDR_REG : 0x%04X\n" 156 "PWR_REG : 0x%04X\n" 157 "EP_INT_REG : 0x%04X\n" 158 "USB_INT_REG : 0x%04X\n" 159 "EP_INT_EN_REG : 0x%04X\n" 160 "USB_INT_EN_REG : 0x%04X\n" 161 "EP0_CSR : 0x%04X\n" 162 "EP1_I_CSR1 : 0x%04X\n" 163 "EP1_I_CSR2 : 0x%04X\n" 164 "EP1_O_CSR1 : 0x%04X\n" 165 "EP1_O_CSR2 : 0x%04X\n" 166 "EP2_I_CSR1 : 0x%04X\n" 167 "EP2_I_CSR2 : 0x%04X\n" 168 "EP2_O_CSR1 : 0x%04X\n" 169 "EP2_O_CSR2 : 0x%04X\n", 170 addr_reg, pwr_reg, ep_int_reg, usb_int_reg, 171 ep_int_en_reg, usb_int_en_reg, ep0_csr, 172 ep1_i_csr1, ep1_i_csr2, ep1_o_csr1, ep1_o_csr2, 173 ep2_i_csr1, ep2_i_csr2, ep2_o_csr1, ep2_o_csr2 174 ); 175 176 return 0; 177} 178 179static int s3c2410_udc_debugfs_fops_open(struct inode *inode, 180 struct file *file) 181{ 182 return single_open(file, s3c2410_udc_debugfs_seq_show, NULL); 183} 184 185static const struct file_operations s3c2410_udc_debugfs_fops = { 186 .open = s3c2410_udc_debugfs_fops_open, 187 .read = seq_read, 188 .llseek = seq_lseek, 189 .release = single_release, 190 .owner = THIS_MODULE, 191}; 192 193/* io macros */ 194 195static inline void s3c2410_udc_clear_ep0_opr(void __iomem *base) 196{ 197 udc_writeb(base, S3C2410_UDC_INDEX_EP0, S3C2410_UDC_INDEX_REG); 198 udc_writeb(base, S3C2410_UDC_EP0_CSR_SOPKTRDY, 199 S3C2410_UDC_EP0_CSR_REG); 200} 201 202static inline void s3c2410_udc_clear_ep0_sst(void __iomem *base) 203{ 204 udc_writeb(base, S3C2410_UDC_INDEX_EP0, S3C2410_UDC_INDEX_REG); 205 writeb(0x00, base + S3C2410_UDC_EP0_CSR_REG); 206} 207 208static inline void s3c2410_udc_clear_ep0_se(void __iomem *base) 209{ 210 udc_writeb(base, S3C2410_UDC_INDEX_EP0, S3C2410_UDC_INDEX_REG); 211 udc_writeb(base, S3C2410_UDC_EP0_CSR_SSE, S3C2410_UDC_EP0_CSR_REG); 212} 213 214static inline void s3c2410_udc_set_ep0_ipr(void __iomem *base) 215{ 216 udc_writeb(base, S3C2410_UDC_INDEX_EP0, S3C2410_UDC_INDEX_REG); 217 udc_writeb(base, S3C2410_UDC_EP0_CSR_IPKRDY, S3C2410_UDC_EP0_CSR_REG); 218} 219 220static inline void s3c2410_udc_set_ep0_de(void __iomem *base) 221{ 222 udc_writeb(base, S3C2410_UDC_INDEX_EP0, S3C2410_UDC_INDEX_REG); 223 udc_writeb(base, S3C2410_UDC_EP0_CSR_DE, S3C2410_UDC_EP0_CSR_REG); 224} 225 226inline void s3c2410_udc_set_ep0_ss(void __iomem *b) 227{ 228 udc_writeb(b, S3C2410_UDC_INDEX_EP0, S3C2410_UDC_INDEX_REG); 229 udc_writeb(b, S3C2410_UDC_EP0_CSR_SENDSTL, S3C2410_UDC_EP0_CSR_REG); 230} 231 232static inline void s3c2410_udc_set_ep0_de_out(void __iomem *base) 233{ 234 udc_writeb(base, S3C2410_UDC_INDEX_EP0, S3C2410_UDC_INDEX_REG); 235 236 udc_writeb(base, (S3C2410_UDC_EP0_CSR_SOPKTRDY 237 | S3C2410_UDC_EP0_CSR_DE), 238 S3C2410_UDC_EP0_CSR_REG); 239} 240 241static inline void s3c2410_udc_set_ep0_de_in(void __iomem *base) 242{ 243 udc_writeb(base, S3C2410_UDC_INDEX_EP0, S3C2410_UDC_INDEX_REG); 244 udc_writeb(base, (S3C2410_UDC_EP0_CSR_IPKRDY 245 | S3C2410_UDC_EP0_CSR_DE), 246 S3C2410_UDC_EP0_CSR_REG); 247} 248 249/*------------------------- I/O ----------------------------------*/ 250 251/* 252 * s3c2410_udc_done 253 */ 254static void s3c2410_udc_done(struct s3c2410_ep *ep, 255 struct s3c2410_request *req, int status) 256{ 257 unsigned halted = ep->halted; 258 259 list_del_init(&req->queue); 260 261 if (likely(req->req.status == -EINPROGRESS)) 262 req->req.status = status; 263 else 264 status = req->req.status; 265 266 ep->halted = 1; 267 usb_gadget_giveback_request(&ep->ep, &req->req); 268 ep->halted = halted; 269} 270 271static void s3c2410_udc_nuke(struct s3c2410_udc *udc, 272 struct s3c2410_ep *ep, int status) 273{ 274 /* Sanity check */ 275 if (&ep->queue == NULL) 276 return; 277 278 while (!list_empty(&ep->queue)) { 279 struct s3c2410_request *req; 280 req = list_entry(ep->queue.next, struct s3c2410_request, 281 queue); 282 s3c2410_udc_done(ep, req, status); 283 } 284} 285 286static inline int s3c2410_udc_fifo_count_out(void) 287{ 288 int tmp; 289 290 tmp = udc_read(S3C2410_UDC_OUT_FIFO_CNT2_REG) << 8; 291 tmp |= udc_read(S3C2410_UDC_OUT_FIFO_CNT1_REG); 292 return tmp; 293} 294 295/* 296 * s3c2410_udc_write_packet 297 */ 298static inline int s3c2410_udc_write_packet(int fifo, 299 struct s3c2410_request *req, 300 unsigned max) 301{ 302 unsigned len = min(req->req.length - req->req.actual, max); 303 u8 *buf = req->req.buf + req->req.actual; 304 305 prefetch(buf); 306 307 dprintk(DEBUG_VERBOSE, "%s %d %d %d %d\n", __func__, 308 req->req.actual, req->req.length, len, req->req.actual + len); 309 310 req->req.actual += len; 311 312 udelay(5); 313 writesb(base_addr + fifo, buf, len); 314 return len; 315} 316 317/* 318 * s3c2410_udc_write_fifo 319 * 320 * return: 0 = still running, 1 = completed, negative = errno 321 */ 322static int s3c2410_udc_write_fifo(struct s3c2410_ep *ep, 323 struct s3c2410_request *req) 324{ 325 unsigned count; 326 int is_last; 327 u32 idx; 328 int fifo_reg; 329 u32 ep_csr; 330 331 idx = ep->bEndpointAddress & 0x7F; 332 switch (idx) { 333 default: 334 idx = 0; 335 case 0: 336 fifo_reg = S3C2410_UDC_EP0_FIFO_REG; 337 break; 338 case 1: 339 fifo_reg = S3C2410_UDC_EP1_FIFO_REG; 340 break; 341 case 2: 342 fifo_reg = S3C2410_UDC_EP2_FIFO_REG; 343 break; 344 case 3: 345 fifo_reg = S3C2410_UDC_EP3_FIFO_REG; 346 break; 347 case 4: 348 fifo_reg = S3C2410_UDC_EP4_FIFO_REG; 349 break; 350 } 351 352 count = s3c2410_udc_write_packet(fifo_reg, req, ep->ep.maxpacket); 353 354 /* last packet is often short (sometimes a zlp) */ 355 if (count != ep->ep.maxpacket) 356 is_last = 1; 357 else if (req->req.length != req->req.actual || req->req.zero) 358 is_last = 0; 359 else 360 is_last = 2; 361 362 /* Only ep0 debug messages are interesting */ 363 if (idx == 0) 364 dprintk(DEBUG_NORMAL, 365 "Written ep%d %d.%d of %d b [last %d,z %d]\n", 366 idx, count, req->req.actual, req->req.length, 367 is_last, req->req.zero); 368 369 if (is_last) { 370 /* The order is important. It prevents sending 2 packets 371 * at the same time */ 372 373 if (idx == 0) { 374 /* Reset signal => no need to say 'data sent' */ 375 if (!(udc_read(S3C2410_UDC_USB_INT_REG) 376 & S3C2410_UDC_USBINT_RESET)) 377 s3c2410_udc_set_ep0_de_in(base_addr); 378 ep->dev->ep0state = EP0_IDLE; 379 } else { 380 udc_write(idx, S3C2410_UDC_INDEX_REG); 381 ep_csr = udc_read(S3C2410_UDC_IN_CSR1_REG); 382 udc_write(idx, S3C2410_UDC_INDEX_REG); 383 udc_write(ep_csr | S3C2410_UDC_ICSR1_PKTRDY, 384 S3C2410_UDC_IN_CSR1_REG); 385 } 386 387 s3c2410_udc_done(ep, req, 0); 388 is_last = 1; 389 } else { 390 if (idx == 0) { 391 /* Reset signal => no need to say 'data sent' */ 392 if (!(udc_read(S3C2410_UDC_USB_INT_REG) 393 & S3C2410_UDC_USBINT_RESET)) 394 s3c2410_udc_set_ep0_ipr(base_addr); 395 } else { 396 udc_write(idx, S3C2410_UDC_INDEX_REG); 397 ep_csr = udc_read(S3C2410_UDC_IN_CSR1_REG); 398 udc_write(idx, S3C2410_UDC_INDEX_REG); 399 udc_write(ep_csr | S3C2410_UDC_ICSR1_PKTRDY, 400 S3C2410_UDC_IN_CSR1_REG); 401 } 402 } 403 404 return is_last; 405} 406 407static inline int s3c2410_udc_read_packet(int fifo, u8 *buf, 408 struct s3c2410_request *req, unsigned avail) 409{ 410 unsigned len; 411 412 len = min(req->req.length - req->req.actual, avail); 413 req->req.actual += len; 414 415 readsb(fifo + base_addr, buf, len); 416 return len; 417} 418 419/* 420 * return: 0 = still running, 1 = queue empty, negative = errno 421 */ 422static int s3c2410_udc_read_fifo(struct s3c2410_ep *ep, 423 struct s3c2410_request *req) 424{ 425 u8 *buf; 426 u32 ep_csr; 427 unsigned bufferspace; 428 int is_last = 1; 429 unsigned avail; 430 int fifo_count = 0; 431 u32 idx; 432 int fifo_reg; 433 434 idx = ep->bEndpointAddress & 0x7F; 435 436 switch (idx) { 437 default: 438 idx = 0; 439 case 0: 440 fifo_reg = S3C2410_UDC_EP0_FIFO_REG; 441 break; 442 case 1: 443 fifo_reg = S3C2410_UDC_EP1_FIFO_REG; 444 break; 445 case 2: 446 fifo_reg = S3C2410_UDC_EP2_FIFO_REG; 447 break; 448 case 3: 449 fifo_reg = S3C2410_UDC_EP3_FIFO_REG; 450 break; 451 case 4: 452 fifo_reg = S3C2410_UDC_EP4_FIFO_REG; 453 break; 454 } 455 456 if (!req->req.length) 457 return 1; 458 459 buf = req->req.buf + req->req.actual; 460 bufferspace = req->req.length - req->req.actual; 461 if (!bufferspace) { 462 dprintk(DEBUG_NORMAL, "%s: buffer full!\n", __func__); 463 return -1; 464 } 465 466 udc_write(idx, S3C2410_UDC_INDEX_REG); 467 468 fifo_count = s3c2410_udc_fifo_count_out(); 469 dprintk(DEBUG_NORMAL, "%s fifo count : %d\n", __func__, fifo_count); 470 471 if (fifo_count > ep->ep.maxpacket) 472 avail = ep->ep.maxpacket; 473 else 474 avail = fifo_count; 475 476 fifo_count = s3c2410_udc_read_packet(fifo_reg, buf, req, avail); 477 478 /* checking this with ep0 is not accurate as we already 479 * read a control request 480 **/ 481 if (idx != 0 && fifo_count < ep->ep.maxpacket) { 482 is_last = 1; 483 /* overflowed this request? flush extra data */ 484 if (fifo_count != avail) 485 req->req.status = -EOVERFLOW; 486 } else { 487 is_last = (req->req.length <= req->req.actual) ? 1 : 0; 488 } 489 490 udc_write(idx, S3C2410_UDC_INDEX_REG); 491 fifo_count = s3c2410_udc_fifo_count_out(); 492 493 /* Only ep0 debug messages are interesting */ 494 if (idx == 0) 495 dprintk(DEBUG_VERBOSE, "%s fifo count : %d [last %d]\n", 496 __func__, fifo_count, is_last); 497 498 if (is_last) { 499 if (idx == 0) { 500 s3c2410_udc_set_ep0_de_out(base_addr); 501 ep->dev->ep0state = EP0_IDLE; 502 } else { 503 udc_write(idx, S3C2410_UDC_INDEX_REG); 504 ep_csr = udc_read(S3C2410_UDC_OUT_CSR1_REG); 505 udc_write(idx, S3C2410_UDC_INDEX_REG); 506 udc_write(ep_csr & ~S3C2410_UDC_OCSR1_PKTRDY, 507 S3C2410_UDC_OUT_CSR1_REG); 508 } 509 510 s3c2410_udc_done(ep, req, 0); 511 } else { 512 if (idx == 0) { 513 s3c2410_udc_clear_ep0_opr(base_addr); 514 } else { 515 udc_write(idx, S3C2410_UDC_INDEX_REG); 516 ep_csr = udc_read(S3C2410_UDC_OUT_CSR1_REG); 517 udc_write(idx, S3C2410_UDC_INDEX_REG); 518 udc_write(ep_csr & ~S3C2410_UDC_OCSR1_PKTRDY, 519 S3C2410_UDC_OUT_CSR1_REG); 520 } 521 } 522 523 return is_last; 524} 525 526static int s3c2410_udc_read_fifo_crq(struct usb_ctrlrequest *crq) 527{ 528 unsigned char *outbuf = (unsigned char *)crq; 529 int bytes_read = 0; 530 531 udc_write(0, S3C2410_UDC_INDEX_REG); 532 533 bytes_read = s3c2410_udc_fifo_count_out(); 534 535 dprintk(DEBUG_NORMAL, "%s: fifo_count=%d\n", __func__, bytes_read); 536 537 if (bytes_read > sizeof(struct usb_ctrlrequest)) 538 bytes_read = sizeof(struct usb_ctrlrequest); 539 540 readsb(S3C2410_UDC_EP0_FIFO_REG + base_addr, outbuf, bytes_read); 541 542 dprintk(DEBUG_VERBOSE, "%s: len=%d %02x:%02x {%x,%x,%x}\n", __func__, 543 bytes_read, crq->bRequest, crq->bRequestType, 544 crq->wValue, crq->wIndex, crq->wLength); 545 546 return bytes_read; 547} 548 549static int s3c2410_udc_get_status(struct s3c2410_udc *dev, 550 struct usb_ctrlrequest *crq) 551{ 552 u16 status = 0; 553 u8 ep_num = crq->wIndex & 0x7F; 554 u8 is_in = crq->wIndex & USB_DIR_IN; 555 556 switch (crq->bRequestType & USB_RECIP_MASK) { 557 case USB_RECIP_INTERFACE: 558 break; 559 560 case USB_RECIP_DEVICE: 561 status = dev->devstatus; 562 break; 563 564 case USB_RECIP_ENDPOINT: 565 if (ep_num > 4 || crq->wLength > 2) 566 return 1; 567 568 if (ep_num == 0) { 569 udc_write(0, S3C2410_UDC_INDEX_REG); 570 status = udc_read(S3C2410_UDC_IN_CSR1_REG); 571 status = status & S3C2410_UDC_EP0_CSR_SENDSTL; 572 } else { 573 udc_write(ep_num, S3C2410_UDC_INDEX_REG); 574 if (is_in) { 575 status = udc_read(S3C2410_UDC_IN_CSR1_REG); 576 status = status & S3C2410_UDC_ICSR1_SENDSTL; 577 } else { 578 status = udc_read(S3C2410_UDC_OUT_CSR1_REG); 579 status = status & S3C2410_UDC_OCSR1_SENDSTL; 580 } 581 } 582 583 status = status ? 1 : 0; 584 break; 585 586 default: 587 return 1; 588 } 589 590 /* Seems to be needed to get it working. ouch :( */ 591 udelay(5); 592 udc_write(status & 0xFF, S3C2410_UDC_EP0_FIFO_REG); 593 udc_write(status >> 8, S3C2410_UDC_EP0_FIFO_REG); 594 s3c2410_udc_set_ep0_de_in(base_addr); 595 596 return 0; 597} 598/*------------------------- usb state machine -------------------------------*/ 599static int s3c2410_udc_set_halt(struct usb_ep *_ep, int value); 600 601static void s3c2410_udc_handle_ep0_idle(struct s3c2410_udc *dev, 602 struct s3c2410_ep *ep, 603 struct usb_ctrlrequest *crq, 604 u32 ep0csr) 605{ 606 int len, ret, tmp; 607 608 /* start control request? */ 609 if (!(ep0csr & S3C2410_UDC_EP0_CSR_OPKRDY)) 610 return; 611 612 s3c2410_udc_nuke(dev, ep, -EPROTO); 613 614 len = s3c2410_udc_read_fifo_crq(crq); 615 if (len != sizeof(*crq)) { 616 dprintk(DEBUG_NORMAL, "setup begin: fifo READ ERROR" 617 " wanted %d bytes got %d. Stalling out...\n", 618 sizeof(*crq), len); 619 s3c2410_udc_set_ep0_ss(base_addr); 620 return; 621 } 622 623 dprintk(DEBUG_NORMAL, "bRequest = %d bRequestType %d wLength = %d\n", 624 crq->bRequest, crq->bRequestType, crq->wLength); 625 626 /* cope with automagic for some standard requests. */ 627 dev->req_std = (crq->bRequestType & USB_TYPE_MASK) 628 == USB_TYPE_STANDARD; 629 dev->req_config = 0; 630 dev->req_pending = 1; 631 632 switch (crq->bRequest) { 633 case USB_REQ_SET_CONFIGURATION: 634 dprintk(DEBUG_NORMAL, "USB_REQ_SET_CONFIGURATION ...\n"); 635 636 if (crq->bRequestType == USB_RECIP_DEVICE) { 637 dev->req_config = 1; 638 s3c2410_udc_set_ep0_de_out(base_addr); 639 } 640 break; 641 642 case USB_REQ_SET_INTERFACE: 643 dprintk(DEBUG_NORMAL, "USB_REQ_SET_INTERFACE ...\n"); 644 645 if (crq->bRequestType == USB_RECIP_INTERFACE) { 646 dev->req_config = 1; 647 s3c2410_udc_set_ep0_de_out(base_addr); 648 } 649 break; 650 651 case USB_REQ_SET_ADDRESS: 652 dprintk(DEBUG_NORMAL, "USB_REQ_SET_ADDRESS ...\n"); 653 654 if (crq->bRequestType == USB_RECIP_DEVICE) { 655 tmp = crq->wValue & 0x7F; 656 dev->address = tmp; 657 udc_write((tmp | S3C2410_UDC_FUNCADDR_UPDATE), 658 S3C2410_UDC_FUNC_ADDR_REG); 659 s3c2410_udc_set_ep0_de_out(base_addr); 660 return; 661 } 662 break; 663 664 case USB_REQ_GET_STATUS: 665 dprintk(DEBUG_NORMAL, "USB_REQ_GET_STATUS ...\n"); 666 s3c2410_udc_clear_ep0_opr(base_addr); 667 668 if (dev->req_std) { 669 if (!s3c2410_udc_get_status(dev, crq)) 670 return; 671 } 672 break; 673 674 case USB_REQ_CLEAR_FEATURE: 675 s3c2410_udc_clear_ep0_opr(base_addr); 676 677 if (crq->bRequestType != USB_RECIP_ENDPOINT) 678 break; 679 680 if (crq->wValue != USB_ENDPOINT_HALT || crq->wLength != 0) 681 break; 682 683 s3c2410_udc_set_halt(&dev->ep[crq->wIndex & 0x7f].ep, 0); 684 s3c2410_udc_set_ep0_de_out(base_addr); 685 return; 686 687 case USB_REQ_SET_FEATURE: 688 s3c2410_udc_clear_ep0_opr(base_addr); 689 690 if (crq->bRequestType != USB_RECIP_ENDPOINT) 691 break; 692 693 if (crq->wValue != USB_ENDPOINT_HALT || crq->wLength != 0) 694 break; 695 696 s3c2410_udc_set_halt(&dev->ep[crq->wIndex & 0x7f].ep, 1); 697 s3c2410_udc_set_ep0_de_out(base_addr); 698 return; 699 700 default: 701 s3c2410_udc_clear_ep0_opr(base_addr); 702 break; 703 } 704 705 if (crq->bRequestType & USB_DIR_IN) 706 dev->ep0state = EP0_IN_DATA_PHASE; 707 else 708 dev->ep0state = EP0_OUT_DATA_PHASE; 709 710 if (!dev->driver) 711 return; 712 713 /* deliver the request to the gadget driver */ 714 ret = dev->driver->setup(&dev->gadget, crq); 715 if (ret < 0) { 716 if (dev->req_config) { 717 dprintk(DEBUG_NORMAL, "config change %02x fail %d?\n", 718 crq->bRequest, ret); 719 return; 720 } 721 722 if (ret == -EOPNOTSUPP) 723 dprintk(DEBUG_NORMAL, "Operation not supported\n"); 724 else 725 dprintk(DEBUG_NORMAL, 726 "dev->driver->setup failed. (%d)\n", ret); 727 728 udelay(5); 729 s3c2410_udc_set_ep0_ss(base_addr); 730 s3c2410_udc_set_ep0_de_out(base_addr); 731 dev->ep0state = EP0_IDLE; 732 /* deferred i/o == no response yet */ 733 } else if (dev->req_pending) { 734 dprintk(DEBUG_VERBOSE, "dev->req_pending... what now?\n"); 735 dev->req_pending = 0; 736 } 737 738 dprintk(DEBUG_VERBOSE, "ep0state %s\n", ep0states[dev->ep0state]); 739} 740 741static void s3c2410_udc_handle_ep0(struct s3c2410_udc *dev) 742{ 743 u32 ep0csr; 744 struct s3c2410_ep *ep = &dev->ep[0]; 745 struct s3c2410_request *req; 746 struct usb_ctrlrequest crq; 747 748 if (list_empty(&ep->queue)) 749 req = NULL; 750 else 751 req = list_entry(ep->queue.next, struct s3c2410_request, queue); 752 753 /* We make the assumption that S3C2410_UDC_IN_CSR1_REG equal to 754 * S3C2410_UDC_EP0_CSR_REG when index is zero */ 755 756 udc_write(0, S3C2410_UDC_INDEX_REG); 757 ep0csr = udc_read(S3C2410_UDC_IN_CSR1_REG); 758 759 dprintk(DEBUG_NORMAL, "ep0csr %x ep0state %s\n", 760 ep0csr, ep0states[dev->ep0state]); 761 762 /* clear stall status */ 763 if (ep0csr & S3C2410_UDC_EP0_CSR_SENTSTL) { 764 s3c2410_udc_nuke(dev, ep, -EPIPE); 765 dprintk(DEBUG_NORMAL, "... clear SENT_STALL ...\n"); 766 s3c2410_udc_clear_ep0_sst(base_addr); 767 dev->ep0state = EP0_IDLE; 768 return; 769 } 770 771 /* clear setup end */ 772 if (ep0csr & S3C2410_UDC_EP0_CSR_SE) { 773 dprintk(DEBUG_NORMAL, "... serviced SETUP_END ...\n"); 774 s3c2410_udc_nuke(dev, ep, 0); 775 s3c2410_udc_clear_ep0_se(base_addr); 776 dev->ep0state = EP0_IDLE; 777 } 778 779 switch (dev->ep0state) { 780 case EP0_IDLE: 781 s3c2410_udc_handle_ep0_idle(dev, ep, &crq, ep0csr); 782 break; 783 784 case EP0_IN_DATA_PHASE: /* GET_DESCRIPTOR etc */ 785 dprintk(DEBUG_NORMAL, "EP0_IN_DATA_PHASE ... what now?\n"); 786 if (!(ep0csr & S3C2410_UDC_EP0_CSR_IPKRDY) && req) 787 s3c2410_udc_write_fifo(ep, req); 788 break; 789 790 case EP0_OUT_DATA_PHASE: /* SET_DESCRIPTOR etc */ 791 dprintk(DEBUG_NORMAL, "EP0_OUT_DATA_PHASE ... what now?\n"); 792 if ((ep0csr & S3C2410_UDC_EP0_CSR_OPKRDY) && req) 793 s3c2410_udc_read_fifo(ep, req); 794 break; 795 796 case EP0_END_XFER: 797 dprintk(DEBUG_NORMAL, "EP0_END_XFER ... what now?\n"); 798 dev->ep0state = EP0_IDLE; 799 break; 800 801 case EP0_STALL: 802 dprintk(DEBUG_NORMAL, "EP0_STALL ... what now?\n"); 803 dev->ep0state = EP0_IDLE; 804 break; 805 } 806} 807 808/* 809 * handle_ep - Manage I/O endpoints 810 */ 811 812static void s3c2410_udc_handle_ep(struct s3c2410_ep *ep) 813{ 814 struct s3c2410_request *req; 815 int is_in = ep->bEndpointAddress & USB_DIR_IN; 816 u32 ep_csr1; 817 u32 idx; 818 819 if (likely(!list_empty(&ep->queue))) 820 req = list_entry(ep->queue.next, 821 struct s3c2410_request, queue); 822 else 823 req = NULL; 824 825 idx = ep->bEndpointAddress & 0x7F; 826 827 if (is_in) { 828 udc_write(idx, S3C2410_UDC_INDEX_REG); 829 ep_csr1 = udc_read(S3C2410_UDC_IN_CSR1_REG); 830 dprintk(DEBUG_VERBOSE, "ep%01d write csr:%02x %d\n", 831 idx, ep_csr1, req ? 1 : 0); 832 833 if (ep_csr1 & S3C2410_UDC_ICSR1_SENTSTL) { 834 dprintk(DEBUG_VERBOSE, "st\n"); 835 udc_write(idx, S3C2410_UDC_INDEX_REG); 836 udc_write(ep_csr1 & ~S3C2410_UDC_ICSR1_SENTSTL, 837 S3C2410_UDC_IN_CSR1_REG); 838 return; 839 } 840 841 if (!(ep_csr1 & S3C2410_UDC_ICSR1_PKTRDY) && req) 842 s3c2410_udc_write_fifo(ep, req); 843 } else { 844 udc_write(idx, S3C2410_UDC_INDEX_REG); 845 ep_csr1 = udc_read(S3C2410_UDC_OUT_CSR1_REG); 846 dprintk(DEBUG_VERBOSE, "ep%01d rd csr:%02x\n", idx, ep_csr1); 847 848 if (ep_csr1 & S3C2410_UDC_OCSR1_SENTSTL) { 849 udc_write(idx, S3C2410_UDC_INDEX_REG); 850 udc_write(ep_csr1 & ~S3C2410_UDC_OCSR1_SENTSTL, 851 S3C2410_UDC_OUT_CSR1_REG); 852 return; 853 } 854 855 if ((ep_csr1 & S3C2410_UDC_OCSR1_PKTRDY) && req) 856 s3c2410_udc_read_fifo(ep, req); 857 } 858} 859 860#include <mach/regs-irq.h> 861 862/* 863 * s3c2410_udc_irq - interrupt handler 864 */ 865static irqreturn_t s3c2410_udc_irq(int dummy, void *_dev) 866{ 867 struct s3c2410_udc *dev = _dev; 868 int usb_status; 869 int usbd_status; 870 int pwr_reg; 871 int ep0csr; 872 int i; 873 u32 idx, idx2; 874 unsigned long flags; 875 876 spin_lock_irqsave(&dev->lock, flags); 877 878 /* Driver connected ? */ 879 if (!dev->driver) { 880 /* Clear interrupts */ 881 udc_write(udc_read(S3C2410_UDC_USB_INT_REG), 882 S3C2410_UDC_USB_INT_REG); 883 udc_write(udc_read(S3C2410_UDC_EP_INT_REG), 884 S3C2410_UDC_EP_INT_REG); 885 } 886 887 /* Save index */ 888 idx = udc_read(S3C2410_UDC_INDEX_REG); 889 890 /* Read status registers */ 891 usb_status = udc_read(S3C2410_UDC_USB_INT_REG); 892 usbd_status = udc_read(S3C2410_UDC_EP_INT_REG); 893 pwr_reg = udc_read(S3C2410_UDC_PWR_REG); 894 895 udc_writeb(base_addr, S3C2410_UDC_INDEX_EP0, S3C2410_UDC_INDEX_REG); 896 ep0csr = udc_read(S3C2410_UDC_IN_CSR1_REG); 897 898 dprintk(DEBUG_NORMAL, "usbs=%02x, usbds=%02x, pwr=%02x ep0csr=%02x\n", 899 usb_status, usbd_status, pwr_reg, ep0csr); 900 901 /* 902 * Now, handle interrupts. There's two types : 903 * - Reset, Resume, Suspend coming -> usb_int_reg 904 * - EP -> ep_int_reg 905 */ 906 907 /* RESET */ 908 if (usb_status & S3C2410_UDC_USBINT_RESET) { 909 /* two kind of reset : 910 * - reset start -> pwr reg = 8 911 * - reset end -> pwr reg = 0 912 **/ 913 dprintk(DEBUG_NORMAL, "USB reset csr %x pwr %x\n", 914 ep0csr, pwr_reg); 915 916 dev->gadget.speed = USB_SPEED_UNKNOWN; 917 udc_write(0x00, S3C2410_UDC_INDEX_REG); 918 udc_write((dev->ep[0].ep.maxpacket & 0x7ff) >> 3, 919 S3C2410_UDC_MAXP_REG); 920 dev->address = 0; 921 922 dev->ep0state = EP0_IDLE; 923 dev->gadget.speed = USB_SPEED_FULL; 924 925 /* clear interrupt */ 926 udc_write(S3C2410_UDC_USBINT_RESET, 927 S3C2410_UDC_USB_INT_REG); 928 929 udc_write(idx, S3C2410_UDC_INDEX_REG); 930 spin_unlock_irqrestore(&dev->lock, flags); 931 return IRQ_HANDLED; 932 } 933 934 /* RESUME */ 935 if (usb_status & S3C2410_UDC_USBINT_RESUME) { 936 dprintk(DEBUG_NORMAL, "USB resume\n"); 937 938 /* clear interrupt */ 939 udc_write(S3C2410_UDC_USBINT_RESUME, 940 S3C2410_UDC_USB_INT_REG); 941 942 if (dev->gadget.speed != USB_SPEED_UNKNOWN 943 && dev->driver 944 && dev->driver->resume) 945 dev->driver->resume(&dev->gadget); 946 } 947 948 /* SUSPEND */ 949 if (usb_status & S3C2410_UDC_USBINT_SUSPEND) { 950 dprintk(DEBUG_NORMAL, "USB suspend\n"); 951 952 /* clear interrupt */ 953 udc_write(S3C2410_UDC_USBINT_SUSPEND, 954 S3C2410_UDC_USB_INT_REG); 955 956 if (dev->gadget.speed != USB_SPEED_UNKNOWN 957 && dev->driver 958 && dev->driver->suspend) 959 dev->driver->suspend(&dev->gadget); 960 961 dev->ep0state = EP0_IDLE; 962 } 963 964 /* EP */ 965 /* control traffic */ 966 /* check on ep0csr != 0 is not a good idea as clearing in_pkt_ready 967 * generate an interrupt 968 */ 969 if (usbd_status & S3C2410_UDC_INT_EP0) { 970 dprintk(DEBUG_VERBOSE, "USB ep0 irq\n"); 971 /* Clear the interrupt bit by setting it to 1 */ 972 udc_write(S3C2410_UDC_INT_EP0, S3C2410_UDC_EP_INT_REG); 973 s3c2410_udc_handle_ep0(dev); 974 } 975 976 /* endpoint data transfers */ 977 for (i = 1; i < S3C2410_ENDPOINTS; i++) { 978 u32 tmp = 1 << i; 979 if (usbd_status & tmp) { 980 dprintk(DEBUG_VERBOSE, "USB ep%d irq\n", i); 981 982 /* Clear the interrupt bit by setting it to 1 */ 983 udc_write(tmp, S3C2410_UDC_EP_INT_REG); 984 s3c2410_udc_handle_ep(&dev->ep[i]); 985 } 986 } 987 988 /* what else causes this interrupt? a receive! who is it? */ 989 if (!usb_status && !usbd_status && !pwr_reg && !ep0csr) { 990 for (i = 1; i < S3C2410_ENDPOINTS; i++) { 991 idx2 = udc_read(S3C2410_UDC_INDEX_REG); 992 udc_write(i, S3C2410_UDC_INDEX_REG); 993 994 if (udc_read(S3C2410_UDC_OUT_CSR1_REG) & 0x1) 995 s3c2410_udc_handle_ep(&dev->ep[i]); 996 997 /* restore index */ 998 udc_write(idx2, S3C2410_UDC_INDEX_REG); 999 } 1000 } 1001 1002 dprintk(DEBUG_VERBOSE, "irq: %d s3c2410_udc_done.\n", IRQ_USBD); 1003 1004 /* Restore old index */ 1005 udc_write(idx, S3C2410_UDC_INDEX_REG); 1006 1007 spin_unlock_irqrestore(&dev->lock, flags); 1008 1009 return IRQ_HANDLED; 1010} 1011/*------------------------- s3c2410_ep_ops ----------------------------------*/ 1012 1013static inline struct s3c2410_ep *to_s3c2410_ep(struct usb_ep *ep) 1014{ 1015 return container_of(ep, struct s3c2410_ep, ep); 1016} 1017 1018static inline struct s3c2410_udc *to_s3c2410_udc(struct usb_gadget *gadget) 1019{ 1020 return container_of(gadget, struct s3c2410_udc, gadget); 1021} 1022 1023static inline struct s3c2410_request *to_s3c2410_req(struct usb_request *req) 1024{ 1025 return container_of(req, struct s3c2410_request, req); 1026} 1027 1028/* 1029 * s3c2410_udc_ep_enable 1030 */ 1031static int s3c2410_udc_ep_enable(struct usb_ep *_ep, 1032 const struct usb_endpoint_descriptor *desc) 1033{ 1034 struct s3c2410_udc *dev; 1035 struct s3c2410_ep *ep; 1036 u32 max, tmp; 1037 unsigned long flags; 1038 u32 csr1, csr2; 1039 u32 int_en_reg; 1040 1041 ep = to_s3c2410_ep(_ep); 1042 1043 if (!_ep || !desc 1044 || _ep->name == ep0name 1045 || desc->bDescriptorType != USB_DT_ENDPOINT) 1046 return -EINVAL; 1047 1048 dev = ep->dev; 1049 if (!dev->driver || dev->gadget.speed == USB_SPEED_UNKNOWN) 1050 return -ESHUTDOWN; 1051 1052 max = usb_endpoint_maxp(desc) & 0x1fff; 1053 1054 local_irq_save(flags); 1055 _ep->maxpacket = max & 0x7ff; 1056 ep->ep.desc = desc; 1057 ep->halted = 0; 1058 ep->bEndpointAddress = desc->bEndpointAddress; 1059 1060 /* set max packet */ 1061 udc_write(ep->num, S3C2410_UDC_INDEX_REG); 1062 udc_write(max >> 3, S3C2410_UDC_MAXP_REG); 1063 1064 /* set type, direction, address; reset fifo counters */ 1065 if (desc->bEndpointAddress & USB_DIR_IN) { 1066 csr1 = S3C2410_UDC_ICSR1_FFLUSH|S3C2410_UDC_ICSR1_CLRDT; 1067 csr2 = S3C2410_UDC_ICSR2_MODEIN|S3C2410_UDC_ICSR2_DMAIEN; 1068 1069 udc_write(ep->num, S3C2410_UDC_INDEX_REG); 1070 udc_write(csr1, S3C2410_UDC_IN_CSR1_REG); 1071 udc_write(ep->num, S3C2410_UDC_INDEX_REG); 1072 udc_write(csr2, S3C2410_UDC_IN_CSR2_REG); 1073 } else { 1074 /* don't flush in fifo or it will cause endpoint interrupt */ 1075 csr1 = S3C2410_UDC_ICSR1_CLRDT; 1076 csr2 = S3C2410_UDC_ICSR2_DMAIEN; 1077 1078 udc_write(ep->num, S3C2410_UDC_INDEX_REG); 1079 udc_write(csr1, S3C2410_UDC_IN_CSR1_REG); 1080 udc_write(ep->num, S3C2410_UDC_INDEX_REG); 1081 udc_write(csr2, S3C2410_UDC_IN_CSR2_REG); 1082 1083 csr1 = S3C2410_UDC_OCSR1_FFLUSH | S3C2410_UDC_OCSR1_CLRDT; 1084 csr2 = S3C2410_UDC_OCSR2_DMAIEN; 1085 1086 udc_write(ep->num, S3C2410_UDC_INDEX_REG); 1087 udc_write(csr1, S3C2410_UDC_OUT_CSR1_REG); 1088 udc_write(ep->num, S3C2410_UDC_INDEX_REG); 1089 udc_write(csr2, S3C2410_UDC_OUT_CSR2_REG); 1090 } 1091 1092 /* enable irqs */ 1093 int_en_reg = udc_read(S3C2410_UDC_EP_INT_EN_REG); 1094 udc_write(int_en_reg | (1 << ep->num), S3C2410_UDC_EP_INT_EN_REG); 1095 1096 /* print some debug message */ 1097 tmp = desc->bEndpointAddress; 1098 dprintk(DEBUG_NORMAL, "enable %s(%d) ep%x%s-blk max %02x\n", 1099 _ep->name, ep->num, tmp, 1100 desc->bEndpointAddress & USB_DIR_IN ? "in" : "out", max); 1101 1102 local_irq_restore(flags); 1103 s3c2410_udc_set_halt(_ep, 0); 1104 1105 return 0; 1106} 1107 1108/* 1109 * s3c2410_udc_ep_disable 1110 */ 1111static int s3c2410_udc_ep_disable(struct usb_ep *_ep) 1112{ 1113 struct s3c2410_ep *ep = to_s3c2410_ep(_ep); 1114 unsigned long flags; 1115 u32 int_en_reg; 1116 1117 if (!_ep || !ep->ep.desc) { 1118 dprintk(DEBUG_NORMAL, "%s not enabled\n", 1119 _ep ? ep->ep.name : NULL); 1120 return -EINVAL; 1121 } 1122 1123 local_irq_save(flags); 1124 1125 dprintk(DEBUG_NORMAL, "ep_disable: %s\n", _ep->name); 1126 1127 ep->ep.desc = NULL; 1128 ep->halted = 1; 1129 1130 s3c2410_udc_nuke(ep->dev, ep, -ESHUTDOWN); 1131 1132 /* disable irqs */ 1133 int_en_reg = udc_read(S3C2410_UDC_EP_INT_EN_REG); 1134 udc_write(int_en_reg & ~(1<<ep->num), S3C2410_UDC_EP_INT_EN_REG); 1135 1136 local_irq_restore(flags); 1137 1138 dprintk(DEBUG_NORMAL, "%s disabled\n", _ep->name); 1139 1140 return 0; 1141} 1142 1143/* 1144 * s3c2410_udc_alloc_request 1145 */ 1146static struct usb_request * 1147s3c2410_udc_alloc_request(struct usb_ep *_ep, gfp_t mem_flags) 1148{ 1149 struct s3c2410_request *req; 1150 1151 dprintk(DEBUG_VERBOSE, "%s(%p,%d)\n", __func__, _ep, mem_flags); 1152 1153 if (!_ep) 1154 return NULL; 1155 1156 req = kzalloc(sizeof(struct s3c2410_request), mem_flags); 1157 if (!req) 1158 return NULL; 1159 1160 INIT_LIST_HEAD(&req->queue); 1161 return &req->req; 1162} 1163 1164/* 1165 * s3c2410_udc_free_request 1166 */ 1167static void 1168s3c2410_udc_free_request(struct usb_ep *_ep, struct usb_request *_req) 1169{ 1170 struct s3c2410_ep *ep = to_s3c2410_ep(_ep); 1171 struct s3c2410_request *req = to_s3c2410_req(_req); 1172 1173 dprintk(DEBUG_VERBOSE, "%s(%p,%p)\n", __func__, _ep, _req); 1174 1175 if (!ep || !_req || (!ep->ep.desc && _ep->name != ep0name)) 1176 return; 1177 1178 WARN_ON(!list_empty(&req->queue)); 1179 kfree(req); 1180} 1181 1182/* 1183 * s3c2410_udc_queue 1184 */ 1185static int s3c2410_udc_queue(struct usb_ep *_ep, struct usb_request *_req, 1186 gfp_t gfp_flags) 1187{ 1188 struct s3c2410_request *req = to_s3c2410_req(_req); 1189 struct s3c2410_ep *ep = to_s3c2410_ep(_ep); 1190 struct s3c2410_udc *dev; 1191 u32 ep_csr = 0; 1192 int fifo_count = 0; 1193 unsigned long flags; 1194 1195 if (unlikely(!_ep || (!ep->ep.desc && ep->ep.name != ep0name))) { 1196 dprintk(DEBUG_NORMAL, "%s: invalid args\n", __func__); 1197 return -EINVAL; 1198 } 1199 1200 dev = ep->dev; 1201 if (unlikely(!dev->driver 1202 || dev->gadget.speed == USB_SPEED_UNKNOWN)) { 1203 return -ESHUTDOWN; 1204 } 1205 1206 local_irq_save(flags); 1207 1208 if (unlikely(!_req || !_req->complete 1209 || !_req->buf || !list_empty(&req->queue))) { 1210 if (!_req) 1211 dprintk(DEBUG_NORMAL, "%s: 1 X X X\n", __func__); 1212 else { 1213 dprintk(DEBUG_NORMAL, "%s: 0 %01d %01d %01d\n", 1214 __func__, !_req->complete, !_req->buf, 1215 !list_empty(&req->queue)); 1216 } 1217 1218 local_irq_restore(flags); 1219 return -EINVAL; 1220 } 1221 1222 _req->status = -EINPROGRESS; 1223 _req->actual = 0; 1224 1225 dprintk(DEBUG_VERBOSE, "%s: ep%x len %d\n", 1226 __func__, ep->bEndpointAddress, _req->length); 1227 1228 if (ep->bEndpointAddress) { 1229 udc_write(ep->bEndpointAddress & 0x7F, S3C2410_UDC_INDEX_REG); 1230 1231 ep_csr = udc_read((ep->bEndpointAddress & USB_DIR_IN) 1232 ? S3C2410_UDC_IN_CSR1_REG 1233 : S3C2410_UDC_OUT_CSR1_REG); 1234 fifo_count = s3c2410_udc_fifo_count_out(); 1235 } else { 1236 udc_write(0, S3C2410_UDC_INDEX_REG); 1237 ep_csr = udc_read(S3C2410_UDC_IN_CSR1_REG); 1238 fifo_count = s3c2410_udc_fifo_count_out(); 1239 } 1240 1241 /* kickstart this i/o queue? */ 1242 if (list_empty(&ep->queue) && !ep->halted) { 1243 if (ep->bEndpointAddress == 0 /* ep0 */) { 1244 switch (dev->ep0state) { 1245 case EP0_IN_DATA_PHASE: 1246 if (!(ep_csr&S3C2410_UDC_EP0_CSR_IPKRDY) 1247 && s3c2410_udc_write_fifo(ep, 1248 req)) { 1249 dev->ep0state = EP0_IDLE; 1250 req = NULL; 1251 } 1252 break; 1253 1254 case EP0_OUT_DATA_PHASE: 1255 if ((!_req->length) 1256 || ((ep_csr & S3C2410_UDC_OCSR1_PKTRDY) 1257 && s3c2410_udc_read_fifo(ep, 1258 req))) { 1259 dev->ep0state = EP0_IDLE; 1260 req = NULL; 1261 } 1262 break; 1263 1264 default: 1265 local_irq_restore(flags); 1266 return -EL2HLT; 1267 } 1268 } else if ((ep->bEndpointAddress & USB_DIR_IN) != 0 1269 && (!(ep_csr&S3C2410_UDC_OCSR1_PKTRDY)) 1270 && s3c2410_udc_write_fifo(ep, req)) { 1271 req = NULL; 1272 } else if ((ep_csr & S3C2410_UDC_OCSR1_PKTRDY) 1273 && fifo_count 1274 && s3c2410_udc_read_fifo(ep, req)) { 1275 req = NULL; 1276 } 1277 } 1278 1279 /* pio or dma irq handler advances the queue. */ 1280 if (likely(req)) 1281 list_add_tail(&req->queue, &ep->queue); 1282 1283 local_irq_restore(flags); 1284 1285 dprintk(DEBUG_VERBOSE, "%s ok\n", __func__); 1286 return 0; 1287} 1288 1289/* 1290 * s3c2410_udc_dequeue 1291 */ 1292static int s3c2410_udc_dequeue(struct usb_ep *_ep, struct usb_request *_req) 1293{ 1294 struct s3c2410_ep *ep = to_s3c2410_ep(_ep); 1295 struct s3c2410_udc *udc; 1296 int retval = -EINVAL; 1297 unsigned long flags; 1298 struct s3c2410_request *req = NULL; 1299 1300 dprintk(DEBUG_VERBOSE, "%s(%p,%p)\n", __func__, _ep, _req); 1301 1302 if (!the_controller->driver) 1303 return -ESHUTDOWN; 1304 1305 if (!_ep || !_req) 1306 return retval; 1307 1308 udc = to_s3c2410_udc(ep->gadget); 1309 1310 local_irq_save(flags); 1311 1312 list_for_each_entry(req, &ep->queue, queue) { 1313 if (&req->req == _req) { 1314 list_del_init(&req->queue); 1315 _req->status = -ECONNRESET; 1316 retval = 0; 1317 break; 1318 } 1319 } 1320 1321 if (retval == 0) { 1322 dprintk(DEBUG_VERBOSE, 1323 "dequeued req %p from %s, len %d buf %p\n", 1324 req, _ep->name, _req->length, _req->buf); 1325 1326 s3c2410_udc_done(ep, req, -ECONNRESET); 1327 } 1328 1329 local_irq_restore(flags); 1330 return retval; 1331} 1332 1333/* 1334 * s3c2410_udc_set_halt 1335 */ 1336static int s3c2410_udc_set_halt(struct usb_ep *_ep, int value) 1337{ 1338 struct s3c2410_ep *ep = to_s3c2410_ep(_ep); 1339 u32 ep_csr = 0; 1340 unsigned long flags; 1341 u32 idx; 1342 1343 if (unlikely(!_ep || (!ep->ep.desc && ep->ep.name != ep0name))) { 1344 dprintk(DEBUG_NORMAL, "%s: inval 2\n", __func__); 1345 return -EINVAL; 1346 } 1347 1348 local_irq_save(flags); 1349 1350 idx = ep->bEndpointAddress & 0x7F; 1351 1352 if (idx == 0) { 1353 s3c2410_udc_set_ep0_ss(base_addr); 1354 s3c2410_udc_set_ep0_de_out(base_addr); 1355 } else { 1356 udc_write(idx, S3C2410_UDC_INDEX_REG); 1357 ep_csr = udc_read((ep->bEndpointAddress & USB_DIR_IN) 1358 ? S3C2410_UDC_IN_CSR1_REG 1359 : S3C2410_UDC_OUT_CSR1_REG); 1360 1361 if ((ep->bEndpointAddress & USB_DIR_IN) != 0) { 1362 if (value) 1363 udc_write(ep_csr | S3C2410_UDC_ICSR1_SENDSTL, 1364 S3C2410_UDC_IN_CSR1_REG); 1365 else { 1366 ep_csr &= ~S3C2410_UDC_ICSR1_SENDSTL; 1367 udc_write(ep_csr, S3C2410_UDC_IN_CSR1_REG); 1368 ep_csr |= S3C2410_UDC_ICSR1_CLRDT; 1369 udc_write(ep_csr, S3C2410_UDC_IN_CSR1_REG); 1370 } 1371 } else { 1372 if (value) 1373 udc_write(ep_csr | S3C2410_UDC_OCSR1_SENDSTL, 1374 S3C2410_UDC_OUT_CSR1_REG); 1375 else { 1376 ep_csr &= ~S3C2410_UDC_OCSR1_SENDSTL; 1377 udc_write(ep_csr, S3C2410_UDC_OUT_CSR1_REG); 1378 ep_csr |= S3C2410_UDC_OCSR1_CLRDT; 1379 udc_write(ep_csr, S3C2410_UDC_OUT_CSR1_REG); 1380 } 1381 } 1382 } 1383 1384 ep->halted = value ? 1 : 0; 1385 local_irq_restore(flags); 1386 1387 return 0; 1388} 1389 1390static const struct usb_ep_ops s3c2410_ep_ops = { 1391 .enable = s3c2410_udc_ep_enable, 1392 .disable = s3c2410_udc_ep_disable, 1393 1394 .alloc_request = s3c2410_udc_alloc_request, 1395 .free_request = s3c2410_udc_free_request, 1396 1397 .queue = s3c2410_udc_queue, 1398 .dequeue = s3c2410_udc_dequeue, 1399 1400 .set_halt = s3c2410_udc_set_halt, 1401}; 1402 1403/*------------------------- usb_gadget_ops ----------------------------------*/ 1404 1405/* 1406 * s3c2410_udc_get_frame 1407 */ 1408static int s3c2410_udc_get_frame(struct usb_gadget *_gadget) 1409{ 1410 int tmp; 1411 1412 dprintk(DEBUG_VERBOSE, "%s()\n", __func__); 1413 1414 tmp = udc_read(S3C2410_UDC_FRAME_NUM2_REG) << 8; 1415 tmp |= udc_read(S3C2410_UDC_FRAME_NUM1_REG); 1416 return tmp; 1417} 1418 1419/* 1420 * s3c2410_udc_wakeup 1421 */ 1422static int s3c2410_udc_wakeup(struct usb_gadget *_gadget) 1423{ 1424 dprintk(DEBUG_NORMAL, "%s()\n", __func__); 1425 return 0; 1426} 1427 1428/* 1429 * s3c2410_udc_set_selfpowered 1430 */ 1431static int s3c2410_udc_set_selfpowered(struct usb_gadget *gadget, int value) 1432{ 1433 struct s3c2410_udc *udc = to_s3c2410_udc(gadget); 1434 1435 dprintk(DEBUG_NORMAL, "%s()\n", __func__); 1436 1437 gadget->is_selfpowered = (value != 0); 1438 if (value) 1439 udc->devstatus |= (1 << USB_DEVICE_SELF_POWERED); 1440 else 1441 udc->devstatus &= ~(1 << USB_DEVICE_SELF_POWERED); 1442 1443 return 0; 1444} 1445 1446static void s3c2410_udc_disable(struct s3c2410_udc *dev); 1447static void s3c2410_udc_enable(struct s3c2410_udc *dev); 1448 1449static int s3c2410_udc_set_pullup(struct s3c2410_udc *udc, int is_on) 1450{ 1451 dprintk(DEBUG_NORMAL, "%s()\n", __func__); 1452 1453 if (udc_info && (udc_info->udc_command || 1454 gpio_is_valid(udc_info->pullup_pin))) { 1455 1456 if (is_on) 1457 s3c2410_udc_enable(udc); 1458 else { 1459 if (udc->gadget.speed != USB_SPEED_UNKNOWN) { 1460 if (udc->driver && udc->driver->disconnect) 1461 udc->driver->disconnect(&udc->gadget); 1462 1463 } 1464 s3c2410_udc_disable(udc); 1465 } 1466 } else { 1467 return -EOPNOTSUPP; 1468 } 1469 1470 return 0; 1471} 1472 1473static int s3c2410_udc_vbus_session(struct usb_gadget *gadget, int is_active) 1474{ 1475 struct s3c2410_udc *udc = to_s3c2410_udc(gadget); 1476 1477 dprintk(DEBUG_NORMAL, "%s()\n", __func__); 1478 1479 udc->vbus = (is_active != 0); 1480 s3c2410_udc_set_pullup(udc, is_active); 1481 return 0; 1482} 1483 1484static int s3c2410_udc_pullup(struct usb_gadget *gadget, int is_on) 1485{ 1486 struct s3c2410_udc *udc = to_s3c2410_udc(gadget); 1487 1488 dprintk(DEBUG_NORMAL, "%s()\n", __func__); 1489 1490 s3c2410_udc_set_pullup(udc, is_on); 1491 return 0; 1492} 1493 1494static irqreturn_t s3c2410_udc_vbus_irq(int irq, void *_dev) 1495{ 1496 struct s3c2410_udc *dev = _dev; 1497 unsigned int value; 1498 1499 dprintk(DEBUG_NORMAL, "%s()\n", __func__); 1500 1501 value = gpio_get_value(udc_info->vbus_pin) ? 1 : 0; 1502 if (udc_info->vbus_pin_inverted) 1503 value = !value; 1504 1505 if (value != dev->vbus) 1506 s3c2410_udc_vbus_session(&dev->gadget, value); 1507 1508 return IRQ_HANDLED; 1509} 1510 1511static int s3c2410_vbus_draw(struct usb_gadget *_gadget, unsigned ma) 1512{ 1513 dprintk(DEBUG_NORMAL, "%s()\n", __func__); 1514 1515 if (udc_info && udc_info->vbus_draw) { 1516 udc_info->vbus_draw(ma); 1517 return 0; 1518 } 1519 1520 return -ENOTSUPP; 1521} 1522 1523static int s3c2410_udc_start(struct usb_gadget *g, 1524 struct usb_gadget_driver *driver); 1525static int s3c2410_udc_stop(struct usb_gadget *g); 1526 1527static const struct usb_gadget_ops s3c2410_ops = { 1528 .get_frame = s3c2410_udc_get_frame, 1529 .wakeup = s3c2410_udc_wakeup, 1530 .set_selfpowered = s3c2410_udc_set_selfpowered, 1531 .pullup = s3c2410_udc_pullup, 1532 .vbus_session = s3c2410_udc_vbus_session, 1533 .vbus_draw = s3c2410_vbus_draw, 1534 .udc_start = s3c2410_udc_start, 1535 .udc_stop = s3c2410_udc_stop, 1536}; 1537 1538static void s3c2410_udc_command(enum s3c2410_udc_cmd_e cmd) 1539{ 1540 if (!udc_info) 1541 return; 1542 1543 if (udc_info->udc_command) { 1544 udc_info->udc_command(cmd); 1545 } else if (gpio_is_valid(udc_info->pullup_pin)) { 1546 int value; 1547 1548 switch (cmd) { 1549 case S3C2410_UDC_P_ENABLE: 1550 value = 1; 1551 break; 1552 case S3C2410_UDC_P_DISABLE: 1553 value = 0; 1554 break; 1555 default: 1556 return; 1557 } 1558 value ^= udc_info->pullup_pin_inverted; 1559 1560 gpio_set_value(udc_info->pullup_pin, value); 1561 } 1562} 1563 1564/*------------------------- gadget driver handling---------------------------*/ 1565/* 1566 * s3c2410_udc_disable 1567 */ 1568static void s3c2410_udc_disable(struct s3c2410_udc *dev) 1569{ 1570 dprintk(DEBUG_NORMAL, "%s()\n", __func__); 1571 1572 /* Disable all interrupts */ 1573 udc_write(0x00, S3C2410_UDC_USB_INT_EN_REG); 1574 udc_write(0x00, S3C2410_UDC_EP_INT_EN_REG); 1575 1576 /* Clear the interrupt registers */ 1577 udc_write(S3C2410_UDC_USBINT_RESET 1578 | S3C2410_UDC_USBINT_RESUME 1579 | S3C2410_UDC_USBINT_SUSPEND, 1580 S3C2410_UDC_USB_INT_REG); 1581 1582 udc_write(0x1F, S3C2410_UDC_EP_INT_REG); 1583 1584 /* Good bye, cruel world */ 1585 s3c2410_udc_command(S3C2410_UDC_P_DISABLE); 1586 1587 /* Set speed to unknown */ 1588 dev->gadget.speed = USB_SPEED_UNKNOWN; 1589} 1590 1591/* 1592 * s3c2410_udc_reinit 1593 */ 1594static void s3c2410_udc_reinit(struct s3c2410_udc *dev) 1595{ 1596 u32 i; 1597 1598 /* device/ep0 records init */ 1599 INIT_LIST_HEAD(&dev->gadget.ep_list); 1600 INIT_LIST_HEAD(&dev->gadget.ep0->ep_list); 1601 dev->ep0state = EP0_IDLE; 1602 1603 for (i = 0; i < S3C2410_ENDPOINTS; i++) { 1604 struct s3c2410_ep *ep = &dev->ep[i]; 1605 1606 if (i != 0) 1607 list_add_tail(&ep->ep.ep_list, &dev->gadget.ep_list); 1608 1609 ep->dev = dev; 1610 ep->ep.desc = NULL; 1611 ep->halted = 0; 1612 INIT_LIST_HEAD(&ep->queue); 1613 usb_ep_set_maxpacket_limit(&ep->ep, ep->ep.maxpacket); 1614 } 1615} 1616 1617/* 1618 * s3c2410_udc_enable 1619 */ 1620static void s3c2410_udc_enable(struct s3c2410_udc *dev) 1621{ 1622 int i; 1623 1624 dprintk(DEBUG_NORMAL, "s3c2410_udc_enable called\n"); 1625 1626 /* dev->gadget.speed = USB_SPEED_UNKNOWN; */ 1627 dev->gadget.speed = USB_SPEED_FULL; 1628 1629 /* Set MAXP for all endpoints */ 1630 for (i = 0; i < S3C2410_ENDPOINTS; i++) { 1631 udc_write(i, S3C2410_UDC_INDEX_REG); 1632 udc_write((dev->ep[i].ep.maxpacket & 0x7ff) >> 3, 1633 S3C2410_UDC_MAXP_REG); 1634 } 1635 1636 /* Set default power state */ 1637 udc_write(DEFAULT_POWER_STATE, S3C2410_UDC_PWR_REG); 1638 1639 /* Enable reset and suspend interrupt interrupts */ 1640 udc_write(S3C2410_UDC_USBINT_RESET | S3C2410_UDC_USBINT_SUSPEND, 1641 S3C2410_UDC_USB_INT_EN_REG); 1642 1643 /* Enable ep0 interrupt */ 1644 udc_write(S3C2410_UDC_INT_EP0, S3C2410_UDC_EP_INT_EN_REG); 1645 1646 /* time to say "hello, world" */ 1647 s3c2410_udc_command(S3C2410_UDC_P_ENABLE); 1648} 1649 1650static int s3c2410_udc_start(struct usb_gadget *g, 1651 struct usb_gadget_driver *driver) 1652{ 1653 struct s3c2410_udc *udc = to_s3c2410(g); 1654 1655 dprintk(DEBUG_NORMAL, "%s() '%s'\n", __func__, driver->driver.name); 1656 1657 /* Hook the driver */ 1658 udc->driver = driver; 1659 1660 /* Enable udc */ 1661 s3c2410_udc_enable(udc); 1662 1663 return 0; 1664} 1665 1666static int s3c2410_udc_stop(struct usb_gadget *g) 1667{ 1668 struct s3c2410_udc *udc = to_s3c2410(g); 1669 1670 udc->driver = NULL; 1671 1672 /* Disable udc */ 1673 s3c2410_udc_disable(udc); 1674 1675 return 0; 1676} 1677 1678/*---------------------------------------------------------------------------*/ 1679static struct s3c2410_udc memory = { 1680 .gadget = { 1681 .ops = &s3c2410_ops, 1682 .ep0 = &memory.ep[0].ep, 1683 .name = gadget_name, 1684 .dev = { 1685 .init_name = "gadget", 1686 }, 1687 }, 1688 1689 /* control endpoint */ 1690 .ep[0] = { 1691 .num = 0, 1692 .ep = { 1693 .name = ep0name, 1694 .ops = &s3c2410_ep_ops, 1695 .maxpacket = EP0_FIFO_SIZE, 1696 }, 1697 .dev = &memory, 1698 }, 1699 1700 /* first group of endpoints */ 1701 .ep[1] = { 1702 .num = 1, 1703 .ep = { 1704 .name = "ep1-bulk", 1705 .ops = &s3c2410_ep_ops, 1706 .maxpacket = EP_FIFO_SIZE, 1707 }, 1708 .dev = &memory, 1709 .fifo_size = EP_FIFO_SIZE, 1710 .bEndpointAddress = 1, 1711 .bmAttributes = USB_ENDPOINT_XFER_BULK, 1712 }, 1713 .ep[2] = { 1714 .num = 2, 1715 .ep = { 1716 .name = "ep2-bulk", 1717 .ops = &s3c2410_ep_ops, 1718 .maxpacket = EP_FIFO_SIZE, 1719 }, 1720 .dev = &memory, 1721 .fifo_size = EP_FIFO_SIZE, 1722 .bEndpointAddress = 2, 1723 .bmAttributes = USB_ENDPOINT_XFER_BULK, 1724 }, 1725 .ep[3] = { 1726 .num = 3, 1727 .ep = { 1728 .name = "ep3-bulk", 1729 .ops = &s3c2410_ep_ops, 1730 .maxpacket = EP_FIFO_SIZE, 1731 }, 1732 .dev = &memory, 1733 .fifo_size = EP_FIFO_SIZE, 1734 .bEndpointAddress = 3, 1735 .bmAttributes = USB_ENDPOINT_XFER_BULK, 1736 }, 1737 .ep[4] = { 1738 .num = 4, 1739 .ep = { 1740 .name = "ep4-bulk", 1741 .ops = &s3c2410_ep_ops, 1742 .maxpacket = EP_FIFO_SIZE, 1743 }, 1744 .dev = &memory, 1745 .fifo_size = EP_FIFO_SIZE, 1746 .bEndpointAddress = 4, 1747 .bmAttributes = USB_ENDPOINT_XFER_BULK, 1748 } 1749 1750}; 1751 1752/* 1753 * probe - binds to the platform device 1754 */ 1755static int s3c2410_udc_probe(struct platform_device *pdev) 1756{ 1757 struct s3c2410_udc *udc = &memory; 1758 struct device *dev = &pdev->dev; 1759 int retval; 1760 int irq; 1761 1762 dev_dbg(dev, "%s()\n", __func__); 1763 1764 usb_bus_clock = clk_get(NULL, "usb-bus-gadget"); 1765 if (IS_ERR(usb_bus_clock)) { 1766 dev_err(dev, "failed to get usb bus clock source\n"); 1767 return PTR_ERR(usb_bus_clock); 1768 } 1769 1770 clk_prepare_enable(usb_bus_clock); 1771 1772 udc_clock = clk_get(NULL, "usb-device"); 1773 if (IS_ERR(udc_clock)) { 1774 dev_err(dev, "failed to get udc clock source\n"); 1775 return PTR_ERR(udc_clock); 1776 } 1777 1778 clk_prepare_enable(udc_clock); 1779 1780 mdelay(10); 1781 1782 dev_dbg(dev, "got and enabled clocks\n"); 1783 1784 if (strncmp(pdev->name, "s3c2440", 7) == 0) { 1785 dev_info(dev, "S3C2440: increasing FIFO to 128 bytes\n"); 1786 memory.ep[1].fifo_size = S3C2440_EP_FIFO_SIZE; 1787 memory.ep[2].fifo_size = S3C2440_EP_FIFO_SIZE; 1788 memory.ep[3].fifo_size = S3C2440_EP_FIFO_SIZE; 1789 memory.ep[4].fifo_size = S3C2440_EP_FIFO_SIZE; 1790 } 1791 1792 spin_lock_init(&udc->lock); 1793 udc_info = dev_get_platdata(&pdev->dev); 1794 1795 rsrc_start = S3C2410_PA_USBDEV; 1796 rsrc_len = S3C24XX_SZ_USBDEV; 1797 1798 if (!request_mem_region(rsrc_start, rsrc_len, gadget_name)) 1799 return -EBUSY; 1800 1801 base_addr = ioremap(rsrc_start, rsrc_len); 1802 if (!base_addr) { 1803 retval = -ENOMEM; 1804 goto err_mem; 1805 } 1806 1807 the_controller = udc; 1808 platform_set_drvdata(pdev, udc); 1809 1810 s3c2410_udc_disable(udc); 1811 s3c2410_udc_reinit(udc); 1812 1813 /* irq setup after old hardware state is cleaned up */ 1814 retval = request_irq(IRQ_USBD, s3c2410_udc_irq, 1815 0, gadget_name, udc); 1816 1817 if (retval != 0) { 1818 dev_err(dev, "cannot get irq %i, err %d\n", IRQ_USBD, retval); 1819 retval = -EBUSY; 1820 goto err_map; 1821 } 1822 1823 dev_dbg(dev, "got irq %i\n", IRQ_USBD); 1824 1825 if (udc_info && udc_info->vbus_pin > 0) { 1826 retval = gpio_request(udc_info->vbus_pin, "udc vbus"); 1827 if (retval < 0) { 1828 dev_err(dev, "cannot claim vbus pin\n"); 1829 goto err_int; 1830 } 1831 1832 irq = gpio_to_irq(udc_info->vbus_pin); 1833 if (irq < 0) { 1834 dev_err(dev, "no irq for gpio vbus pin\n"); 1835 retval = irq; 1836 goto err_gpio_claim; 1837 } 1838 1839 retval = request_irq(irq, s3c2410_udc_vbus_irq, 1840 IRQF_TRIGGER_RISING 1841 | IRQF_TRIGGER_FALLING | IRQF_SHARED, 1842 gadget_name, udc); 1843 1844 if (retval != 0) { 1845 dev_err(dev, "can't get vbus irq %d, err %d\n", 1846 irq, retval); 1847 retval = -EBUSY; 1848 goto err_gpio_claim; 1849 } 1850 1851 dev_dbg(dev, "got irq %i\n", irq); 1852 } else { 1853 udc->vbus = 1; 1854 } 1855 1856 if (udc_info && !udc_info->udc_command && 1857 gpio_is_valid(udc_info->pullup_pin)) { 1858 1859 retval = gpio_request_one(udc_info->pullup_pin, 1860 udc_info->vbus_pin_inverted ? 1861 GPIOF_OUT_INIT_HIGH : GPIOF_OUT_INIT_LOW, 1862 "udc pullup"); 1863 if (retval) 1864 goto err_vbus_irq; 1865 } 1866 1867 retval = usb_add_gadget_udc(&pdev->dev, &udc->gadget); 1868 if (retval) 1869 goto err_add_udc; 1870 1871 if (s3c2410_udc_debugfs_root) { 1872 udc->regs_info = debugfs_create_file("registers", S_IRUGO, 1873 s3c2410_udc_debugfs_root, 1874 udc, &s3c2410_udc_debugfs_fops); 1875 if (!udc->regs_info) 1876 dev_warn(dev, "debugfs file creation failed\n"); 1877 } 1878 1879 dev_dbg(dev, "probe ok\n"); 1880 1881 return 0; 1882 1883err_add_udc: 1884 if (udc_info && !udc_info->udc_command && 1885 gpio_is_valid(udc_info->pullup_pin)) 1886 gpio_free(udc_info->pullup_pin); 1887err_vbus_irq: 1888 if (udc_info && udc_info->vbus_pin > 0) 1889 free_irq(gpio_to_irq(udc_info->vbus_pin), udc); 1890err_gpio_claim: 1891 if (udc_info && udc_info->vbus_pin > 0) 1892 gpio_free(udc_info->vbus_pin); 1893err_int: 1894 free_irq(IRQ_USBD, udc); 1895err_map: 1896 iounmap(base_addr); 1897err_mem: 1898 release_mem_region(rsrc_start, rsrc_len); 1899 1900 return retval; 1901} 1902 1903/* 1904 * s3c2410_udc_remove 1905 */ 1906static int s3c2410_udc_remove(struct platform_device *pdev) 1907{ 1908 struct s3c2410_udc *udc = platform_get_drvdata(pdev); 1909 unsigned int irq; 1910 1911 dev_dbg(&pdev->dev, "%s()\n", __func__); 1912 1913 if (udc->driver) 1914 return -EBUSY; 1915 1916 usb_del_gadget_udc(&udc->gadget); 1917 debugfs_remove(udc->regs_info); 1918 1919 if (udc_info && !udc_info->udc_command && 1920 gpio_is_valid(udc_info->pullup_pin)) 1921 gpio_free(udc_info->pullup_pin); 1922 1923 if (udc_info && udc_info->vbus_pin > 0) { 1924 irq = gpio_to_irq(udc_info->vbus_pin); 1925 free_irq(irq, udc); 1926 } 1927 1928 free_irq(IRQ_USBD, udc); 1929 1930 iounmap(base_addr); 1931 release_mem_region(rsrc_start, rsrc_len); 1932 1933 if (!IS_ERR(udc_clock) && udc_clock != NULL) { 1934 clk_disable_unprepare(udc_clock); 1935 clk_put(udc_clock); 1936 udc_clock = NULL; 1937 } 1938 1939 if (!IS_ERR(usb_bus_clock) && usb_bus_clock != NULL) { 1940 clk_disable_unprepare(usb_bus_clock); 1941 clk_put(usb_bus_clock); 1942 usb_bus_clock = NULL; 1943 } 1944 1945 dev_dbg(&pdev->dev, "%s: remove ok\n", __func__); 1946 return 0; 1947} 1948 1949#ifdef CONFIG_PM 1950static int 1951s3c2410_udc_suspend(struct platform_device *pdev, pm_message_t message) 1952{ 1953 s3c2410_udc_command(S3C2410_UDC_P_DISABLE); 1954 1955 return 0; 1956} 1957 1958static int s3c2410_udc_resume(struct platform_device *pdev) 1959{ 1960 s3c2410_udc_command(S3C2410_UDC_P_ENABLE); 1961 1962 return 0; 1963} 1964#else 1965#define s3c2410_udc_suspend NULL 1966#define s3c2410_udc_resume NULL 1967#endif 1968 1969static const struct platform_device_id s3c_udc_ids[] = { 1970 { "s3c2410-usbgadget", }, 1971 { "s3c2440-usbgadget", }, 1972 { } 1973}; 1974MODULE_DEVICE_TABLE(platform, s3c_udc_ids); 1975 1976static struct platform_driver udc_driver_24x0 = { 1977 .driver = { 1978 .name = "s3c24x0-usbgadget", 1979 }, 1980 .probe = s3c2410_udc_probe, 1981 .remove = s3c2410_udc_remove, 1982 .suspend = s3c2410_udc_suspend, 1983 .resume = s3c2410_udc_resume, 1984 .id_table = s3c_udc_ids, 1985}; 1986 1987static int __init udc_init(void) 1988{ 1989 int retval; 1990 1991 dprintk(DEBUG_NORMAL, "%s: version %s\n", gadget_name, DRIVER_VERSION); 1992 1993 s3c2410_udc_debugfs_root = debugfs_create_dir(gadget_name, NULL); 1994 if (IS_ERR(s3c2410_udc_debugfs_root)) { 1995 pr_err("%s: debugfs dir creation failed %ld\n", 1996 gadget_name, PTR_ERR(s3c2410_udc_debugfs_root)); 1997 s3c2410_udc_debugfs_root = NULL; 1998 } 1999 2000 retval = platform_driver_register(&udc_driver_24x0); 2001 if (retval) 2002 goto err; 2003 2004 return 0; 2005 2006err: 2007 debugfs_remove(s3c2410_udc_debugfs_root); 2008 return retval; 2009} 2010 2011static void __exit udc_exit(void) 2012{ 2013 platform_driver_unregister(&udc_driver_24x0); 2014 debugfs_remove(s3c2410_udc_debugfs_root); 2015} 2016 2017module_init(udc_init); 2018module_exit(udc_exit); 2019 2020MODULE_AUTHOR(DRIVER_AUTHOR); 2021MODULE_DESCRIPTION(DRIVER_DESC); 2022MODULE_VERSION(DRIVER_VERSION); 2023MODULE_LICENSE("GPL"); 2024