1config USB_DWC3
2	tristate "DesignWare USB3 DRD Core Support"
3	depends on (USB || USB_GADGET) && HAS_DMA
4	select USB_XHCI_PLATFORM if USB_SUPPORT && USB_XHCI_HCD
5	help
6	  Say Y or M here if your system has a Dual Role SuperSpeed
7	  USB controller based on the DesignWare USB3 IP Core.
8
9	  If you choose to build this driver is a dynamically linked
10	  module, the module will be called dwc3.ko.
11
12if USB_DWC3
13
14choice
15	bool "DWC3 Mode Selection"
16	default USB_DWC3_DUAL_ROLE if (USB && USB_GADGET)
17	default USB_DWC3_HOST if (USB && !USB_GADGET)
18	default USB_DWC3_GADGET if (!USB && USB_GADGET)
19
20config USB_DWC3_HOST
21	bool "Host only mode"
22	depends on USB=y || USB=USB_DWC3
23	help
24	  Select this when you want to use DWC3 in host mode only,
25	  thereby the gadget feature will be regressed.
26
27config USB_DWC3_GADGET
28	bool "Gadget only mode"
29	depends on USB_GADGET=y || USB_GADGET=USB_DWC3
30	help
31	  Select this when you want to use DWC3 in gadget mode only,
32	  thereby the host feature will be regressed.
33
34config USB_DWC3_DUAL_ROLE
35	bool "Dual Role mode"
36	depends on ((USB=y || USB=USB_DWC3) && (USB_GADGET=y || USB_GADGET=USB_DWC3))
37	help
38	  This is the default mode of working of DWC3 controller where
39	  both host and gadget features are enabled.
40
41endchoice
42
43comment "Platform Glue Driver Support"
44
45config USB_DWC3_OMAP
46	tristate "Texas Instruments OMAP5 and similar Platforms"
47	depends on EXTCON && (ARCH_OMAP2PLUS || COMPILE_TEST)
48	depends on OF
49	default USB_DWC3
50	help
51	  Some platforms from Texas Instruments like OMAP5, DRA7xxx and
52	  AM437x use this IP for USB2/3 functionality.
53
54	  Say 'Y' or 'M' here if you have one such device
55
56config USB_DWC3_EXYNOS
57	tristate "Samsung Exynos Platform"
58	depends on ARCH_EXYNOS && OF || COMPILE_TEST
59	default USB_DWC3
60	help
61	  Recent Exynos5 SoCs ship with one DesignWare Core USB3 IP inside,
62	  say 'Y' or 'M' if you have one such device.
63
64config USB_DWC3_PCI
65	tristate "PCIe-based Platforms"
66	depends on PCI
67	default USB_DWC3
68	help
69	  If you're using the DesignWare Core IP with a PCIe, please say
70	  'Y' or 'M' here.
71
72	  One such PCIe-based platform is Synopsys' PCIe HAPS model of
73	  this IP.
74
75config USB_DWC3_KEYSTONE
76	tristate "Texas Instruments Keystone2 Platforms"
77	depends on ARCH_KEYSTONE || COMPILE_TEST
78	default USB_DWC3
79	help
80	  Support of USB2/3 functionality in TI Keystone2 platforms.
81	  Say 'Y' or 'M' here if you have one such device
82
83config USB_DWC3_ST
84	tristate "STMicroelectronics Platforms"
85	depends on ARCH_STI && OF
86	default USB_DWC3
87	help
88	  STMicroelectronics SoCs with one DesignWare Core USB3 IP
89	  inside (i.e. STiH407).
90	  Say 'Y' or 'M' if you have one such device.
91
92config USB_DWC3_QCOM
93	tristate "Qualcomm Platforms"
94	depends on ARCH_QCOM || COMPILE_TEST
95	default USB_DWC3
96	help
97	  Recent Qualcomm SoCs ship with one DesignWare Core USB3 IP inside,
98	  say 'Y' or 'M' if you have one such device.
99
100comment "Debugging features"
101
102config USB_DWC3_DEBUG
103	bool "Enable Debugging Messages"
104	help
105	  Say Y here to enable debugging messages on DWC3 Driver.
106
107endif
108