1/* 2 * platform.c - DesignWare HS OTG Controller platform driver 3 * 4 * Copyright (C) Matthijs Kooijman <matthijs@stdin.nl> 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions, and the following disclaimer, 11 * without modification. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 3. The names of the above-listed copyright holders may not be used 16 * to endorse or promote products derived from this software without 17 * specific prior written permission. 18 * 19 * ALTERNATIVELY, this software may be distributed under the terms of the 20 * GNU General Public License ("GPL") as published by the Free Software 21 * Foundation; either version 2 of the License, or (at your option) any 22 * later version. 23 * 24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS 25 * IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, 26 * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 27 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR 28 * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, 29 * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, 30 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR 31 * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF 32 * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING 33 * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS 34 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 35 */ 36 37#include <linux/kernel.h> 38#include <linux/module.h> 39#include <linux/slab.h> 40#include <linux/device.h> 41#include <linux/dma-mapping.h> 42#include <linux/of_device.h> 43#include <linux/mutex.h> 44#include <linux/platform_device.h> 45 46#include <linux/usb/of.h> 47 48#include "core.h" 49#include "hcd.h" 50 51static const char dwc2_driver_name[] = "dwc2"; 52 53static const struct dwc2_core_params params_bcm2835 = { 54 .otg_cap = 0, /* HNP/SRP capable */ 55 .otg_ver = 0, /* 1.3 */ 56 .dma_enable = 1, 57 .dma_desc_enable = 0, 58 .speed = 0, /* High Speed */ 59 .enable_dynamic_fifo = 1, 60 .en_multiple_tx_fifo = 1, 61 .host_rx_fifo_size = 774, /* 774 DWORDs */ 62 .host_nperio_tx_fifo_size = 256, /* 256 DWORDs */ 63 .host_perio_tx_fifo_size = 512, /* 512 DWORDs */ 64 .max_transfer_size = 65535, 65 .max_packet_count = 511, 66 .host_channels = 8, 67 .phy_type = 1, /* UTMI */ 68 .phy_utmi_width = 8, /* 8 bits */ 69 .phy_ulpi_ddr = 0, /* Single */ 70 .phy_ulpi_ext_vbus = 0, 71 .i2c_enable = 0, 72 .ulpi_fs_ls = 0, 73 .host_support_fs_ls_low_power = 0, 74 .host_ls_low_power_phy_clk = 0, /* 48 MHz */ 75 .ts_dline = 0, 76 .reload_ctl = 0, 77 .ahbcfg = 0x10, 78 .uframe_sched = 0, 79}; 80 81static const struct dwc2_core_params params_rk3066 = { 82 .otg_cap = 2, /* non-HNP/non-SRP */ 83 .otg_ver = -1, 84 .dma_enable = -1, 85 .dma_desc_enable = 0, 86 .speed = -1, 87 .enable_dynamic_fifo = 1, 88 .en_multiple_tx_fifo = -1, 89 .host_rx_fifo_size = 520, /* 520 DWORDs */ 90 .host_nperio_tx_fifo_size = 128, /* 128 DWORDs */ 91 .host_perio_tx_fifo_size = 256, /* 256 DWORDs */ 92 .max_transfer_size = 65535, 93 .max_packet_count = -1, 94 .host_channels = -1, 95 .phy_type = -1, 96 .phy_utmi_width = -1, 97 .phy_ulpi_ddr = -1, 98 .phy_ulpi_ext_vbus = -1, 99 .i2c_enable = -1, 100 .ulpi_fs_ls = -1, 101 .host_support_fs_ls_low_power = -1, 102 .host_ls_low_power_phy_clk = -1, 103 .ts_dline = -1, 104 .reload_ctl = -1, 105 .ahbcfg = 0x7, /* INCR16 */ 106 .uframe_sched = -1, 107}; 108 109/** 110 * dwc2_driver_remove() - Called when the DWC_otg core is unregistered with the 111 * DWC_otg driver 112 * 113 * @dev: Platform device 114 * 115 * This routine is called, for example, when the rmmod command is executed. The 116 * device may or may not be electrically present. If it is present, the driver 117 * stops device processing. Any resources used on behalf of this device are 118 * freed. 119 */ 120static int dwc2_driver_remove(struct platform_device *dev) 121{ 122 struct dwc2_hsotg *hsotg = platform_get_drvdata(dev); 123 124 if (hsotg->hcd_enabled) 125 dwc2_hcd_remove(hsotg); 126 if (hsotg->gadget_enabled) 127 s3c_hsotg_remove(hsotg); 128 129 return 0; 130} 131 132static const struct of_device_id dwc2_of_match_table[] = { 133 { .compatible = "brcm,bcm2835-usb", .data = ¶ms_bcm2835 }, 134 { .compatible = "rockchip,rk3066-usb", .data = ¶ms_rk3066 }, 135 { .compatible = "snps,dwc2", .data = NULL }, 136 { .compatible = "samsung,s3c6400-hsotg", .data = NULL}, 137 {}, 138}; 139MODULE_DEVICE_TABLE(of, dwc2_of_match_table); 140 141/** 142 * dwc2_driver_probe() - Called when the DWC_otg core is bound to the DWC_otg 143 * driver 144 * 145 * @dev: Platform device 146 * 147 * This routine creates the driver components required to control the device 148 * (core, HCD, and PCD) and initializes the device. The driver components are 149 * stored in a dwc2_hsotg structure. A reference to the dwc2_hsotg is saved 150 * in the device private data. This allows the driver to access the dwc2_hsotg 151 * structure on subsequent calls to driver methods for this device. 152 */ 153static int dwc2_driver_probe(struct platform_device *dev) 154{ 155 const struct of_device_id *match; 156 const struct dwc2_core_params *params; 157 struct dwc2_core_params defparams; 158 struct dwc2_hsotg *hsotg; 159 struct resource *res; 160 struct phy *phy; 161 struct usb_phy *uphy; 162 int retval; 163 int irq; 164 165 match = of_match_device(dwc2_of_match_table, &dev->dev); 166 if (match && match->data) { 167 params = match->data; 168 } else { 169 /* Default all params to autodetect */ 170 dwc2_set_all_params(&defparams, -1); 171 params = &defparams; 172 173 /* 174 * Disable descriptor dma mode by default as the HW can support 175 * it, but does not support it for SPLIT transactions. 176 */ 177 defparams.dma_desc_enable = 0; 178 } 179 180 hsotg = devm_kzalloc(&dev->dev, sizeof(*hsotg), GFP_KERNEL); 181 if (!hsotg) 182 return -ENOMEM; 183 184 hsotg->dev = &dev->dev; 185 186 /* 187 * Use reasonable defaults so platforms don't have to provide these. 188 */ 189 if (!dev->dev.dma_mask) 190 dev->dev.dma_mask = &dev->dev.coherent_dma_mask; 191 retval = dma_set_coherent_mask(&dev->dev, DMA_BIT_MASK(32)); 192 if (retval) 193 return retval; 194 195 irq = platform_get_irq(dev, 0); 196 if (irq < 0) { 197 dev_err(&dev->dev, "missing IRQ resource\n"); 198 return irq; 199 } 200 201 dev_dbg(hsotg->dev, "registering common handler for irq%d\n", 202 irq); 203 retval = devm_request_irq(hsotg->dev, irq, 204 dwc2_handle_common_intr, IRQF_SHARED, 205 dev_name(hsotg->dev), hsotg); 206 if (retval) 207 return retval; 208 209 res = platform_get_resource(dev, IORESOURCE_MEM, 0); 210 hsotg->regs = devm_ioremap_resource(&dev->dev, res); 211 if (IS_ERR(hsotg->regs)) 212 return PTR_ERR(hsotg->regs); 213 214 dev_dbg(&dev->dev, "mapped PA %08lx to VA %p\n", 215 (unsigned long)res->start, hsotg->regs); 216 217 hsotg->dr_mode = of_usb_get_dr_mode(dev->dev.of_node); 218 219 /* 220 * Attempt to find a generic PHY, then look for an old style 221 * USB PHY 222 */ 223 phy = devm_phy_get(&dev->dev, "usb2-phy"); 224 if (IS_ERR(phy)) { 225 hsotg->phy = NULL; 226 uphy = devm_usb_get_phy(&dev->dev, USB_PHY_TYPE_USB2); 227 if (IS_ERR(uphy)) 228 hsotg->uphy = NULL; 229 else 230 hsotg->uphy = uphy; 231 } else { 232 hsotg->phy = phy; 233 phy_power_on(hsotg->phy); 234 phy_init(hsotg->phy); 235 } 236 237 spin_lock_init(&hsotg->lock); 238 mutex_init(&hsotg->init_mutex); 239 240 if (hsotg->dr_mode != USB_DR_MODE_HOST) { 241 retval = dwc2_gadget_init(hsotg, irq); 242 if (retval) 243 return retval; 244 hsotg->gadget_enabled = 1; 245 } 246 247 if (hsotg->dr_mode != USB_DR_MODE_PERIPHERAL) { 248 retval = dwc2_hcd_init(hsotg, irq, params); 249 if (retval) { 250 if (hsotg->gadget_enabled) 251 s3c_hsotg_remove(hsotg); 252 return retval; 253 } 254 hsotg->hcd_enabled = 1; 255 } 256 257 platform_set_drvdata(dev, hsotg); 258 259 return retval; 260} 261 262static int __maybe_unused dwc2_suspend(struct device *dev) 263{ 264 struct dwc2_hsotg *dwc2 = dev_get_drvdata(dev); 265 int ret = 0; 266 267 if (dwc2_is_device_mode(dwc2)) { 268 ret = s3c_hsotg_suspend(dwc2); 269 } else { 270 if (dwc2->lx_state == DWC2_L0) 271 return 0; 272 phy_exit(dwc2->phy); 273 phy_power_off(dwc2->phy); 274 275 } 276 return ret; 277} 278 279static int __maybe_unused dwc2_resume(struct device *dev) 280{ 281 struct dwc2_hsotg *dwc2 = dev_get_drvdata(dev); 282 int ret = 0; 283 284 if (dwc2_is_device_mode(dwc2)) { 285 ret = s3c_hsotg_resume(dwc2); 286 } else { 287 phy_power_on(dwc2->phy); 288 phy_init(dwc2->phy); 289 290 } 291 return ret; 292} 293 294static const struct dev_pm_ops dwc2_dev_pm_ops = { 295 SET_SYSTEM_SLEEP_PM_OPS(dwc2_suspend, dwc2_resume) 296}; 297 298static struct platform_driver dwc2_platform_driver = { 299 .driver = { 300 .name = dwc2_driver_name, 301 .of_match_table = dwc2_of_match_table, 302 .pm = &dwc2_dev_pm_ops, 303 }, 304 .probe = dwc2_driver_probe, 305 .remove = dwc2_driver_remove, 306}; 307 308module_platform_driver(dwc2_platform_driver); 309 310MODULE_DESCRIPTION("DESIGNWARE HS OTG Platform Glue"); 311MODULE_AUTHOR("Matthijs Kooijman <matthijs@stdin.nl>"); 312MODULE_LICENSE("Dual BSD/GPL"); 313