1/* 2 * Freescale i.MX28 LRADC driver 3 * 4 * Copyright (c) 2012 DENX Software Engineering, GmbH. 5 * Marek Vasut <marex@denx.de> 6 * 7 * This program is free software; you can redistribute it and/or modify 8 * it under the terms of the GNU General Public License as published by 9 * the Free Software Foundation; either version 2 of the License, or 10 * (at your option) any later version. 11 * 12 * This program is distributed in the hope that it will be useful, 13 * but WITHOUT ANY WARRANTY; without even the implied warranty of 14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 15 * GNU General Public License for more details. 16 */ 17 18#include <linux/err.h> 19#include <linux/interrupt.h> 20#include <linux/device.h> 21#include <linux/kernel.h> 22#include <linux/slab.h> 23#include <linux/of.h> 24#include <linux/of_device.h> 25#include <linux/sysfs.h> 26#include <linux/list.h> 27#include <linux/io.h> 28#include <linux/module.h> 29#include <linux/platform_device.h> 30#include <linux/spinlock.h> 31#include <linux/wait.h> 32#include <linux/sched.h> 33#include <linux/stmp_device.h> 34#include <linux/bitops.h> 35#include <linux/completion.h> 36#include <linux/delay.h> 37#include <linux/input.h> 38#include <linux/clk.h> 39 40#include <linux/iio/iio.h> 41#include <linux/iio/sysfs.h> 42#include <linux/iio/buffer.h> 43#include <linux/iio/trigger.h> 44#include <linux/iio/trigger_consumer.h> 45#include <linux/iio/triggered_buffer.h> 46 47#define DRIVER_NAME "mxs-lradc" 48 49#define LRADC_MAX_DELAY_CHANS 4 50#define LRADC_MAX_MAPPED_CHANS 8 51#define LRADC_MAX_TOTAL_CHANS 16 52 53#define LRADC_DELAY_TIMER_HZ 2000 54 55/* 56 * Make this runtime configurable if necessary. Currently, if the buffered mode 57 * is enabled, the LRADC takes LRADC_DELAY_TIMER_LOOP samples of data before 58 * triggering IRQ. The sampling happens every (LRADC_DELAY_TIMER_PER / 2000) 59 * seconds. The result is that the samples arrive every 500mS. 60 */ 61#define LRADC_DELAY_TIMER_PER 200 62#define LRADC_DELAY_TIMER_LOOP 5 63 64/* 65 * Once the pen touches the touchscreen, the touchscreen switches from 66 * IRQ-driven mode to polling mode to prevent interrupt storm. The polling 67 * is realized by worker thread, which is called every 20 or so milliseconds. 68 * This gives the touchscreen enough fluence and does not strain the system 69 * too much. 70 */ 71#define LRADC_TS_SAMPLE_DELAY_MS 5 72 73/* 74 * The LRADC reads the following amount of samples from each touchscreen 75 * channel and the driver then computes avarage of these. 76 */ 77#define LRADC_TS_SAMPLE_AMOUNT 4 78 79enum mxs_lradc_id { 80 IMX23_LRADC, 81 IMX28_LRADC, 82}; 83 84static const char * const mx23_lradc_irq_names[] = { 85 "mxs-lradc-touchscreen", 86 "mxs-lradc-channel0", 87 "mxs-lradc-channel1", 88 "mxs-lradc-channel2", 89 "mxs-lradc-channel3", 90 "mxs-lradc-channel4", 91 "mxs-lradc-channel5", 92 "mxs-lradc-channel6", 93 "mxs-lradc-channel7", 94}; 95 96static const char * const mx28_lradc_irq_names[] = { 97 "mxs-lradc-touchscreen", 98 "mxs-lradc-thresh0", 99 "mxs-lradc-thresh1", 100 "mxs-lradc-channel0", 101 "mxs-lradc-channel1", 102 "mxs-lradc-channel2", 103 "mxs-lradc-channel3", 104 "mxs-lradc-channel4", 105 "mxs-lradc-channel5", 106 "mxs-lradc-channel6", 107 "mxs-lradc-channel7", 108 "mxs-lradc-button0", 109 "mxs-lradc-button1", 110}; 111 112struct mxs_lradc_of_config { 113 const int irq_count; 114 const char * const *irq_name; 115 const uint32_t *vref_mv; 116}; 117 118#define VREF_MV_BASE 1850 119 120static const uint32_t mx23_vref_mv[LRADC_MAX_TOTAL_CHANS] = { 121 VREF_MV_BASE, /* CH0 */ 122 VREF_MV_BASE, /* CH1 */ 123 VREF_MV_BASE, /* CH2 */ 124 VREF_MV_BASE, /* CH3 */ 125 VREF_MV_BASE, /* CH4 */ 126 VREF_MV_BASE, /* CH5 */ 127 VREF_MV_BASE * 2, /* CH6 VDDIO */ 128 VREF_MV_BASE * 4, /* CH7 VBATT */ 129 VREF_MV_BASE, /* CH8 Temp sense 0 */ 130 VREF_MV_BASE, /* CH9 Temp sense 1 */ 131 VREF_MV_BASE, /* CH10 */ 132 VREF_MV_BASE, /* CH11 */ 133 VREF_MV_BASE, /* CH12 USB_DP */ 134 VREF_MV_BASE, /* CH13 USB_DN */ 135 VREF_MV_BASE, /* CH14 VBG */ 136 VREF_MV_BASE * 4, /* CH15 VDD5V */ 137}; 138 139static const uint32_t mx28_vref_mv[LRADC_MAX_TOTAL_CHANS] = { 140 VREF_MV_BASE, /* CH0 */ 141 VREF_MV_BASE, /* CH1 */ 142 VREF_MV_BASE, /* CH2 */ 143 VREF_MV_BASE, /* CH3 */ 144 VREF_MV_BASE, /* CH4 */ 145 VREF_MV_BASE, /* CH5 */ 146 VREF_MV_BASE, /* CH6 */ 147 VREF_MV_BASE * 4, /* CH7 VBATT */ 148 VREF_MV_BASE, /* CH8 Temp sense 0 */ 149 VREF_MV_BASE, /* CH9 Temp sense 1 */ 150 VREF_MV_BASE * 2, /* CH10 VDDIO */ 151 VREF_MV_BASE, /* CH11 VTH */ 152 VREF_MV_BASE * 2, /* CH12 VDDA */ 153 VREF_MV_BASE, /* CH13 VDDD */ 154 VREF_MV_BASE, /* CH14 VBG */ 155 VREF_MV_BASE * 4, /* CH15 VDD5V */ 156}; 157 158static const struct mxs_lradc_of_config mxs_lradc_of_config[] = { 159 [IMX23_LRADC] = { 160 .irq_count = ARRAY_SIZE(mx23_lradc_irq_names), 161 .irq_name = mx23_lradc_irq_names, 162 .vref_mv = mx23_vref_mv, 163 }, 164 [IMX28_LRADC] = { 165 .irq_count = ARRAY_SIZE(mx28_lradc_irq_names), 166 .irq_name = mx28_lradc_irq_names, 167 .vref_mv = mx28_vref_mv, 168 }, 169}; 170 171enum mxs_lradc_ts { 172 MXS_LRADC_TOUCHSCREEN_NONE = 0, 173 MXS_LRADC_TOUCHSCREEN_4WIRE, 174 MXS_LRADC_TOUCHSCREEN_5WIRE, 175}; 176 177/* 178 * Touchscreen handling 179 */ 180enum lradc_ts_plate { 181 LRADC_TOUCH = 0, 182 LRADC_SAMPLE_X, 183 LRADC_SAMPLE_Y, 184 LRADC_SAMPLE_PRESSURE, 185 LRADC_SAMPLE_VALID, 186}; 187 188enum mxs_lradc_divbytwo { 189 MXS_LRADC_DIV_DISABLED = 0, 190 MXS_LRADC_DIV_ENABLED, 191}; 192 193struct mxs_lradc_scale { 194 unsigned int integer; 195 unsigned int nano; 196}; 197 198struct mxs_lradc { 199 struct device *dev; 200 void __iomem *base; 201 int irq[13]; 202 203 struct clk *clk; 204 205 uint32_t *buffer; 206 struct iio_trigger *trig; 207 208 struct mutex lock; 209 210 struct completion completion; 211 212 const uint32_t *vref_mv; 213 struct mxs_lradc_scale scale_avail[LRADC_MAX_TOTAL_CHANS][2]; 214 unsigned long is_divided; 215 216 /* 217 * When the touchscreen is enabled, we give it two private virtual 218 * channels: #6 and #7. This means that only 6 virtual channels (instead 219 * of 8) will be available for buffered capture. 220 */ 221#define TOUCHSCREEN_VCHANNEL1 7 222#define TOUCHSCREEN_VCHANNEL2 6 223#define BUFFER_VCHANS_LIMITED 0x3f 224#define BUFFER_VCHANS_ALL 0xff 225 u8 buffer_vchans; 226 227 /* 228 * Furthermore, certain LRADC channels are shared between touchscreen 229 * and/or touch-buttons and generic LRADC block. Therefore when using 230 * either of these, these channels are not available for the regular 231 * sampling. The shared channels are as follows: 232 * 233 * CH0 -- Touch button #0 234 * CH1 -- Touch button #1 235 * CH2 -- Touch screen XPUL 236 * CH3 -- Touch screen YPLL 237 * CH4 -- Touch screen XNUL 238 * CH5 -- Touch screen YNLR 239 * CH6 -- Touch screen WIPER (5-wire only) 240 * 241 * The bitfields below represents which parts of the LRADC block are 242 * switched into special mode of operation. These channels can not 243 * be sampled as regular LRADC channels. The driver will refuse any 244 * attempt to sample these channels. 245 */ 246#define CHAN_MASK_TOUCHBUTTON (BIT(1) | BIT(0)) 247#define CHAN_MASK_TOUCHSCREEN_4WIRE (0xf << 2) 248#define CHAN_MASK_TOUCHSCREEN_5WIRE (0x1f << 2) 249 enum mxs_lradc_ts use_touchscreen; 250 bool use_touchbutton; 251 252 struct input_dev *ts_input; 253 254 enum mxs_lradc_id soc; 255 enum lradc_ts_plate cur_plate; /* statemachine */ 256 bool ts_valid; 257 unsigned ts_x_pos; 258 unsigned ts_y_pos; 259 unsigned ts_pressure; 260 261 /* handle touchscreen's physical behaviour */ 262 /* samples per coordinate */ 263 unsigned over_sample_cnt; 264 /* time clocks between samples */ 265 unsigned over_sample_delay; 266 /* time in clocks to wait after the plates where switched */ 267 unsigned settling_delay; 268}; 269 270#define LRADC_CTRL0 0x00 271# define LRADC_CTRL0_MX28_TOUCH_DETECT_ENABLE BIT(23) 272# define LRADC_CTRL0_MX28_TOUCH_SCREEN_TYPE BIT(22) 273# define LRADC_CTRL0_MX28_YNNSW /* YM */ BIT(21) 274# define LRADC_CTRL0_MX28_YPNSW /* YP */ BIT(20) 275# define LRADC_CTRL0_MX28_YPPSW /* YP */ BIT(19) 276# define LRADC_CTRL0_MX28_XNNSW /* XM */ BIT(18) 277# define LRADC_CTRL0_MX28_XNPSW /* XM */ BIT(17) 278# define LRADC_CTRL0_MX28_XPPSW /* XP */ BIT(16) 279 280# define LRADC_CTRL0_MX23_TOUCH_DETECT_ENABLE BIT(20) 281# define LRADC_CTRL0_MX23_YM BIT(19) 282# define LRADC_CTRL0_MX23_XM BIT(18) 283# define LRADC_CTRL0_MX23_YP BIT(17) 284# define LRADC_CTRL0_MX23_XP BIT(16) 285 286# define LRADC_CTRL0_MX28_PLATE_MASK \ 287 (LRADC_CTRL0_MX28_TOUCH_DETECT_ENABLE | \ 288 LRADC_CTRL0_MX28_YNNSW | LRADC_CTRL0_MX28_YPNSW | \ 289 LRADC_CTRL0_MX28_YPPSW | LRADC_CTRL0_MX28_XNNSW | \ 290 LRADC_CTRL0_MX28_XNPSW | LRADC_CTRL0_MX28_XPPSW) 291 292# define LRADC_CTRL0_MX23_PLATE_MASK \ 293 (LRADC_CTRL0_MX23_TOUCH_DETECT_ENABLE | \ 294 LRADC_CTRL0_MX23_YM | LRADC_CTRL0_MX23_XM | \ 295 LRADC_CTRL0_MX23_YP | LRADC_CTRL0_MX23_XP) 296 297#define LRADC_CTRL1 0x10 298#define LRADC_CTRL1_TOUCH_DETECT_IRQ_EN BIT(24) 299#define LRADC_CTRL1_LRADC_IRQ_EN(n) (1 << ((n) + 16)) 300#define LRADC_CTRL1_MX28_LRADC_IRQ_EN_MASK (0x1fff << 16) 301#define LRADC_CTRL1_MX23_LRADC_IRQ_EN_MASK (0x01ff << 16) 302#define LRADC_CTRL1_LRADC_IRQ_EN_OFFSET 16 303#define LRADC_CTRL1_TOUCH_DETECT_IRQ BIT(8) 304#define LRADC_CTRL1_LRADC_IRQ(n) (1 << (n)) 305#define LRADC_CTRL1_MX28_LRADC_IRQ_MASK 0x1fff 306#define LRADC_CTRL1_MX23_LRADC_IRQ_MASK 0x01ff 307#define LRADC_CTRL1_LRADC_IRQ_OFFSET 0 308 309#define LRADC_CTRL2 0x20 310#define LRADC_CTRL2_DIVIDE_BY_TWO_OFFSET 24 311#define LRADC_CTRL2_TEMPSENSE_PWD BIT(15) 312 313#define LRADC_STATUS 0x40 314#define LRADC_STATUS_TOUCH_DETECT_RAW BIT(0) 315 316#define LRADC_CH(n) (0x50 + (0x10 * (n))) 317#define LRADC_CH_ACCUMULATE BIT(29) 318#define LRADC_CH_NUM_SAMPLES_MASK (0x1f << 24) 319#define LRADC_CH_NUM_SAMPLES_OFFSET 24 320#define LRADC_CH_NUM_SAMPLES(x) \ 321 ((x) << LRADC_CH_NUM_SAMPLES_OFFSET) 322#define LRADC_CH_VALUE_MASK 0x3ffff 323#define LRADC_CH_VALUE_OFFSET 0 324 325#define LRADC_DELAY(n) (0xd0 + (0x10 * (n))) 326#define LRADC_DELAY_TRIGGER_LRADCS_MASK (0xff << 24) 327#define LRADC_DELAY_TRIGGER_LRADCS_OFFSET 24 328#define LRADC_DELAY_TRIGGER(x) \ 329 (((x) << LRADC_DELAY_TRIGGER_LRADCS_OFFSET) & \ 330 LRADC_DELAY_TRIGGER_LRADCS_MASK) 331#define LRADC_DELAY_KICK (1 << 20) 332#define LRADC_DELAY_TRIGGER_DELAYS_MASK (0xf << 16) 333#define LRADC_DELAY_TRIGGER_DELAYS_OFFSET 16 334#define LRADC_DELAY_TRIGGER_DELAYS(x) \ 335 (((x) << LRADC_DELAY_TRIGGER_DELAYS_OFFSET) & \ 336 LRADC_DELAY_TRIGGER_DELAYS_MASK) 337#define LRADC_DELAY_LOOP_COUNT_MASK (0x1f << 11) 338#define LRADC_DELAY_LOOP_COUNT_OFFSET 11 339#define LRADC_DELAY_LOOP(x) \ 340 (((x) << LRADC_DELAY_LOOP_COUNT_OFFSET) & \ 341 LRADC_DELAY_LOOP_COUNT_MASK) 342#define LRADC_DELAY_DELAY_MASK 0x7ff 343#define LRADC_DELAY_DELAY_OFFSET 0 344#define LRADC_DELAY_DELAY(x) \ 345 (((x) << LRADC_DELAY_DELAY_OFFSET) & \ 346 LRADC_DELAY_DELAY_MASK) 347 348#define LRADC_CTRL4 0x140 349#define LRADC_CTRL4_LRADCSELECT_MASK(n) (0xf << ((n) * 4)) 350#define LRADC_CTRL4_LRADCSELECT_OFFSET(n) ((n) * 4) 351#define LRADC_CTRL4_LRADCSELECT(n, x) \ 352 (((x) << LRADC_CTRL4_LRADCSELECT_OFFSET(n)) & \ 353 LRADC_CTRL4_LRADCSELECT_MASK(n)) 354 355#define LRADC_RESOLUTION 12 356#define LRADC_SINGLE_SAMPLE_MASK ((1 << LRADC_RESOLUTION) - 1) 357 358static void mxs_lradc_reg_set(struct mxs_lradc *lradc, u32 val, u32 reg) 359{ 360 writel(val, lradc->base + reg + STMP_OFFSET_REG_SET); 361} 362 363static void mxs_lradc_reg_clear(struct mxs_lradc *lradc, u32 val, u32 reg) 364{ 365 writel(val, lradc->base + reg + STMP_OFFSET_REG_CLR); 366} 367 368static void mxs_lradc_reg_wrt(struct mxs_lradc *lradc, u32 val, u32 reg) 369{ 370 writel(val, lradc->base + reg); 371} 372 373static u32 mxs_lradc_plate_mask(struct mxs_lradc *lradc) 374{ 375 if (lradc->soc == IMX23_LRADC) 376 return LRADC_CTRL0_MX23_PLATE_MASK; 377 return LRADC_CTRL0_MX28_PLATE_MASK; 378} 379 380static u32 mxs_lradc_irq_en_mask(struct mxs_lradc *lradc) 381{ 382 if (lradc->soc == IMX23_LRADC) 383 return LRADC_CTRL1_MX23_LRADC_IRQ_EN_MASK; 384 return LRADC_CTRL1_MX28_LRADC_IRQ_EN_MASK; 385} 386 387static u32 mxs_lradc_irq_mask(struct mxs_lradc *lradc) 388{ 389 if (lradc->soc == IMX23_LRADC) 390 return LRADC_CTRL1_MX23_LRADC_IRQ_MASK; 391 return LRADC_CTRL1_MX28_LRADC_IRQ_MASK; 392} 393 394static u32 mxs_lradc_touch_detect_bit(struct mxs_lradc *lradc) 395{ 396 if (lradc->soc == IMX23_LRADC) 397 return LRADC_CTRL0_MX23_TOUCH_DETECT_ENABLE; 398 return LRADC_CTRL0_MX28_TOUCH_DETECT_ENABLE; 399} 400 401static u32 mxs_lradc_drive_x_plate(struct mxs_lradc *lradc) 402{ 403 if (lradc->soc == IMX23_LRADC) 404 return LRADC_CTRL0_MX23_XP | LRADC_CTRL0_MX23_XM; 405 return LRADC_CTRL0_MX28_XPPSW | LRADC_CTRL0_MX28_XNNSW; 406} 407 408static u32 mxs_lradc_drive_y_plate(struct mxs_lradc *lradc) 409{ 410 if (lradc->soc == IMX23_LRADC) 411 return LRADC_CTRL0_MX23_YP | LRADC_CTRL0_MX23_YM; 412 return LRADC_CTRL0_MX28_YPPSW | LRADC_CTRL0_MX28_YNNSW; 413} 414 415static u32 mxs_lradc_drive_pressure(struct mxs_lradc *lradc) 416{ 417 if (lradc->soc == IMX23_LRADC) 418 return LRADC_CTRL0_MX23_YP | LRADC_CTRL0_MX23_XM; 419 return LRADC_CTRL0_MX28_YPPSW | LRADC_CTRL0_MX28_XNNSW; 420} 421 422static bool mxs_lradc_check_touch_event(struct mxs_lradc *lradc) 423{ 424 return !!(readl(lradc->base + LRADC_STATUS) & 425 LRADC_STATUS_TOUCH_DETECT_RAW); 426} 427 428static void mxs_lradc_map_channel(struct mxs_lradc *lradc, unsigned vch, 429 unsigned ch) 430{ 431 mxs_lradc_reg_clear(lradc, LRADC_CTRL4_LRADCSELECT_MASK(vch), 432 LRADC_CTRL4); 433 mxs_lradc_reg_set(lradc, LRADC_CTRL4_LRADCSELECT(vch, ch), LRADC_CTRL4); 434} 435 436static void mxs_lradc_setup_ts_channel(struct mxs_lradc *lradc, unsigned ch) 437{ 438 /* 439 * prepare for oversampling conversion 440 * 441 * from the datasheet: 442 * "The ACCUMULATE bit in the appropriate channel register 443 * HW_LRADC_CHn must be set to 1 if NUM_SAMPLES is greater then 0; 444 * otherwise, the IRQs will not fire." 445 */ 446 mxs_lradc_reg_wrt(lradc, LRADC_CH_ACCUMULATE | 447 LRADC_CH_NUM_SAMPLES(lradc->over_sample_cnt - 1), 448 LRADC_CH(ch)); 449 450 /* from the datasheet: 451 * "Software must clear this register in preparation for a 452 * multi-cycle accumulation. 453 */ 454 mxs_lradc_reg_clear(lradc, LRADC_CH_VALUE_MASK, LRADC_CH(ch)); 455 456 /* 457 * prepare the delay/loop unit according to the oversampling count 458 * 459 * from the datasheet: 460 * "The DELAY fields in HW_LRADC_DELAY0, HW_LRADC_DELAY1, 461 * HW_LRADC_DELAY2, and HW_LRADC_DELAY3 must be non-zero; otherwise, 462 * the LRADC will not trigger the delay group." 463 */ 464 mxs_lradc_reg_wrt(lradc, LRADC_DELAY_TRIGGER(1 << ch) | 465 LRADC_DELAY_TRIGGER_DELAYS(0) | 466 LRADC_DELAY_LOOP(lradc->over_sample_cnt - 1) | 467 LRADC_DELAY_DELAY(lradc->over_sample_delay - 1), 468 LRADC_DELAY(3)); 469 470 mxs_lradc_reg_clear(lradc, LRADC_CTRL1_LRADC_IRQ(ch), LRADC_CTRL1); 471 472 /* 473 * after changing the touchscreen plates setting 474 * the signals need some initial time to settle. Start the 475 * SoC's delay unit and start the conversion later 476 * and automatically. 477 */ 478 mxs_lradc_reg_wrt(lradc, 479 LRADC_DELAY_TRIGGER(0) | /* don't trigger ADC */ 480 LRADC_DELAY_TRIGGER_DELAYS(BIT(3)) | /* trigger DELAY unit#3 */ 481 LRADC_DELAY_KICK | 482 LRADC_DELAY_DELAY(lradc->settling_delay), 483 LRADC_DELAY(2)); 484} 485 486/* 487 * Pressure detection is special: 488 * We want to do both required measurements for the pressure detection in 489 * one turn. Use the hardware features to chain both conversions and let the 490 * hardware report one interrupt if both conversions are done 491 */ 492static void mxs_lradc_setup_ts_pressure(struct mxs_lradc *lradc, unsigned ch1, 493 unsigned ch2) 494{ 495 u32 reg; 496 497 /* 498 * prepare for oversampling conversion 499 * 500 * from the datasheet: 501 * "The ACCUMULATE bit in the appropriate channel register 502 * HW_LRADC_CHn must be set to 1 if NUM_SAMPLES is greater then 0; 503 * otherwise, the IRQs will not fire." 504 */ 505 reg = LRADC_CH_ACCUMULATE | 506 LRADC_CH_NUM_SAMPLES(lradc->over_sample_cnt - 1); 507 mxs_lradc_reg_wrt(lradc, reg, LRADC_CH(ch1)); 508 mxs_lradc_reg_wrt(lradc, reg, LRADC_CH(ch2)); 509 510 /* from the datasheet: 511 * "Software must clear this register in preparation for a 512 * multi-cycle accumulation. 513 */ 514 mxs_lradc_reg_clear(lradc, LRADC_CH_VALUE_MASK, LRADC_CH(ch1)); 515 mxs_lradc_reg_clear(lradc, LRADC_CH_VALUE_MASK, LRADC_CH(ch2)); 516 517 /* prepare the delay/loop unit according to the oversampling count */ 518 mxs_lradc_reg_wrt(lradc, LRADC_DELAY_TRIGGER(1 << ch1) | 519 LRADC_DELAY_TRIGGER(1 << ch2) | /* start both channels */ 520 LRADC_DELAY_TRIGGER_DELAYS(0) | 521 LRADC_DELAY_LOOP(lradc->over_sample_cnt - 1) | 522 LRADC_DELAY_DELAY(lradc->over_sample_delay - 1), 523 LRADC_DELAY(3)); 524 525 mxs_lradc_reg_clear(lradc, LRADC_CTRL1_LRADC_IRQ(ch2), LRADC_CTRL1); 526 527 /* 528 * after changing the touchscreen plates setting 529 * the signals need some initial time to settle. Start the 530 * SoC's delay unit and start the conversion later 531 * and automatically. 532 */ 533 mxs_lradc_reg_wrt(lradc, 534 LRADC_DELAY_TRIGGER(0) | /* don't trigger ADC */ 535 LRADC_DELAY_TRIGGER_DELAYS(BIT(3)) | /* trigger DELAY unit#3 */ 536 LRADC_DELAY_KICK | 537 LRADC_DELAY_DELAY(lradc->settling_delay), LRADC_DELAY(2)); 538} 539 540static unsigned mxs_lradc_read_raw_channel(struct mxs_lradc *lradc, 541 unsigned channel) 542{ 543 u32 reg; 544 unsigned num_samples, val; 545 546 reg = readl(lradc->base + LRADC_CH(channel)); 547 if (reg & LRADC_CH_ACCUMULATE) 548 num_samples = lradc->over_sample_cnt; 549 else 550 num_samples = 1; 551 552 val = (reg & LRADC_CH_VALUE_MASK) >> LRADC_CH_VALUE_OFFSET; 553 return val / num_samples; 554} 555 556static unsigned mxs_lradc_read_ts_pressure(struct mxs_lradc *lradc, 557 unsigned ch1, unsigned ch2) 558{ 559 u32 reg, mask; 560 unsigned pressure, m1, m2; 561 562 mask = LRADC_CTRL1_LRADC_IRQ(ch1) | LRADC_CTRL1_LRADC_IRQ(ch2); 563 reg = readl(lradc->base + LRADC_CTRL1) & mask; 564 565 while (reg != mask) { 566 reg = readl(lradc->base + LRADC_CTRL1) & mask; 567 dev_dbg(lradc->dev, "One channel is still busy: %X\n", reg); 568 } 569 570 m1 = mxs_lradc_read_raw_channel(lradc, ch1); 571 m2 = mxs_lradc_read_raw_channel(lradc, ch2); 572 573 if (m2 == 0) { 574 dev_warn(lradc->dev, "Cannot calculate pressure\n"); 575 return 1 << (LRADC_RESOLUTION - 1); 576 } 577 578 /* simply scale the value from 0 ... max ADC resolution */ 579 pressure = m1; 580 pressure *= (1 << LRADC_RESOLUTION); 581 pressure /= m2; 582 583 dev_dbg(lradc->dev, "Pressure = %u\n", pressure); 584 return pressure; 585} 586 587#define TS_CH_XP 2 588#define TS_CH_YP 3 589#define TS_CH_XM 4 590#define TS_CH_YM 5 591 592/* 593 * YP(open)--+-------------+ 594 * | |--+ 595 * | | | 596 * YM(-)--+-------------+ | 597 * +--------------+ 598 * | | 599 * XP(weak+) XM(open) 600 * 601 * "weak+" means 200k Ohm VDDIO 602 * (-) means GND 603 */ 604static void mxs_lradc_setup_touch_detection(struct mxs_lradc *lradc) 605{ 606 /* 607 * In order to detect a touch event the 'touch detect enable' bit 608 * enables: 609 * - a weak pullup to the X+ connector 610 * - a strong ground at the Y- connector 611 */ 612 mxs_lradc_reg_clear(lradc, mxs_lradc_plate_mask(lradc), LRADC_CTRL0); 613 mxs_lradc_reg_set(lradc, mxs_lradc_touch_detect_bit(lradc), 614 LRADC_CTRL0); 615} 616 617/* 618 * YP(meas)--+-------------+ 619 * | |--+ 620 * | | | 621 * YM(open)--+-------------+ | 622 * +--------------+ 623 * | | 624 * XP(+) XM(-) 625 * 626 * (+) means here 1.85 V 627 * (-) means here GND 628 */ 629static void mxs_lradc_prepare_x_pos(struct mxs_lradc *lradc) 630{ 631 mxs_lradc_reg_clear(lradc, mxs_lradc_plate_mask(lradc), LRADC_CTRL0); 632 mxs_lradc_reg_set(lradc, mxs_lradc_drive_x_plate(lradc), LRADC_CTRL0); 633 634 lradc->cur_plate = LRADC_SAMPLE_X; 635 mxs_lradc_map_channel(lradc, TOUCHSCREEN_VCHANNEL1, TS_CH_YP); 636 mxs_lradc_setup_ts_channel(lradc, TOUCHSCREEN_VCHANNEL1); 637} 638 639/* 640 * YP(+)--+-------------+ 641 * | |--+ 642 * | | | 643 * YM(-)--+-------------+ | 644 * +--------------+ 645 * | | 646 * XP(open) XM(meas) 647 * 648 * (+) means here 1.85 V 649 * (-) means here GND 650 */ 651static void mxs_lradc_prepare_y_pos(struct mxs_lradc *lradc) 652{ 653 mxs_lradc_reg_clear(lradc, mxs_lradc_plate_mask(lradc), LRADC_CTRL0); 654 mxs_lradc_reg_set(lradc, mxs_lradc_drive_y_plate(lradc), LRADC_CTRL0); 655 656 lradc->cur_plate = LRADC_SAMPLE_Y; 657 mxs_lradc_map_channel(lradc, TOUCHSCREEN_VCHANNEL1, TS_CH_XM); 658 mxs_lradc_setup_ts_channel(lradc, TOUCHSCREEN_VCHANNEL1); 659} 660 661/* 662 * YP(+)--+-------------+ 663 * | |--+ 664 * | | | 665 * YM(meas)--+-------------+ | 666 * +--------------+ 667 * | | 668 * XP(meas) XM(-) 669 * 670 * (+) means here 1.85 V 671 * (-) means here GND 672 */ 673static void mxs_lradc_prepare_pressure(struct mxs_lradc *lradc) 674{ 675 mxs_lradc_reg_clear(lradc, mxs_lradc_plate_mask(lradc), LRADC_CTRL0); 676 mxs_lradc_reg_set(lradc, mxs_lradc_drive_pressure(lradc), LRADC_CTRL0); 677 678 lradc->cur_plate = LRADC_SAMPLE_PRESSURE; 679 mxs_lradc_map_channel(lradc, TOUCHSCREEN_VCHANNEL1, TS_CH_YM); 680 mxs_lradc_map_channel(lradc, TOUCHSCREEN_VCHANNEL2, TS_CH_XP); 681 mxs_lradc_setup_ts_pressure(lradc, TOUCHSCREEN_VCHANNEL2, 682 TOUCHSCREEN_VCHANNEL1); 683} 684 685static void mxs_lradc_enable_touch_detection(struct mxs_lradc *lradc) 686{ 687 mxs_lradc_setup_touch_detection(lradc); 688 689 lradc->cur_plate = LRADC_TOUCH; 690 mxs_lradc_reg_clear(lradc, LRADC_CTRL1_TOUCH_DETECT_IRQ | 691 LRADC_CTRL1_TOUCH_DETECT_IRQ_EN, LRADC_CTRL1); 692 mxs_lradc_reg_set(lradc, LRADC_CTRL1_TOUCH_DETECT_IRQ_EN, LRADC_CTRL1); 693} 694 695static void mxs_lradc_start_touch_event(struct mxs_lradc *lradc) 696{ 697 mxs_lradc_reg_clear(lradc, LRADC_CTRL1_TOUCH_DETECT_IRQ_EN, 698 LRADC_CTRL1); 699 mxs_lradc_reg_set(lradc, 700 LRADC_CTRL1_LRADC_IRQ_EN(TOUCHSCREEN_VCHANNEL1), LRADC_CTRL1); 701 /* 702 * start with the Y-pos, because it uses nearly the same plate 703 * settings like the touch detection 704 */ 705 mxs_lradc_prepare_y_pos(lradc); 706} 707 708static void mxs_lradc_report_ts_event(struct mxs_lradc *lradc) 709{ 710 input_report_abs(lradc->ts_input, ABS_X, lradc->ts_x_pos); 711 input_report_abs(lradc->ts_input, ABS_Y, lradc->ts_y_pos); 712 input_report_abs(lradc->ts_input, ABS_PRESSURE, lradc->ts_pressure); 713 input_report_key(lradc->ts_input, BTN_TOUCH, 1); 714 input_sync(lradc->ts_input); 715} 716 717static void mxs_lradc_complete_touch_event(struct mxs_lradc *lradc) 718{ 719 mxs_lradc_setup_touch_detection(lradc); 720 lradc->cur_plate = LRADC_SAMPLE_VALID; 721 /* 722 * start a dummy conversion to burn time to settle the signals 723 * note: we are not interested in the conversion's value 724 */ 725 mxs_lradc_reg_wrt(lradc, 0, LRADC_CH(TOUCHSCREEN_VCHANNEL1)); 726 mxs_lradc_reg_clear(lradc, 727 LRADC_CTRL1_LRADC_IRQ(TOUCHSCREEN_VCHANNEL1) | 728 LRADC_CTRL1_LRADC_IRQ(TOUCHSCREEN_VCHANNEL2), LRADC_CTRL1); 729 mxs_lradc_reg_wrt(lradc, 730 LRADC_DELAY_TRIGGER(1 << TOUCHSCREEN_VCHANNEL1) | 731 LRADC_DELAY_KICK | LRADC_DELAY_DELAY(10), /* waste 5 ms */ 732 LRADC_DELAY(2)); 733} 734 735/* 736 * in order to avoid false measurements, report only samples where 737 * the surface is still touched after the position measurement 738 */ 739static void mxs_lradc_finish_touch_event(struct mxs_lradc *lradc, bool valid) 740{ 741 /* if it is still touched, report the sample */ 742 if (valid && mxs_lradc_check_touch_event(lradc)) { 743 lradc->ts_valid = true; 744 mxs_lradc_report_ts_event(lradc); 745 } 746 747 /* if it is even still touched, continue with the next measurement */ 748 if (mxs_lradc_check_touch_event(lradc)) { 749 mxs_lradc_prepare_y_pos(lradc); 750 return; 751 } 752 753 if (lradc->ts_valid) { 754 /* signal the release */ 755 lradc->ts_valid = false; 756 input_report_key(lradc->ts_input, BTN_TOUCH, 0); 757 input_sync(lradc->ts_input); 758 } 759 760 /* if it is released, wait for the next touch via IRQ */ 761 lradc->cur_plate = LRADC_TOUCH; 762 mxs_lradc_reg_wrt(lradc, 0, LRADC_DELAY(2)); 763 mxs_lradc_reg_wrt(lradc, 0, LRADC_DELAY(3)); 764 mxs_lradc_reg_clear(lradc, LRADC_CTRL1_TOUCH_DETECT_IRQ | 765 LRADC_CTRL1_LRADC_IRQ_EN(TOUCHSCREEN_VCHANNEL1) | 766 LRADC_CTRL1_LRADC_IRQ(TOUCHSCREEN_VCHANNEL1), LRADC_CTRL1); 767 mxs_lradc_reg_set(lradc, LRADC_CTRL1_TOUCH_DETECT_IRQ_EN, LRADC_CTRL1); 768} 769 770/* touchscreen's state machine */ 771static void mxs_lradc_handle_touch(struct mxs_lradc *lradc) 772{ 773 switch (lradc->cur_plate) { 774 case LRADC_TOUCH: 775 if (mxs_lradc_check_touch_event(lradc)) 776 mxs_lradc_start_touch_event(lradc); 777 mxs_lradc_reg_clear(lradc, LRADC_CTRL1_TOUCH_DETECT_IRQ, 778 LRADC_CTRL1); 779 return; 780 781 case LRADC_SAMPLE_Y: 782 lradc->ts_y_pos = mxs_lradc_read_raw_channel(lradc, 783 TOUCHSCREEN_VCHANNEL1); 784 mxs_lradc_prepare_x_pos(lradc); 785 return; 786 787 case LRADC_SAMPLE_X: 788 lradc->ts_x_pos = mxs_lradc_read_raw_channel(lradc, 789 TOUCHSCREEN_VCHANNEL1); 790 mxs_lradc_prepare_pressure(lradc); 791 return; 792 793 case LRADC_SAMPLE_PRESSURE: 794 lradc->ts_pressure = mxs_lradc_read_ts_pressure(lradc, 795 TOUCHSCREEN_VCHANNEL2, 796 TOUCHSCREEN_VCHANNEL1); 797 mxs_lradc_complete_touch_event(lradc); 798 return; 799 800 case LRADC_SAMPLE_VALID: 801 mxs_lradc_finish_touch_event(lradc, 1); 802 break; 803 } 804} 805 806/* 807 * Raw I/O operations 808 */ 809static int mxs_lradc_read_single(struct iio_dev *iio_dev, int chan, int *val) 810{ 811 struct mxs_lradc *lradc = iio_priv(iio_dev); 812 int ret; 813 814 /* 815 * See if there is no buffered operation in progess. If there is, simply 816 * bail out. This can be improved to support both buffered and raw IO at 817 * the same time, yet the code becomes horribly complicated. Therefore I 818 * applied KISS principle here. 819 */ 820 ret = mutex_trylock(&lradc->lock); 821 if (!ret) 822 return -EBUSY; 823 824 reinit_completion(&lradc->completion); 825 826 /* 827 * No buffered operation in progress, map the channel and trigger it. 828 * Virtual channel 0 is always used here as the others are always not 829 * used if doing raw sampling. 830 */ 831 if (lradc->soc == IMX28_LRADC) 832 mxs_lradc_reg_clear(lradc, LRADC_CTRL1_LRADC_IRQ_EN(0), 833 LRADC_CTRL1); 834 mxs_lradc_reg_clear(lradc, 0x1, LRADC_CTRL0); 835 836 /* Enable / disable the divider per requirement */ 837 if (test_bit(chan, &lradc->is_divided)) 838 mxs_lradc_reg_set(lradc, 1 << LRADC_CTRL2_DIVIDE_BY_TWO_OFFSET, 839 LRADC_CTRL2); 840 else 841 mxs_lradc_reg_clear(lradc, 842 1 << LRADC_CTRL2_DIVIDE_BY_TWO_OFFSET, LRADC_CTRL2); 843 844 /* Clean the slot's previous content, then set new one. */ 845 mxs_lradc_reg_clear(lradc, LRADC_CTRL4_LRADCSELECT_MASK(0), 846 LRADC_CTRL4); 847 mxs_lradc_reg_set(lradc, chan, LRADC_CTRL4); 848 849 mxs_lradc_reg_wrt(lradc, 0, LRADC_CH(0)); 850 851 /* Enable the IRQ and start sampling the channel. */ 852 mxs_lradc_reg_set(lradc, LRADC_CTRL1_LRADC_IRQ_EN(0), LRADC_CTRL1); 853 mxs_lradc_reg_set(lradc, BIT(0), LRADC_CTRL0); 854 855 /* Wait for completion on the channel, 1 second max. */ 856 ret = wait_for_completion_killable_timeout(&lradc->completion, HZ); 857 if (!ret) 858 ret = -ETIMEDOUT; 859 if (ret < 0) 860 goto err; 861 862 /* Read the data. */ 863 *val = readl(lradc->base + LRADC_CH(0)) & LRADC_CH_VALUE_MASK; 864 ret = IIO_VAL_INT; 865 866err: 867 mxs_lradc_reg_clear(lradc, LRADC_CTRL1_LRADC_IRQ_EN(0), LRADC_CTRL1); 868 869 mutex_unlock(&lradc->lock); 870 871 return ret; 872} 873 874static int mxs_lradc_read_temp(struct iio_dev *iio_dev, int *val) 875{ 876 int ret, min, max; 877 878 ret = mxs_lradc_read_single(iio_dev, 8, &min); 879 if (ret != IIO_VAL_INT) 880 return ret; 881 882 ret = mxs_lradc_read_single(iio_dev, 9, &max); 883 if (ret != IIO_VAL_INT) 884 return ret; 885 886 *val = max - min; 887 888 return IIO_VAL_INT; 889} 890 891static int mxs_lradc_read_raw(struct iio_dev *iio_dev, 892 const struct iio_chan_spec *chan, 893 int *val, int *val2, long m) 894{ 895 struct mxs_lradc *lradc = iio_priv(iio_dev); 896 897 switch (m) { 898 case IIO_CHAN_INFO_RAW: 899 if (chan->type == IIO_TEMP) 900 return mxs_lradc_read_temp(iio_dev, val); 901 902 return mxs_lradc_read_single(iio_dev, chan->channel, val); 903 904 case IIO_CHAN_INFO_SCALE: 905 if (chan->type == IIO_TEMP) { 906 /* From the datasheet, we have to multiply by 1.012 and 907 * divide by 4 908 */ 909 *val = 0; 910 *val2 = 253000; 911 return IIO_VAL_INT_PLUS_MICRO; 912 } 913 914 *val = lradc->vref_mv[chan->channel]; 915 *val2 = chan->scan_type.realbits - 916 test_bit(chan->channel, &lradc->is_divided); 917 return IIO_VAL_FRACTIONAL_LOG2; 918 919 case IIO_CHAN_INFO_OFFSET: 920 if (chan->type == IIO_TEMP) { 921 /* The calculated value from the ADC is in Kelvin, we 922 * want Celsius for hwmon so the offset is -273.15 923 * The offset is applied before scaling so it is 924 * actually -213.15 * 4 / 1.012 = -1079.644268 925 */ 926 *val = -1079; 927 *val2 = 644268; 928 929 return IIO_VAL_INT_PLUS_MICRO; 930 } 931 932 return -EINVAL; 933 934 default: 935 break; 936 } 937 938 return -EINVAL; 939} 940 941static int mxs_lradc_write_raw(struct iio_dev *iio_dev, 942 const struct iio_chan_spec *chan, 943 int val, int val2, long m) 944{ 945 struct mxs_lradc *lradc = iio_priv(iio_dev); 946 struct mxs_lradc_scale *scale_avail = 947 lradc->scale_avail[chan->channel]; 948 int ret; 949 950 ret = mutex_trylock(&lradc->lock); 951 if (!ret) 952 return -EBUSY; 953 954 switch (m) { 955 case IIO_CHAN_INFO_SCALE: 956 ret = -EINVAL; 957 if (val == scale_avail[MXS_LRADC_DIV_DISABLED].integer && 958 val2 == scale_avail[MXS_LRADC_DIV_DISABLED].nano) { 959 /* divider by two disabled */ 960 clear_bit(chan->channel, &lradc->is_divided); 961 ret = 0; 962 } else if (val == scale_avail[MXS_LRADC_DIV_ENABLED].integer && 963 val2 == scale_avail[MXS_LRADC_DIV_ENABLED].nano) { 964 /* divider by two enabled */ 965 set_bit(chan->channel, &lradc->is_divided); 966 ret = 0; 967 } 968 969 break; 970 default: 971 ret = -EINVAL; 972 break; 973 } 974 975 mutex_unlock(&lradc->lock); 976 977 return ret; 978} 979 980static int mxs_lradc_write_raw_get_fmt(struct iio_dev *iio_dev, 981 const struct iio_chan_spec *chan, 982 long m) 983{ 984 return IIO_VAL_INT_PLUS_NANO; 985} 986 987static ssize_t mxs_lradc_show_scale_available_ch(struct device *dev, 988 struct device_attribute *attr, 989 char *buf, 990 int ch) 991{ 992 struct iio_dev *iio = dev_to_iio_dev(dev); 993 struct mxs_lradc *lradc = iio_priv(iio); 994 int i, len = 0; 995 996 for (i = 0; i < ARRAY_SIZE(lradc->scale_avail[ch]); i++) 997 len += sprintf(buf + len, "%u.%09u ", 998 lradc->scale_avail[ch][i].integer, 999 lradc->scale_avail[ch][i].nano); 1000 1001 len += sprintf(buf + len, "\n"); 1002 1003 return len; 1004} 1005 1006static ssize_t mxs_lradc_show_scale_available(struct device *dev, 1007 struct device_attribute *attr, 1008 char *buf) 1009{ 1010 struct iio_dev_attr *iio_attr = to_iio_dev_attr(attr); 1011 1012 return mxs_lradc_show_scale_available_ch(dev, attr, buf, 1013 iio_attr->address); 1014} 1015 1016#define SHOW_SCALE_AVAILABLE_ATTR(ch) \ 1017static IIO_DEVICE_ATTR(in_voltage##ch##_scale_available, S_IRUGO, \ 1018 mxs_lradc_show_scale_available, NULL, ch) 1019 1020SHOW_SCALE_AVAILABLE_ATTR(0); 1021SHOW_SCALE_AVAILABLE_ATTR(1); 1022SHOW_SCALE_AVAILABLE_ATTR(2); 1023SHOW_SCALE_AVAILABLE_ATTR(3); 1024SHOW_SCALE_AVAILABLE_ATTR(4); 1025SHOW_SCALE_AVAILABLE_ATTR(5); 1026SHOW_SCALE_AVAILABLE_ATTR(6); 1027SHOW_SCALE_AVAILABLE_ATTR(7); 1028SHOW_SCALE_AVAILABLE_ATTR(10); 1029SHOW_SCALE_AVAILABLE_ATTR(11); 1030SHOW_SCALE_AVAILABLE_ATTR(12); 1031SHOW_SCALE_AVAILABLE_ATTR(13); 1032SHOW_SCALE_AVAILABLE_ATTR(14); 1033SHOW_SCALE_AVAILABLE_ATTR(15); 1034 1035static struct attribute *mxs_lradc_attributes[] = { 1036 &iio_dev_attr_in_voltage0_scale_available.dev_attr.attr, 1037 &iio_dev_attr_in_voltage1_scale_available.dev_attr.attr, 1038 &iio_dev_attr_in_voltage2_scale_available.dev_attr.attr, 1039 &iio_dev_attr_in_voltage3_scale_available.dev_attr.attr, 1040 &iio_dev_attr_in_voltage4_scale_available.dev_attr.attr, 1041 &iio_dev_attr_in_voltage5_scale_available.dev_attr.attr, 1042 &iio_dev_attr_in_voltage6_scale_available.dev_attr.attr, 1043 &iio_dev_attr_in_voltage7_scale_available.dev_attr.attr, 1044 &iio_dev_attr_in_voltage10_scale_available.dev_attr.attr, 1045 &iio_dev_attr_in_voltage11_scale_available.dev_attr.attr, 1046 &iio_dev_attr_in_voltage12_scale_available.dev_attr.attr, 1047 &iio_dev_attr_in_voltage13_scale_available.dev_attr.attr, 1048 &iio_dev_attr_in_voltage14_scale_available.dev_attr.attr, 1049 &iio_dev_attr_in_voltage15_scale_available.dev_attr.attr, 1050 NULL 1051}; 1052 1053static const struct attribute_group mxs_lradc_attribute_group = { 1054 .attrs = mxs_lradc_attributes, 1055}; 1056 1057static const struct iio_info mxs_lradc_iio_info = { 1058 .driver_module = THIS_MODULE, 1059 .read_raw = mxs_lradc_read_raw, 1060 .write_raw = mxs_lradc_write_raw, 1061 .write_raw_get_fmt = mxs_lradc_write_raw_get_fmt, 1062 .attrs = &mxs_lradc_attribute_group, 1063}; 1064 1065static int mxs_lradc_ts_open(struct input_dev *dev) 1066{ 1067 struct mxs_lradc *lradc = input_get_drvdata(dev); 1068 1069 /* Enable the touch-detect circuitry. */ 1070 mxs_lradc_enable_touch_detection(lradc); 1071 1072 return 0; 1073} 1074 1075static void mxs_lradc_disable_ts(struct mxs_lradc *lradc) 1076{ 1077 /* stop all interrupts from firing */ 1078 mxs_lradc_reg_clear(lradc, LRADC_CTRL1_TOUCH_DETECT_IRQ_EN | 1079 LRADC_CTRL1_LRADC_IRQ_EN(TOUCHSCREEN_VCHANNEL1) | 1080 LRADC_CTRL1_LRADC_IRQ_EN(TOUCHSCREEN_VCHANNEL2), LRADC_CTRL1); 1081 1082 /* Power-down touchscreen touch-detect circuitry. */ 1083 mxs_lradc_reg_clear(lradc, mxs_lradc_plate_mask(lradc), LRADC_CTRL0); 1084} 1085 1086static void mxs_lradc_ts_close(struct input_dev *dev) 1087{ 1088 struct mxs_lradc *lradc = input_get_drvdata(dev); 1089 1090 mxs_lradc_disable_ts(lradc); 1091} 1092 1093static int mxs_lradc_ts_register(struct mxs_lradc *lradc) 1094{ 1095 struct input_dev *input; 1096 struct device *dev = lradc->dev; 1097 int ret; 1098 1099 if (!lradc->use_touchscreen) 1100 return 0; 1101 1102 input = input_allocate_device(); 1103 if (!input) 1104 return -ENOMEM; 1105 1106 input->name = DRIVER_NAME; 1107 input->id.bustype = BUS_HOST; 1108 input->dev.parent = dev; 1109 input->open = mxs_lradc_ts_open; 1110 input->close = mxs_lradc_ts_close; 1111 1112 __set_bit(EV_ABS, input->evbit); 1113 __set_bit(EV_KEY, input->evbit); 1114 __set_bit(BTN_TOUCH, input->keybit); 1115 input_set_abs_params(input, ABS_X, 0, LRADC_SINGLE_SAMPLE_MASK, 0, 0); 1116 input_set_abs_params(input, ABS_Y, 0, LRADC_SINGLE_SAMPLE_MASK, 0, 0); 1117 input_set_abs_params(input, ABS_PRESSURE, 0, LRADC_SINGLE_SAMPLE_MASK, 1118 0, 0); 1119 1120 lradc->ts_input = input; 1121 input_set_drvdata(input, lradc); 1122 ret = input_register_device(input); 1123 if (ret) 1124 input_free_device(lradc->ts_input); 1125 1126 return ret; 1127} 1128 1129static void mxs_lradc_ts_unregister(struct mxs_lradc *lradc) 1130{ 1131 if (!lradc->use_touchscreen) 1132 return; 1133 1134 mxs_lradc_disable_ts(lradc); 1135 input_unregister_device(lradc->ts_input); 1136} 1137 1138/* 1139 * IRQ Handling 1140 */ 1141static irqreturn_t mxs_lradc_handle_irq(int irq, void *data) 1142{ 1143 struct iio_dev *iio = data; 1144 struct mxs_lradc *lradc = iio_priv(iio); 1145 unsigned long reg = readl(lradc->base + LRADC_CTRL1); 1146 uint32_t clr_irq = mxs_lradc_irq_mask(lradc); 1147 const uint32_t ts_irq_mask = 1148 LRADC_CTRL1_TOUCH_DETECT_IRQ | 1149 LRADC_CTRL1_LRADC_IRQ(TOUCHSCREEN_VCHANNEL1) | 1150 LRADC_CTRL1_LRADC_IRQ(TOUCHSCREEN_VCHANNEL2); 1151 1152 if (!(reg & mxs_lradc_irq_mask(lradc))) 1153 return IRQ_NONE; 1154 1155 if (lradc->use_touchscreen && (reg & ts_irq_mask)) { 1156 mxs_lradc_handle_touch(lradc); 1157 1158 /* Make sure we don't clear the next conversion's interrupt. */ 1159 clr_irq &= ~(LRADC_CTRL1_LRADC_IRQ(TOUCHSCREEN_VCHANNEL1) | 1160 LRADC_CTRL1_LRADC_IRQ(TOUCHSCREEN_VCHANNEL2)); 1161 } 1162 1163 if (iio_buffer_enabled(iio)) { 1164 if (reg & lradc->buffer_vchans) 1165 iio_trigger_poll(iio->trig); 1166 } else if (reg & LRADC_CTRL1_LRADC_IRQ(0)) { 1167 complete(&lradc->completion); 1168 } 1169 1170 mxs_lradc_reg_clear(lradc, reg & clr_irq, LRADC_CTRL1); 1171 1172 return IRQ_HANDLED; 1173} 1174 1175/* 1176 * Trigger handling 1177 */ 1178static irqreturn_t mxs_lradc_trigger_handler(int irq, void *p) 1179{ 1180 struct iio_poll_func *pf = p; 1181 struct iio_dev *iio = pf->indio_dev; 1182 struct mxs_lradc *lradc = iio_priv(iio); 1183 const uint32_t chan_value = LRADC_CH_ACCUMULATE | 1184 ((LRADC_DELAY_TIMER_LOOP - 1) << LRADC_CH_NUM_SAMPLES_OFFSET); 1185 unsigned int i, j = 0; 1186 1187 for_each_set_bit(i, iio->active_scan_mask, LRADC_MAX_TOTAL_CHANS) { 1188 lradc->buffer[j] = readl(lradc->base + LRADC_CH(j)); 1189 mxs_lradc_reg_wrt(lradc, chan_value, LRADC_CH(j)); 1190 lradc->buffer[j] &= LRADC_CH_VALUE_MASK; 1191 lradc->buffer[j] /= LRADC_DELAY_TIMER_LOOP; 1192 j++; 1193 } 1194 1195 iio_push_to_buffers_with_timestamp(iio, lradc->buffer, pf->timestamp); 1196 1197 iio_trigger_notify_done(iio->trig); 1198 1199 return IRQ_HANDLED; 1200} 1201 1202static int mxs_lradc_configure_trigger(struct iio_trigger *trig, bool state) 1203{ 1204 struct iio_dev *iio = iio_trigger_get_drvdata(trig); 1205 struct mxs_lradc *lradc = iio_priv(iio); 1206 const uint32_t st = state ? STMP_OFFSET_REG_SET : STMP_OFFSET_REG_CLR; 1207 1208 mxs_lradc_reg_wrt(lradc, LRADC_DELAY_KICK, LRADC_DELAY(0) + st); 1209 1210 return 0; 1211} 1212 1213static const struct iio_trigger_ops mxs_lradc_trigger_ops = { 1214 .owner = THIS_MODULE, 1215 .set_trigger_state = &mxs_lradc_configure_trigger, 1216}; 1217 1218static int mxs_lradc_trigger_init(struct iio_dev *iio) 1219{ 1220 int ret; 1221 struct iio_trigger *trig; 1222 struct mxs_lradc *lradc = iio_priv(iio); 1223 1224 trig = iio_trigger_alloc("%s-dev%i", iio->name, iio->id); 1225 if (trig == NULL) 1226 return -ENOMEM; 1227 1228 trig->dev.parent = lradc->dev; 1229 iio_trigger_set_drvdata(trig, iio); 1230 trig->ops = &mxs_lradc_trigger_ops; 1231 1232 ret = iio_trigger_register(trig); 1233 if (ret) { 1234 iio_trigger_free(trig); 1235 return ret; 1236 } 1237 1238 lradc->trig = trig; 1239 1240 return 0; 1241} 1242 1243static void mxs_lradc_trigger_remove(struct iio_dev *iio) 1244{ 1245 struct mxs_lradc *lradc = iio_priv(iio); 1246 1247 iio_trigger_unregister(lradc->trig); 1248 iio_trigger_free(lradc->trig); 1249} 1250 1251static int mxs_lradc_buffer_preenable(struct iio_dev *iio) 1252{ 1253 struct mxs_lradc *lradc = iio_priv(iio); 1254 int ret = 0, chan, ofs = 0; 1255 unsigned long enable = 0; 1256 uint32_t ctrl4_set = 0; 1257 uint32_t ctrl4_clr = 0; 1258 uint32_t ctrl1_irq = 0; 1259 const uint32_t chan_value = LRADC_CH_ACCUMULATE | 1260 ((LRADC_DELAY_TIMER_LOOP - 1) << LRADC_CH_NUM_SAMPLES_OFFSET); 1261 const int len = bitmap_weight(iio->active_scan_mask, 1262 LRADC_MAX_TOTAL_CHANS); 1263 1264 if (!len) 1265 return -EINVAL; 1266 1267 /* 1268 * Lock the driver so raw access can not be done during buffered 1269 * operation. This simplifies the code a lot. 1270 */ 1271 ret = mutex_trylock(&lradc->lock); 1272 if (!ret) 1273 return -EBUSY; 1274 1275 lradc->buffer = kmalloc_array(len, sizeof(*lradc->buffer), GFP_KERNEL); 1276 if (!lradc->buffer) { 1277 ret = -ENOMEM; 1278 goto err_mem; 1279 } 1280 1281 if (lradc->soc == IMX28_LRADC) 1282 mxs_lradc_reg_clear(lradc, 1283 lradc->buffer_vchans << LRADC_CTRL1_LRADC_IRQ_EN_OFFSET, 1284 LRADC_CTRL1); 1285 mxs_lradc_reg_clear(lradc, lradc->buffer_vchans, LRADC_CTRL0); 1286 1287 for_each_set_bit(chan, iio->active_scan_mask, LRADC_MAX_TOTAL_CHANS) { 1288 ctrl4_set |= chan << LRADC_CTRL4_LRADCSELECT_OFFSET(ofs); 1289 ctrl4_clr |= LRADC_CTRL4_LRADCSELECT_MASK(ofs); 1290 ctrl1_irq |= LRADC_CTRL1_LRADC_IRQ_EN(ofs); 1291 mxs_lradc_reg_wrt(lradc, chan_value, LRADC_CH(ofs)); 1292 bitmap_set(&enable, ofs, 1); 1293 ofs++; 1294 } 1295 1296 mxs_lradc_reg_clear(lradc, LRADC_DELAY_TRIGGER_LRADCS_MASK | 1297 LRADC_DELAY_KICK, LRADC_DELAY(0)); 1298 mxs_lradc_reg_clear(lradc, ctrl4_clr, LRADC_CTRL4); 1299 mxs_lradc_reg_set(lradc, ctrl4_set, LRADC_CTRL4); 1300 mxs_lradc_reg_set(lradc, ctrl1_irq, LRADC_CTRL1); 1301 mxs_lradc_reg_set(lradc, enable << LRADC_DELAY_TRIGGER_LRADCS_OFFSET, 1302 LRADC_DELAY(0)); 1303 1304 return 0; 1305 1306err_mem: 1307 mutex_unlock(&lradc->lock); 1308 return ret; 1309} 1310 1311static int mxs_lradc_buffer_postdisable(struct iio_dev *iio) 1312{ 1313 struct mxs_lradc *lradc = iio_priv(iio); 1314 1315 mxs_lradc_reg_clear(lradc, LRADC_DELAY_TRIGGER_LRADCS_MASK | 1316 LRADC_DELAY_KICK, LRADC_DELAY(0)); 1317 1318 mxs_lradc_reg_clear(lradc, lradc->buffer_vchans, LRADC_CTRL0); 1319 if (lradc->soc == IMX28_LRADC) 1320 mxs_lradc_reg_clear(lradc, 1321 lradc->buffer_vchans << LRADC_CTRL1_LRADC_IRQ_EN_OFFSET, 1322 LRADC_CTRL1); 1323 1324 kfree(lradc->buffer); 1325 mutex_unlock(&lradc->lock); 1326 1327 return 0; 1328} 1329 1330static bool mxs_lradc_validate_scan_mask(struct iio_dev *iio, 1331 const unsigned long *mask) 1332{ 1333 struct mxs_lradc *lradc = iio_priv(iio); 1334 const int map_chans = bitmap_weight(mask, LRADC_MAX_TOTAL_CHANS); 1335 int rsvd_chans = 0; 1336 unsigned long rsvd_mask = 0; 1337 1338 if (lradc->use_touchbutton) 1339 rsvd_mask |= CHAN_MASK_TOUCHBUTTON; 1340 if (lradc->use_touchscreen == MXS_LRADC_TOUCHSCREEN_4WIRE) 1341 rsvd_mask |= CHAN_MASK_TOUCHSCREEN_4WIRE; 1342 if (lradc->use_touchscreen == MXS_LRADC_TOUCHSCREEN_5WIRE) 1343 rsvd_mask |= CHAN_MASK_TOUCHSCREEN_5WIRE; 1344 1345 if (lradc->use_touchbutton) 1346 rsvd_chans++; 1347 if (lradc->use_touchscreen) 1348 rsvd_chans += 2; 1349 1350 /* Test for attempts to map channels with special mode of operation. */ 1351 if (bitmap_intersects(mask, &rsvd_mask, LRADC_MAX_TOTAL_CHANS)) 1352 return false; 1353 1354 /* Test for attempts to map more channels then available slots. */ 1355 if (map_chans + rsvd_chans > LRADC_MAX_MAPPED_CHANS) 1356 return false; 1357 1358 return true; 1359} 1360 1361static const struct iio_buffer_setup_ops mxs_lradc_buffer_ops = { 1362 .preenable = &mxs_lradc_buffer_preenable, 1363 .postenable = &iio_triggered_buffer_postenable, 1364 .predisable = &iio_triggered_buffer_predisable, 1365 .postdisable = &mxs_lradc_buffer_postdisable, 1366 .validate_scan_mask = &mxs_lradc_validate_scan_mask, 1367}; 1368 1369/* 1370 * Driver initialization 1371 */ 1372 1373#define MXS_ADC_CHAN(idx, chan_type) { \ 1374 .type = (chan_type), \ 1375 .indexed = 1, \ 1376 .scan_index = (idx), \ 1377 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | \ 1378 BIT(IIO_CHAN_INFO_SCALE), \ 1379 .channel = (idx), \ 1380 .address = (idx), \ 1381 .scan_type = { \ 1382 .sign = 'u', \ 1383 .realbits = LRADC_RESOLUTION, \ 1384 .storagebits = 32, \ 1385 }, \ 1386} 1387 1388static const struct iio_chan_spec mxs_lradc_chan_spec[] = { 1389 MXS_ADC_CHAN(0, IIO_VOLTAGE), 1390 MXS_ADC_CHAN(1, IIO_VOLTAGE), 1391 MXS_ADC_CHAN(2, IIO_VOLTAGE), 1392 MXS_ADC_CHAN(3, IIO_VOLTAGE), 1393 MXS_ADC_CHAN(4, IIO_VOLTAGE), 1394 MXS_ADC_CHAN(5, IIO_VOLTAGE), 1395 MXS_ADC_CHAN(6, IIO_VOLTAGE), 1396 MXS_ADC_CHAN(7, IIO_VOLTAGE), /* VBATT */ 1397 /* Combined Temperature sensors */ 1398 { 1399 .type = IIO_TEMP, 1400 .indexed = 1, 1401 .scan_index = 8, 1402 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | 1403 BIT(IIO_CHAN_INFO_OFFSET) | 1404 BIT(IIO_CHAN_INFO_SCALE), 1405 .channel = 8, 1406 .scan_type = {.sign = 'u', .realbits = 18, .storagebits = 32,}, 1407 }, 1408 /* Hidden channel to keep indexes */ 1409 { 1410 .type = IIO_TEMP, 1411 .indexed = 1, 1412 .scan_index = -1, 1413 .channel = 9, 1414 }, 1415 MXS_ADC_CHAN(10, IIO_VOLTAGE), /* VDDIO */ 1416 MXS_ADC_CHAN(11, IIO_VOLTAGE), /* VTH */ 1417 MXS_ADC_CHAN(12, IIO_VOLTAGE), /* VDDA */ 1418 MXS_ADC_CHAN(13, IIO_VOLTAGE), /* VDDD */ 1419 MXS_ADC_CHAN(14, IIO_VOLTAGE), /* VBG */ 1420 MXS_ADC_CHAN(15, IIO_VOLTAGE), /* VDD5V */ 1421}; 1422 1423static int mxs_lradc_hw_init(struct mxs_lradc *lradc) 1424{ 1425 /* The ADC always uses DELAY CHANNEL 0. */ 1426 const uint32_t adc_cfg = 1427 (1 << (LRADC_DELAY_TRIGGER_DELAYS_OFFSET + 0)) | 1428 (LRADC_DELAY_TIMER_PER << LRADC_DELAY_DELAY_OFFSET); 1429 1430 int ret = stmp_reset_block(lradc->base); 1431 1432 if (ret) 1433 return ret; 1434 1435 /* Configure DELAY CHANNEL 0 for generic ADC sampling. */ 1436 mxs_lradc_reg_wrt(lradc, adc_cfg, LRADC_DELAY(0)); 1437 1438 /* Disable remaining DELAY CHANNELs */ 1439 mxs_lradc_reg_wrt(lradc, 0, LRADC_DELAY(1)); 1440 mxs_lradc_reg_wrt(lradc, 0, LRADC_DELAY(2)); 1441 mxs_lradc_reg_wrt(lradc, 0, LRADC_DELAY(3)); 1442 1443 /* Configure the touchscreen type */ 1444 if (lradc->soc == IMX28_LRADC) { 1445 mxs_lradc_reg_clear(lradc, LRADC_CTRL0_MX28_TOUCH_SCREEN_TYPE, 1446 LRADC_CTRL0); 1447 1448 if (lradc->use_touchscreen == MXS_LRADC_TOUCHSCREEN_5WIRE) 1449 mxs_lradc_reg_set(lradc, LRADC_CTRL0_MX28_TOUCH_SCREEN_TYPE, 1450 LRADC_CTRL0); 1451 } 1452 1453 /* Start internal temperature sensing. */ 1454 mxs_lradc_reg_wrt(lradc, 0, LRADC_CTRL2); 1455 1456 return 0; 1457} 1458 1459static void mxs_lradc_hw_stop(struct mxs_lradc *lradc) 1460{ 1461 int i; 1462 1463 mxs_lradc_reg_clear(lradc, mxs_lradc_irq_en_mask(lradc), LRADC_CTRL1); 1464 1465 for (i = 0; i < LRADC_MAX_DELAY_CHANS; i++) 1466 mxs_lradc_reg_wrt(lradc, 0, LRADC_DELAY(i)); 1467} 1468 1469static const struct of_device_id mxs_lradc_dt_ids[] = { 1470 { .compatible = "fsl,imx23-lradc", .data = (void *)IMX23_LRADC, }, 1471 { .compatible = "fsl,imx28-lradc", .data = (void *)IMX28_LRADC, }, 1472 { /* sentinel */ } 1473}; 1474MODULE_DEVICE_TABLE(of, mxs_lradc_dt_ids); 1475 1476static int mxs_lradc_probe_touchscreen(struct mxs_lradc *lradc, 1477 struct device_node *lradc_node) 1478{ 1479 int ret; 1480 u32 ts_wires = 0, adapt; 1481 1482 ret = of_property_read_u32(lradc_node, "fsl,lradc-touchscreen-wires", 1483 &ts_wires); 1484 if (ret) 1485 return -ENODEV; /* touchscreen feature disabled */ 1486 1487 switch (ts_wires) { 1488 case 4: 1489 lradc->use_touchscreen = MXS_LRADC_TOUCHSCREEN_4WIRE; 1490 break; 1491 case 5: 1492 if (lradc->soc == IMX28_LRADC) { 1493 lradc->use_touchscreen = MXS_LRADC_TOUCHSCREEN_5WIRE; 1494 break; 1495 } 1496 /* fall through an error message for i.MX23 */ 1497 default: 1498 dev_err(lradc->dev, 1499 "Unsupported number of touchscreen wires (%d)\n", 1500 ts_wires); 1501 return -EINVAL; 1502 } 1503 1504 if (of_property_read_u32(lradc_node, "fsl,ave-ctrl", &adapt)) { 1505 lradc->over_sample_cnt = 4; 1506 } else { 1507 if (adapt < 1 || adapt > 32) { 1508 dev_err(lradc->dev, "Invalid sample count (%u)\n", 1509 adapt); 1510 return -EINVAL; 1511 } 1512 lradc->over_sample_cnt = adapt; 1513 } 1514 1515 if (of_property_read_u32(lradc_node, "fsl,ave-delay", &adapt)) { 1516 lradc->over_sample_delay = 2; 1517 } else { 1518 if (adapt < 2 || adapt > LRADC_DELAY_DELAY_MASK + 1) { 1519 dev_err(lradc->dev, "Invalid sample delay (%u)\n", 1520 adapt); 1521 return -EINVAL; 1522 } 1523 lradc->over_sample_delay = adapt; 1524 } 1525 1526 if (of_property_read_u32(lradc_node, "fsl,settling", &adapt)) { 1527 lradc->settling_delay = 10; 1528 } else { 1529 if (adapt < 1 || adapt > LRADC_DELAY_DELAY_MASK) { 1530 dev_err(lradc->dev, "Invalid settling delay (%u)\n", 1531 adapt); 1532 return -EINVAL; 1533 } 1534 lradc->settling_delay = adapt; 1535 } 1536 1537 return 0; 1538} 1539 1540static int mxs_lradc_probe(struct platform_device *pdev) 1541{ 1542 const struct of_device_id *of_id = 1543 of_match_device(mxs_lradc_dt_ids, &pdev->dev); 1544 const struct mxs_lradc_of_config *of_cfg = 1545 &mxs_lradc_of_config[(enum mxs_lradc_id)of_id->data]; 1546 struct device *dev = &pdev->dev; 1547 struct device_node *node = dev->of_node; 1548 struct mxs_lradc *lradc; 1549 struct iio_dev *iio; 1550 struct resource *iores; 1551 int ret = 0, touch_ret; 1552 int i, s; 1553 uint64_t scale_uv; 1554 1555 /* Allocate the IIO device. */ 1556 iio = devm_iio_device_alloc(dev, sizeof(*lradc)); 1557 if (!iio) { 1558 dev_err(dev, "Failed to allocate IIO device\n"); 1559 return -ENOMEM; 1560 } 1561 1562 lradc = iio_priv(iio); 1563 lradc->soc = (enum mxs_lradc_id)of_id->data; 1564 1565 /* Grab the memory area */ 1566 iores = platform_get_resource(pdev, IORESOURCE_MEM, 0); 1567 lradc->dev = &pdev->dev; 1568 lradc->base = devm_ioremap_resource(dev, iores); 1569 if (IS_ERR(lradc->base)) 1570 return PTR_ERR(lradc->base); 1571 1572 lradc->clk = devm_clk_get(&pdev->dev, NULL); 1573 if (IS_ERR(lradc->clk)) { 1574 dev_err(dev, "Failed to get the delay unit clock\n"); 1575 return PTR_ERR(lradc->clk); 1576 } 1577 ret = clk_prepare_enable(lradc->clk); 1578 if (ret != 0) { 1579 dev_err(dev, "Failed to enable the delay unit clock\n"); 1580 return ret; 1581 } 1582 1583 touch_ret = mxs_lradc_probe_touchscreen(lradc, node); 1584 1585 if (touch_ret == 0) 1586 lradc->buffer_vchans = BUFFER_VCHANS_LIMITED; 1587 else 1588 lradc->buffer_vchans = BUFFER_VCHANS_ALL; 1589 1590 /* Grab all IRQ sources */ 1591 for (i = 0; i < of_cfg->irq_count; i++) { 1592 lradc->irq[i] = platform_get_irq(pdev, i); 1593 if (lradc->irq[i] < 0) { 1594 ret = lradc->irq[i]; 1595 goto err_clk; 1596 } 1597 1598 ret = devm_request_irq(dev, lradc->irq[i], 1599 mxs_lradc_handle_irq, 0, 1600 of_cfg->irq_name[i], iio); 1601 if (ret) 1602 goto err_clk; 1603 } 1604 1605 lradc->vref_mv = of_cfg->vref_mv; 1606 1607 platform_set_drvdata(pdev, iio); 1608 1609 init_completion(&lradc->completion); 1610 mutex_init(&lradc->lock); 1611 1612 iio->name = pdev->name; 1613 iio->dev.parent = &pdev->dev; 1614 iio->info = &mxs_lradc_iio_info; 1615 iio->modes = INDIO_DIRECT_MODE; 1616 iio->channels = mxs_lradc_chan_spec; 1617 iio->num_channels = ARRAY_SIZE(mxs_lradc_chan_spec); 1618 iio->masklength = LRADC_MAX_TOTAL_CHANS; 1619 1620 ret = iio_triggered_buffer_setup(iio, &iio_pollfunc_store_time, 1621 &mxs_lradc_trigger_handler, 1622 &mxs_lradc_buffer_ops); 1623 if (ret) 1624 goto err_clk; 1625 1626 ret = mxs_lradc_trigger_init(iio); 1627 if (ret) 1628 goto err_trig; 1629 1630 /* Populate available ADC input ranges */ 1631 for (i = 0; i < LRADC_MAX_TOTAL_CHANS; i++) { 1632 for (s = 0; s < ARRAY_SIZE(lradc->scale_avail[i]); s++) { 1633 /* 1634 * [s=0] = optional divider by two disabled (default) 1635 * [s=1] = optional divider by two enabled 1636 * 1637 * The scale is calculated by doing: 1638 * Vref >> (realbits - s) 1639 * which multiplies by two on the second component 1640 * of the array. 1641 */ 1642 scale_uv = ((u64)lradc->vref_mv[i] * 100000000) >> 1643 (LRADC_RESOLUTION - s); 1644 lradc->scale_avail[i][s].nano = 1645 do_div(scale_uv, 100000000) * 10; 1646 lradc->scale_avail[i][s].integer = scale_uv; 1647 } 1648 } 1649 1650 /* Configure the hardware. */ 1651 ret = mxs_lradc_hw_init(lradc); 1652 if (ret) 1653 goto err_dev; 1654 1655 /* Register the touchscreen input device. */ 1656 if (touch_ret == 0) { 1657 ret = mxs_lradc_ts_register(lradc); 1658 if (ret) 1659 goto err_ts_register; 1660 } 1661 1662 /* Register IIO device. */ 1663 ret = iio_device_register(iio); 1664 if (ret) { 1665 dev_err(dev, "Failed to register IIO device\n"); 1666 goto err_ts; 1667 } 1668 1669 return 0; 1670 1671err_ts: 1672 mxs_lradc_ts_unregister(lradc); 1673err_ts_register: 1674 mxs_lradc_hw_stop(lradc); 1675err_dev: 1676 mxs_lradc_trigger_remove(iio); 1677err_trig: 1678 iio_triggered_buffer_cleanup(iio); 1679err_clk: 1680 clk_disable_unprepare(lradc->clk); 1681 return ret; 1682} 1683 1684static int mxs_lradc_remove(struct platform_device *pdev) 1685{ 1686 struct iio_dev *iio = platform_get_drvdata(pdev); 1687 struct mxs_lradc *lradc = iio_priv(iio); 1688 1689 iio_device_unregister(iio); 1690 mxs_lradc_ts_unregister(lradc); 1691 mxs_lradc_hw_stop(lradc); 1692 mxs_lradc_trigger_remove(iio); 1693 iio_triggered_buffer_cleanup(iio); 1694 1695 clk_disable_unprepare(lradc->clk); 1696 return 0; 1697} 1698 1699static struct platform_driver mxs_lradc_driver = { 1700 .driver = { 1701 .name = DRIVER_NAME, 1702 .of_match_table = mxs_lradc_dt_ids, 1703 }, 1704 .probe = mxs_lradc_probe, 1705 .remove = mxs_lradc_remove, 1706}; 1707 1708module_platform_driver(mxs_lradc_driver); 1709 1710MODULE_AUTHOR("Marek Vasut <marex@denx.de>"); 1711MODULE_DESCRIPTION("Freescale i.MX28 LRADC driver"); 1712MODULE_LICENSE("GPL v2"); 1713MODULE_ALIAS("platform:" DRIVER_NAME); 1714