1/*
2 * FB driver for the ST7735R LCD Controller
3 *
4 * Copyright (C) 2013 Noralf Tronnes
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
19 */
20
21#include <linux/module.h>
22#include <linux/kernel.h>
23#include <linux/init.h>
24
25#include "fbtft.h"
26
27#define DRVNAME "fb_st7735r"
28#define DEFAULT_GAMMA "0F 1A 0F 18 2F 28 20 22 1F 1B 23 37 00 07 02 10\n" \
29                      "0F 1B 0F 17 33 2C 29 2E 30 30 39 3F 00 07 03 10"
30
31
32static int default_init_sequence[] = {
33	/* SWRESET - Software reset */
34	-1, 0x01,
35	-2, 150,                               /* delay */
36
37	/* SLPOUT - Sleep out & booster on */
38	-1, 0x11,
39	-2, 500,                               /* delay */
40
41	/* FRMCTR1 - frame rate control: normal mode
42	     frame rate = fosc / (1 x 2 + 40) * (LINE + 2C + 2D) */
43	-1, 0xB1, 0x01, 0x2C, 0x2D,
44
45	/* FRMCTR2 - frame rate control: idle mode
46	     frame rate = fosc / (1 x 2 + 40) * (LINE + 2C + 2D) */
47	-1, 0xB2, 0x01, 0x2C, 0x2D,
48
49	/* FRMCTR3 - frame rate control - partial mode
50	     dot inversion mode, line inversion mode */
51	-1, 0xB3, 0x01, 0x2C, 0x2D, 0x01, 0x2C, 0x2D,
52
53	/* INVCTR - display inversion control
54	     no inversion */
55	-1, 0xB4, 0x07,
56
57	/* PWCTR1 - Power Control
58	     -4.6V, AUTO mode */
59	-1, 0xC0, 0xA2, 0x02, 0x84,
60
61	/* PWCTR2 - Power Control
62	     VGH25 = 2.4C VGSEL = -10 VGH = 3 * AVDD */
63	-1, 0xC1, 0xC5,
64
65	/* PWCTR3 - Power Control
66	     Opamp current small, Boost frequency */
67	-1, 0xC2, 0x0A, 0x00,
68
69	/* PWCTR4 - Power Control
70	     BCLK/2, Opamp current small & Medium low */
71	-1, 0xC3, 0x8A, 0x2A,
72
73	/* PWCTR5 - Power Control */
74	-1, 0xC4, 0x8A, 0xEE,
75
76	/* VMCTR1 - Power Control */
77	-1, 0xC5, 0x0E,
78
79	/* INVOFF - Display inversion off */
80	-1, 0x20,
81
82	/* COLMOD - Interface pixel format */
83	-1, 0x3A, 0x05,
84
85	/* DISPON - Display On */
86	-1, 0x29,
87	-2, 100,                               /* delay */
88
89	/* NORON - Partial off (Normal) */
90	-1, 0x13,
91	-2, 10,                               /* delay */
92
93	/* end marker */
94	-3
95};
96
97static void set_addr_win(struct fbtft_par *par, int xs, int ys, int xe, int ye)
98{
99	fbtft_par_dbg(DEBUG_SET_ADDR_WIN, par,
100		"%s(xs=%d, ys=%d, xe=%d, ye=%d)\n", __func__, xs, ys, xe, ye);
101
102	/* Column address */
103	write_reg(par, 0x2A, xs >> 8, xs & 0xFF, xe >> 8, xe & 0xFF);
104
105	/* Row address */
106	write_reg(par, 0x2B, ys >> 8, ys & 0xFF, ye >> 8, ye & 0xFF);
107
108	/* Memory write */
109	write_reg(par, 0x2C);
110}
111
112#define MY (1 << 7)
113#define MX (1 << 6)
114#define MV (1 << 5)
115static int set_var(struct fbtft_par *par)
116{
117	fbtft_par_dbg(DEBUG_INIT_DISPLAY, par, "%s()\n", __func__);
118
119	/* MADCTL - Memory data access control
120	     RGB/BGR:
121	     1. Mode selection pin SRGB
122	        RGB H/W pin for color filter setting: 0=RGB, 1=BGR
123	     2. MADCTL RGB bit
124	        RGB-BGR ORDER color filter panel: 0=RGB, 1=BGR */
125	switch (par->info->var.rotate) {
126	case 0:
127		write_reg(par, 0x36, MX | MY | (par->bgr << 3));
128		break;
129	case 270:
130		write_reg(par, 0x36, MY | MV | (par->bgr << 3));
131		break;
132	case 180:
133		write_reg(par, 0x36, par->bgr << 3);
134		break;
135	case 90:
136		write_reg(par, 0x36, MX | MV | (par->bgr << 3));
137		break;
138	}
139
140	return 0;
141}
142
143/*
144  Gamma string format:
145    VRF0P VOS0P PK0P PK1P PK2P PK3P PK4P PK5P PK6P PK7P PK8P PK9P SELV0P SELV1P SELV62P SELV63P
146    VRF0N VOS0N PK0N PK1N PK2N PK3N PK4N PK5N PK6N PK7N PK8N PK9N SELV0N SELV1N SELV62N SELV63N
147*/
148#define CURVE(num, idx)  curves[num*par->gamma.num_values + idx]
149static int set_gamma(struct fbtft_par *par, unsigned long *curves)
150{
151	int i, j;
152
153	fbtft_par_dbg(DEBUG_INIT_DISPLAY, par, "%s()\n", __func__);
154
155	/* apply mask */
156	for (i = 0; i < par->gamma.num_curves; i++)
157		for (j = 0; j < par->gamma.num_values; j++)
158			CURVE(i, j) &= 0x3f;
159
160	for (i = 0; i < par->gamma.num_curves; i++)
161		write_reg(par, 0xE0 + i,
162			CURVE(i, 0), CURVE(i, 1), CURVE(i, 2), CURVE(i, 3),
163			CURVE(i, 4), CURVE(i, 5), CURVE(i, 6), CURVE(i, 7),
164			CURVE(i, 8), CURVE(i, 9), CURVE(i, 10), CURVE(i, 11),
165			CURVE(i, 12), CURVE(i, 13), CURVE(i, 14), CURVE(i, 15));
166
167	return 0;
168}
169#undef CURVE
170
171
172static struct fbtft_display display = {
173	.regwidth = 8,
174	.width = 128,
175	.height = 160,
176	.init_sequence = default_init_sequence,
177	.gamma_num = 2,
178	.gamma_len = 16,
179	.gamma = DEFAULT_GAMMA,
180	.fbtftops = {
181		.set_addr_win = set_addr_win,
182		.set_var = set_var,
183		.set_gamma = set_gamma,
184	},
185};
186FBTFT_REGISTER_DRIVER(DRVNAME, "sitronix,st7735r", &display);
187
188MODULE_ALIAS("spi:" DRVNAME);
189MODULE_ALIAS("platform:" DRVNAME);
190MODULE_ALIAS("spi:st7735r");
191MODULE_ALIAS("platform:st7735r");
192
193MODULE_DESCRIPTION("FB driver for the ST7735R LCD Controller");
194MODULE_AUTHOR("Noralf Tronnes");
195MODULE_LICENSE("GPL");
196