1/* 2 * FB driver for the ILI9325 LCD Controller 3 * 4 * Copyright (C) 2013 Noralf Tronnes 5 * 6 * Based on ili9325.c by Jeroen Domburg 7 * 8 * This program is free software; you can redistribute it and/or modify 9 * it under the terms of the GNU General Public License as published by 10 * the Free Software Foundation; either version 2 of the License, or 11 * (at your option) any later version. 12 * 13 * This program is distributed in the hope that it will be useful, 14 * but WITHOUT ANY WARRANTY; without even the implied warranty of 15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 16 * GNU General Public License for more details. 17 * 18 * You should have received a copy of the GNU General Public License 19 * along with this program; if not, write to the Free Software 20 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. 21 */ 22 23#include <linux/module.h> 24#include <linux/kernel.h> 25#include <linux/init.h> 26#include <linux/gpio.h> 27#include <linux/delay.h> 28 29#include "fbtft.h" 30 31#define DRVNAME "fb_ili9325" 32#define WIDTH 240 33#define HEIGHT 320 34#define BPP 16 35#define FPS 20 36#define DEFAULT_GAMMA "0F 00 7 2 0 0 6 5 4 1\n" \ 37 "04 16 2 7 6 3 2 1 7 7" 38 39 40static unsigned bt = 6; /* VGL=Vci*4 , VGH=Vci*4 */ 41module_param(bt, uint, 0); 42MODULE_PARM_DESC(bt, "Sets the factor used in the step-up circuits"); 43 44static unsigned vc = 0x03; /* Vci1=Vci*0.80 */ 45module_param(vc, uint, 0); 46MODULE_PARM_DESC(vc, 47"Sets the ratio factor of Vci to generate the reference voltages Vci1"); 48 49static unsigned vrh = 0x0d; /* VREG1OUT=Vci*1.85 */ 50module_param(vrh, uint, 0); 51MODULE_PARM_DESC(vrh, 52"Set the amplifying rate (1.6 ~ 1.9) of Vci applied to output the VREG1OUT"); 53 54static unsigned vdv = 0x12; /* VCOMH amplitude=VREG1OUT*0.98 */ 55module_param(vdv, uint, 0); 56MODULE_PARM_DESC(vdv, 57"Select the factor of VREG1OUT to set the amplitude of Vcom"); 58 59static unsigned vcm = 0x0a; /* VCOMH=VREG1OUT*0.735 */ 60module_param(vcm, uint, 0); 61MODULE_PARM_DESC(vcm, "Set the internal VcomH voltage"); 62 63 64/* 65Verify that this configuration is within the Voltage limits 66 67Display module configuration: Vcc = IOVcc = Vci = 3.3V 68 69 Voltages 70---------- 71Vci = 3.3 72Vci1 = Vci * 0.80 = 2.64 73DDVDH = Vci1 * 2 = 5.28 74VCL = -Vci1 = -2.64 75VREG1OUT = Vci * 1.85 = 4.88 76VCOMH = VREG1OUT * 0.735 = 3.59 77VCOM amplitude = VREG1OUT * 0.98 = 4.79 78VGH = Vci * 4 = 13.2 79VGL = -Vci * 4 = -13.2 80 81 Limits 82-------- 83Power supplies 841.65 < IOVcc < 3.30 => 1.65 < 3.3 < 3.30 852.40 < Vcc < 3.30 => 2.40 < 3.3 < 3.30 862.50 < Vci < 3.30 => 2.50 < 3.3 < 3.30 87 88Source/VCOM power supply voltage 89 4.50 < DDVDH < 6.0 => 4.50 < 5.28 < 6.0 90-3.0 < VCL < -2.0 => -3.0 < -2.64 < -2.0 91VCI - VCL < 6.0 => 5.94 < 6.0 92 93Gate driver output voltage 94 10 < VGH < 20 => 10 < 13.2 < 20 95-15 < VGL < -5 => -15 < -13.2 < -5 96VGH - VGL < 32 => 26.4 < 32 97 98VCOM driver output voltage 99VCOMH - VCOML < 6.0 => 4.79 < 6.0 100*/ 101 102static int init_display(struct fbtft_par *par) 103{ 104 fbtft_par_dbg(DEBUG_INIT_DISPLAY, par, "%s()\n", __func__); 105 106 par->fbtftops.reset(par); 107 108 if (par->gpio.cs != -1) 109 gpio_set_value(par->gpio.cs, 0); /* Activate chip */ 110 111 bt &= 0x07; 112 vc &= 0x07; 113 vrh &= 0x0f; 114 vdv &= 0x1f; 115 vcm &= 0x3f; 116 117 /* Initialization sequence from ILI9325 Application Notes */ 118 119 /* ----------- Start Initial Sequence ----------- */ 120 write_reg(par, 0x00E3, 0x3008); /* Set internal timing */ 121 write_reg(par, 0x00E7, 0x0012); /* Set internal timing */ 122 write_reg(par, 0x00EF, 0x1231); /* Set internal timing */ 123 write_reg(par, 0x0001, 0x0100); /* set SS and SM bit */ 124 write_reg(par, 0x0002, 0x0700); /* set 1 line inversion */ 125 write_reg(par, 0x0004, 0x0000); /* Resize register */ 126 write_reg(par, 0x0008, 0x0207); /* set the back porch and front porch */ 127 write_reg(par, 0x0009, 0x0000); /* set non-display area refresh cycle */ 128 write_reg(par, 0x000A, 0x0000); /* FMARK function */ 129 write_reg(par, 0x000C, 0x0000); /* RGB interface setting */ 130 write_reg(par, 0x000D, 0x0000); /* Frame marker Position */ 131 write_reg(par, 0x000F, 0x0000); /* RGB interface polarity */ 132 133 /* ----------- Power On sequence ----------- */ 134 write_reg(par, 0x0010, 0x0000); /* SAP, BT[3:0], AP, DSTB, SLP, STB */ 135 write_reg(par, 0x0011, 0x0007); /* DC1[2:0], DC0[2:0], VC[2:0] */ 136 write_reg(par, 0x0012, 0x0000); /* VREG1OUT voltage */ 137 write_reg(par, 0x0013, 0x0000); /* VDV[4:0] for VCOM amplitude */ 138 mdelay(200); /* Dis-charge capacitor power voltage */ 139 write_reg(par, 0x0010, /* SAP, BT[3:0], AP, DSTB, SLP, STB */ 140 (1 << 12) | (bt << 8) | (1 << 7) | (0x01 << 4)); 141 write_reg(par, 0x0011, 0x220 | vc); /* DC1[2:0], DC0[2:0], VC[2:0] */ 142 mdelay(50); /* Delay 50ms */ 143 write_reg(par, 0x0012, vrh); /* Internal reference voltage= Vci; */ 144 mdelay(50); /* Delay 50ms */ 145 write_reg(par, 0x0013, vdv << 8); /* Set VDV[4:0] for VCOM amplitude */ 146 write_reg(par, 0x0029, vcm); /* Set VCM[5:0] for VCOMH */ 147 write_reg(par, 0x002B, 0x000C); /* Set Frame Rate */ 148 mdelay(50); /* Delay 50ms */ 149 write_reg(par, 0x0020, 0x0000); /* GRAM horizontal Address */ 150 write_reg(par, 0x0021, 0x0000); /* GRAM Vertical Address */ 151 152 /*------------------ Set GRAM area --------------- */ 153 write_reg(par, 0x0050, 0x0000); /* Horizontal GRAM Start Address */ 154 write_reg(par, 0x0051, 0x00EF); /* Horizontal GRAM End Address */ 155 write_reg(par, 0x0052, 0x0000); /* Vertical GRAM Start Address */ 156 write_reg(par, 0x0053, 0x013F); /* Vertical GRAM Start Address */ 157 write_reg(par, 0x0060, 0xA700); /* Gate Scan Line */ 158 write_reg(par, 0x0061, 0x0001); /* NDL,VLE, REV */ 159 write_reg(par, 0x006A, 0x0000); /* set scrolling line */ 160 161 /*-------------- Partial Display Control --------- */ 162 write_reg(par, 0x0080, 0x0000); 163 write_reg(par, 0x0081, 0x0000); 164 write_reg(par, 0x0082, 0x0000); 165 write_reg(par, 0x0083, 0x0000); 166 write_reg(par, 0x0084, 0x0000); 167 write_reg(par, 0x0085, 0x0000); 168 169 /*-------------- Panel Control ------------------- */ 170 write_reg(par, 0x0090, 0x0010); 171 write_reg(par, 0x0092, 0x0600); 172 write_reg(par, 0x0007, 0x0133); /* 262K color and display ON */ 173 174 return 0; 175} 176 177static void set_addr_win(struct fbtft_par *par, int xs, int ys, int xe, int ye) 178{ 179 fbtft_par_dbg(DEBUG_SET_ADDR_WIN, par, 180 "%s(xs=%d, ys=%d, xe=%d, ye=%d)\n", __func__, xs, ys, xe, ye); 181 switch (par->info->var.rotate) { 182 /* R20h = Horizontal GRAM Start Address */ 183 /* R21h = Vertical GRAM Start Address */ 184 case 0: 185 write_reg(par, 0x0020, xs); 186 write_reg(par, 0x0021, ys); 187 break; 188 case 180: 189 write_reg(par, 0x0020, WIDTH - 1 - xs); 190 write_reg(par, 0x0021, HEIGHT - 1 - ys); 191 break; 192 case 270: 193 write_reg(par, 0x0020, WIDTH - 1 - ys); 194 write_reg(par, 0x0021, xs); 195 break; 196 case 90: 197 write_reg(par, 0x0020, ys); 198 write_reg(par, 0x0021, HEIGHT - 1 - xs); 199 break; 200 } 201 write_reg(par, 0x0022); /* Write Data to GRAM */ 202} 203 204static int set_var(struct fbtft_par *par) 205{ 206 fbtft_par_dbg(DEBUG_INIT_DISPLAY, par, "%s()\n", __func__); 207 208 switch (par->info->var.rotate) { 209 /* AM: GRAM update direction */ 210 case 0: 211 write_reg(par, 0x03, 0x0030 | (par->bgr << 12)); 212 break; 213 case 180: 214 write_reg(par, 0x03, 0x0000 | (par->bgr << 12)); 215 break; 216 case 270: 217 write_reg(par, 0x03, 0x0028 | (par->bgr << 12)); 218 break; 219 case 90: 220 write_reg(par, 0x03, 0x0018 | (par->bgr << 12)); 221 break; 222 } 223 224 return 0; 225} 226 227/* 228 Gamma string format: 229 VRP0 VRP1 RP0 RP1 KP0 KP1 KP2 KP3 KP4 KP5 230 VRN0 VRN1 RN0 RN1 KN0 KN1 KN2 KN3 KN4 KN5 231*/ 232#define CURVE(num, idx) curves[num*par->gamma.num_values + idx] 233static int set_gamma(struct fbtft_par *par, unsigned long *curves) 234{ 235 unsigned long mask[] = { 236 0x1f, 0x1f, 0x07, 0x07, 0x07, 0x07, 0x07, 0x07, 0x07, 0x07, 237 0x1f, 0x1f, 0x07, 0x07, 0x07, 0x07, 0x07, 0x07, 0x07, 0x07, 238 }; 239 int i, j; 240 241 fbtft_par_dbg(DEBUG_INIT_DISPLAY, par, "%s()\n", __func__); 242 243 /* apply mask */ 244 for (i = 0; i < 2; i++) 245 for (j = 0; j < 10; j++) 246 CURVE(i, j) &= mask[i*par->gamma.num_values + j]; 247 248 write_reg(par, 0x0030, CURVE(0, 5) << 8 | CURVE(0, 4)); 249 write_reg(par, 0x0031, CURVE(0, 7) << 8 | CURVE(0, 6)); 250 write_reg(par, 0x0032, CURVE(0, 9) << 8 | CURVE(0, 8)); 251 write_reg(par, 0x0035, CURVE(0, 3) << 8 | CURVE(0, 2)); 252 write_reg(par, 0x0036, CURVE(0, 1) << 8 | CURVE(0, 0)); 253 254 write_reg(par, 0x0037, CURVE(1, 5) << 8 | CURVE(1, 4)); 255 write_reg(par, 0x0038, CURVE(1, 7) << 8 | CURVE(1, 6)); 256 write_reg(par, 0x0039, CURVE(1, 9) << 8 | CURVE(1, 8)); 257 write_reg(par, 0x003C, CURVE(1, 3) << 8 | CURVE(1, 2)); 258 write_reg(par, 0x003D, CURVE(1, 1) << 8 | CURVE(1, 0)); 259 260 return 0; 261} 262#undef CURVE 263 264 265static struct fbtft_display display = { 266 .regwidth = 16, 267 .width = WIDTH, 268 .height = HEIGHT, 269 .bpp = BPP, 270 .fps = FPS, 271 .gamma_num = 2, 272 .gamma_len = 10, 273 .gamma = DEFAULT_GAMMA, 274 .fbtftops = { 275 .init_display = init_display, 276 .set_addr_win = set_addr_win, 277 .set_var = set_var, 278 .set_gamma = set_gamma, 279 }, 280}; 281FBTFT_REGISTER_DRIVER(DRVNAME, "ilitek,ili9325", &display); 282 283MODULE_ALIAS("spi:" DRVNAME); 284MODULE_ALIAS("platform:" DRVNAME); 285MODULE_ALIAS("spi:ili9325"); 286MODULE_ALIAS("platform:ili9325"); 287 288MODULE_DESCRIPTION("FB driver for the ILI9325 LCD Controller"); 289MODULE_AUTHOR("Noralf Tronnes"); 290MODULE_LICENSE("GPL"); 291