1#ifndef _WD719X_H_ 2#define _WD719X_H_ 3 4#define WD719X_SG 255 /* Scatter/gather size */ 5#define WD719X_CMD_PER_LUN 1 /* We should be able to do linked commands, but 6 * this is 1 for now to be safe. */ 7 8struct wd719x_sglist { 9 __le32 ptr; 10 __le32 length; 11} __packed; 12 13enum wd719x_card_type { 14 WD719X_TYPE_UNKNOWN = 0, 15 WD719X_TYPE_7193, 16 WD719X_TYPE_7197, 17 WD719X_TYPE_7296, 18}; 19 20union wd719x_regs { 21 __le32 all; /* All Status at once */ 22 struct { 23 u8 OPC; /* Opcode register */ 24 u8 SCSI; /* SCSI Errors */ 25 u8 SUE; /* Spider unique Errors */ 26 u8 INT; /* Interrupt Status */ 27 } bytes; 28}; 29 30/* Spider Command Block (SCB) */ 31struct wd719x_scb { 32 __le32 Int_SCB; /* 00-03 Internal SCB link pointer (must be cleared) */ 33 u8 SCB_opcode; /* 04 SCB Command opcode */ 34 u8 CDB_tag; /* 05 SCSI Tag byte for CDB queues (0 if untagged) */ 35 u8 lun; /* 06 SCSI LUN */ 36 u8 devid; /* 07 SCSI Device ID */ 37 u8 CDB[16]; /* 08-23 SCSI CDB (16 bytes as defined by ANSI spec. */ 38 __le32 data_p; /* 24-27 Data transfer address (or SG list address) */ 39 __le32 data_length; /* 28-31 Data transfer Length (or SG list length) */ 40 __le32 CDB_link; /* 32-35 SCSI CDB Link Ptr */ 41 __le32 sense_buf; /* 36-39 Auto request sense buffer address */ 42 u8 sense_buf_length;/* 40 Auto request sense transfer length */ 43 u8 reserved; /* 41 reserved */ 44 u8 SCB_options; /* 42 SCB-options */ 45 u8 SCB_tag_msg; /* 43 Tagged messages options */ 46 /* Not filled in by host */ 47 __le32 req_ptr; /* 44-47 Ptr to Host Request returned on interrupt */ 48 u8 host_opcode; /* 48 Host Command Opcode (same as AMR_00) */ 49 u8 scsi_stat; /* 49 SCSI Status returned */ 50 u8 ret_error; /* 50 SPIDER Unique Error Code returned (SUE) */ 51 u8 int_stat; /* 51 Message u8 / Interrupt Status byte returned */ 52 __le32 transferred; /* 52-55 Bytes Transferred */ 53 u8 last_trans[3]; /* 56-58 Bytes Transferred in last session */ 54 u8 length; /* 59 SCSI Messages Length (1-8) */ 55 u8 sync_offset; /* 60 Synchronous offset */ 56 u8 sync_rate; /* 61 Synchronous rate */ 57 u8 flags[2]; /* 62-63 SCB specific flags (local to each thread) */ 58 /* everything below is for driver use (not used by card) */ 59 dma_addr_t phys; /* bus address of the SCB */ 60 struct scsi_cmnd *cmd; /* a copy of the pointer we were passed */ 61 struct list_head list; 62 struct wd719x_sglist sg_list[WD719X_SG] __aligned(8); /* SG list */ 63} __packed; 64 65struct wd719x { 66 struct Scsi_Host *sh; /* pointer to host structure */ 67 struct pci_dev *pdev; 68 void __iomem *base; 69 enum wd719x_card_type type; /* type of card */ 70 void *fw_virt; /* firmware buffer CPU address */ 71 dma_addr_t fw_phys; /* firmware buffer bus address */ 72 size_t fw_size; /* firmware buffer size */ 73 struct wd719x_host_param *params; /* host parameters (EEPROM) */ 74 dma_addr_t params_phys; /* host parameters bus address */ 75 void *hash_virt; /* hash table CPU address */ 76 dma_addr_t hash_phys; /* hash table bus address */ 77 struct list_head active_scbs; 78 struct list_head free_scbs; 79}; 80 81/* timeout delays in microsecs */ 82#define WD719X_WAIT_FOR_CMD_READY 500 83#define WD719X_WAIT_FOR_RISC 2000 84#define WD719X_WAIT_FOR_SCSI_RESET 3000000 85 86/* All commands except 0x00 generate an interrupt */ 87#define WD719X_CMD_READY 0x00 /* Command register ready (or noop) */ 88#define WD719X_CMD_INIT_RISC 0x01 /* Initialize RISC */ 89/* 0x02 is reserved */ 90#define WD719X_CMD_BUSRESET 0x03 /* Assert SCSI bus reset */ 91#define WD719X_CMD_READ_FIRMVER 0x04 /* Read the Firmware Revision */ 92#define WD719X_CMD_ECHO_BYTES 0x05 /* Echo command bytes (DW) */ 93/* 0x06 is reserved */ 94/* 0x07 is reserved */ 95#define WD719X_CMD_GET_PARAM 0x08 /* Get programmable parameters */ 96#define WD719X_CMD_SET_PARAM 0x09 /* Set programmable parameters */ 97#define WD719X_CMD_SLEEP 0x0a /* Put SPIDER to sleep */ 98#define WD719X_CMD_READ_INIT 0x0b /* Read initialization parameters */ 99#define WD719X_CMD_RESTORE_INIT 0x0c /* Restore initialization parameters */ 100/* 0x0d is reserved */ 101/* 0x0e is reserved */ 102/* 0x0f is reserved */ 103#define WD719X_CMD_ABORT_TAG 0x10 /* Send Abort tag message to target */ 104#define WD719X_CMD_ABORT 0x11 /* Send Abort message to target */ 105#define WD719X_CMD_RESET 0x12 /* Send Reset message to target */ 106#define WD719X_CMD_INIT_SCAM 0x13 /* Initiate SCAM */ 107#define WD719X_CMD_GET_SYNC 0x14 /* Get synchronous rates */ 108#define WD719X_CMD_SET_SYNC 0x15 /* Set synchronous rates */ 109#define WD719X_CMD_GET_WIDTH 0x16 /* Get SCSI bus width */ 110#define WD719X_CMD_SET_WIDTH 0x17 /* Set SCSI bus width */ 111#define WD719X_CMD_GET_TAGS 0x18 /* Get tag flags */ 112#define WD719X_CMD_SET_TAGS 0x19 /* Set tag flags */ 113#define WD719X_CMD_GET_PARAM2 0x1a /* Get programmable params (format 2) */ 114#define WD719X_CMD_SET_PARAM2 0x1b /* Set programmable params (format 2) */ 115/* Commands with request pointers (mailbox) */ 116#define WD719X_CMD_PROCESS_SCB 0x80 /* Process SCSI Control Block (SCB) */ 117/* No interrupt generated on acceptance of SCB pointer */ 118 119/* interrupt status defines */ 120#define WD719X_INT_NONE 0x00 /* No interrupt pending */ 121#define WD719X_INT_NOERRORS 0x01 /* Command completed with no errors */ 122#define WD719X_INT_LINKNOERRORS 0x02 /* link cmd completed with no errors */ 123#define WD719X_INT_LINKNOSTATUS 0x03 /* link cmd completed with no flag set */ 124#define WD719X_INT_ERRORSLOGGED 0x04 /* cmd completed with errors logged */ 125#define WD719X_INT_SPIDERFAILED 0x05 /* cmd failed without valid SCSI status */ 126#define WD719X_INT_BADINT 0x80 /* unsolicited interrupt */ 127#define WD719X_INT_PIOREADY 0xf0 /* data ready for PIO output */ 128 129/* Spider Unique Error Codes (SUE) */ 130#define WD719X_SUE_NOERRORS 0x00 /* No errors detected by SPIDER */ 131#define WD719X_SUE_REJECTED 0x01 /* Command Rejected (bad opcode/param) */ 132#define WD719X_SUE_SCBQFULL 0x02 /* SCB queue full */ 133/* 0x03 is reserved */ 134#define WD719X_SUE_TERM 0x04 /* Host terminated SCB via primative cmd */ 135#define WD719X_SUE_CHAN1PAR 0x05 /* PCI Channel 1 parity error occurred */ 136#define WD719X_SUE_CHAN1ABORT 0x06 /* PCI Channel 1 system abort occurred */ 137#define WD719X_SUE_CHAN23PAR 0x07 /* PCI Channel 2/3 parity error occurred */ 138#define WD719X_SUE_CHAN23ABORT 0x08 /* PCI Channel 2/3 system abort occurred */ 139#define WD719X_SUE_TIMEOUT 0x10 /* Selection/reselection timeout */ 140#define WD719X_SUE_RESET 0x11 /* SCSI bus reset occurred */ 141#define WD719X_SUE_BUSERROR 0x12 /* SCSI bus error */ 142#define WD719X_SUE_WRONGWAY 0x13 /* Wrong data transfer dir set by target */ 143#define WD719X_SUE_BADPHASE 0x14 /* SCSI phase illegal or unexpected */ 144#define WD719X_SUE_TOOLONG 0x15 /* target requested too much data */ 145#define WD719X_SUE_BUSFREE 0x16 /* Unexpected SCSI bus free */ 146#define WD719X_SUE_ARSDONE 0x17 /* Auto request sense executed */ 147#define WD719X_SUE_IGNORED 0x18 /* SCSI message was ignored by target */ 148#define WD719X_SUE_WRONGTAGS 0x19 /* Tagged SCB & tags off (or vice versa) */ 149#define WD719X_SUE_BADTAGS 0x1a /* Wrong tag message type for target */ 150#define WD719X_SUE_NOSCAMID 0x1b /* No SCAM soft ID available */ 151 152/* code sizes */ 153#define WD719X_HASH_TABLE_SIZE 4096 154 155/* Advanced Mode Registers */ 156/* Regs 0x00..0x1f are for Advanced Mode of the card (RISC is running). */ 157#define WD719X_AMR_COMMAND 0x00 158#define WD719X_AMR_CMD_PARAM 0x01 159#define WD719X_AMR_CMD_PARAM_2 0x02 160#define WD719X_AMR_CMD_PARAM_3 0x03 161#define WD719X_AMR_SCB_IN 0x04 162 163#define WD719X_AMR_BIOS_SHARE_INT 0x0f 164 165#define WD719X_AMR_SCB_OUT 0x18 166#define WD719X_AMR_OP_CODE 0x1c 167#define WD719X_AMR_SCSI_STATUS 0x1d 168#define WD719X_AMR_SCB_ERROR 0x1e 169#define WD719X_AMR_INT_STATUS 0x1f 170 171#define WD719X_DISABLE_INT 0x80 172 173/* SCB flags */ 174#define WD719X_SCB_FLAGS_CHECK_DIRECTION 0x01 175#define WD719X_SCB_FLAGS_PCI_TO_SCSI 0x02 176#define WD719X_SCB_FLAGS_AUTO_REQUEST_SENSE 0x10 177#define WD719X_SCB_FLAGS_DO_SCATTER_GATHER 0x20 178#define WD719X_SCB_FLAGS_NO_DISCONNECT 0x40 179 180/* PCI Registers used for reset, initial code download */ 181/* Regs 0x20..0x3f are for Normal (DOS) mode (RISC is asleep). */ 182#define WD719X_PCI_GPIO_CONTROL 0x3C 183#define WD719X_PCI_GPIO_DATA 0x3D 184#define WD719X_PCI_PORT_RESET 0x3E 185#define WD719X_PCI_MODE_SELECT 0x3F 186 187#define WD719X_PCI_EXTERNAL_ADDR 0x60 188#define WD719X_PCI_INTERNAL_ADDR 0x64 189#define WD719X_PCI_DMA_TRANSFER_SIZE 0x66 190#define WD719X_PCI_CHANNEL2_3CMD 0x68 191#define WD719X_PCI_CHANNEL2_3STATUS 0x69 192 193#define WD719X_GPIO_ID_BITS 0x0a 194#define WD719X_PRAM_BASE_ADDR 0x00 195 196/* codes written to or read from the card */ 197#define WD719X_PCI_RESET 0x01 198#define WD719X_ENABLE_ADVANCE_MODE 0x01 199 200#define WD719X_START_CHANNEL2_3DMA 0x17 201#define WD719X_START_CHANNEL2_3DONE 0x01 202#define WD719X_START_CHANNEL2_3ABORT 0x20 203 204/* 33C296 GPIO bits for EEPROM pins */ 205#define WD719X_EE_DI (1 << 1) 206#define WD719X_EE_CS (1 << 2) 207#define WD719X_EE_CLK (1 << 3) 208#define WD719X_EE_DO (1 << 4) 209 210/* EEPROM contents */ 211struct wd719x_eeprom_header { 212 u8 sig1; 213 u8 sig2; 214 u8 version; 215 u8 checksum; 216 u8 cfg_offset; 217 u8 cfg_size; 218 u8 setup_offset; 219 u8 setup_size; 220} __packed; 221 222#define WD719X_EE_SIG1 0 223#define WD719X_EE_SIG2 1 224#define WD719X_EE_VERSION 2 225#define WD719X_EE_CHECKSUM 3 226#define WD719X_EE_CFG_OFFSET 4 227#define WD719X_EE_CFG_SIZE 5 228#define WD719X_EE_SETUP_OFFSET 6 229#define WD719X_EE_SETUP_SIZE 7 230 231#define WD719X_EE_SCSI_ID_MASK 0xf 232 233/* SPIDER Host Parameters Block (=EEPROM configuration block) */ 234struct wd719x_host_param { 235 u8 ch_1_th; /* FIFO threshold */ 236 u8 scsi_conf; /* SCSI configuration */ 237 u8 own_scsi_id; /* controller SCSI ID */ 238 u8 sel_timeout; /* selection timeout*/ 239 u8 sleep_timer; /* seep timer */ 240 __le16 cdb_size;/* CDB size groups */ 241 __le16 tag_en; /* Tag msg enables (ID 0-15) */ 242 u8 scsi_pad; /* SCSI pad control */ 243 __le32 wide; /* WIDE msg options (ID 0-15) */ 244 __le32 sync; /* SYNC msg options (ID 0-15) */ 245 u8 soft_mask; /* soft error mask */ 246 u8 unsol_mask; /* unsolicited error mask */ 247} __packed; 248 249#endif /* _WD719X_H_ */ 250