1/* 2 * An SPI driver for the Philips PCF2123 RTC 3 * Copyright 2009 Cyber Switching, Inc. 4 * 5 * Author: Chris Verges <chrisv@cyberswitching.com> 6 * Maintainers: http://www.cyberswitching.com 7 * 8 * based on the RS5C348 driver in this same directory. 9 * 10 * Thanks to Christian Pellegrin <chripell@fsfe.org> for 11 * the sysfs contributions to this driver. 12 * 13 * This program is free software; you can redistribute it and/or modify 14 * it under the terms of the GNU General Public License version 2 as 15 * published by the Free Software Foundation. 16 * 17 * Please note that the CS is active high, so platform data 18 * should look something like: 19 * 20 * static struct spi_board_info ek_spi_devices[] = { 21 * ... 22 * { 23 * .modalias = "rtc-pcf2123", 24 * .chip_select = 1, 25 * .controller_data = (void *)AT91_PIN_PA10, 26 * .max_speed_hz = 1000 * 1000, 27 * .mode = SPI_CS_HIGH, 28 * .bus_num = 0, 29 * }, 30 * ... 31 *}; 32 * 33 */ 34 35#include <linux/bcd.h> 36#include <linux/delay.h> 37#include <linux/device.h> 38#include <linux/errno.h> 39#include <linux/init.h> 40#include <linux/kernel.h> 41#include <linux/of.h> 42#include <linux/string.h> 43#include <linux/slab.h> 44#include <linux/rtc.h> 45#include <linux/spi/spi.h> 46#include <linux/module.h> 47#include <linux/sysfs.h> 48 49#define DRV_VERSION "0.6" 50 51#define PCF2123_REG_CTRL1 (0x00) /* Control Register 1 */ 52#define PCF2123_REG_CTRL2 (0x01) /* Control Register 2 */ 53#define PCF2123_REG_SC (0x02) /* datetime */ 54#define PCF2123_REG_MN (0x03) 55#define PCF2123_REG_HR (0x04) 56#define PCF2123_REG_DM (0x05) 57#define PCF2123_REG_DW (0x06) 58#define PCF2123_REG_MO (0x07) 59#define PCF2123_REG_YR (0x08) 60 61#define PCF2123_SUBADDR (1 << 4) 62#define PCF2123_WRITE ((0 << 7) | PCF2123_SUBADDR) 63#define PCF2123_READ ((1 << 7) | PCF2123_SUBADDR) 64 65static struct spi_driver pcf2123_driver; 66 67struct pcf2123_sysfs_reg { 68 struct device_attribute attr; 69 char name[2]; 70}; 71 72struct pcf2123_plat_data { 73 struct rtc_device *rtc; 74 struct pcf2123_sysfs_reg regs[16]; 75}; 76 77/* 78 * Causes a 30 nanosecond delay to ensure that the PCF2123 chip select 79 * is released properly after an SPI write. This function should be 80 * called after EVERY read/write call over SPI. 81 */ 82static inline void pcf2123_delay_trec(void) 83{ 84 ndelay(30); 85} 86 87static ssize_t pcf2123_show(struct device *dev, struct device_attribute *attr, 88 char *buffer) 89{ 90 struct spi_device *spi = to_spi_device(dev); 91 struct pcf2123_sysfs_reg *r; 92 u8 txbuf[1], rxbuf[1]; 93 unsigned long reg; 94 int ret; 95 96 r = container_of(attr, struct pcf2123_sysfs_reg, attr); 97 98 ret = kstrtoul(r->name, 16, ®); 99 if (ret) 100 return ret; 101 102 txbuf[0] = PCF2123_READ | reg; 103 ret = spi_write_then_read(spi, txbuf, 1, rxbuf, 1); 104 if (ret < 0) 105 return -EIO; 106 pcf2123_delay_trec(); 107 return sprintf(buffer, "0x%x\n", rxbuf[0]); 108} 109 110static ssize_t pcf2123_store(struct device *dev, struct device_attribute *attr, 111 const char *buffer, size_t count) { 112 struct spi_device *spi = to_spi_device(dev); 113 struct pcf2123_sysfs_reg *r; 114 u8 txbuf[2]; 115 unsigned long reg; 116 unsigned long val; 117 118 int ret; 119 120 r = container_of(attr, struct pcf2123_sysfs_reg, attr); 121 122 ret = kstrtoul(r->name, 16, ®); 123 if (ret) 124 return ret; 125 126 ret = kstrtoul(buffer, 10, &val); 127 if (ret) 128 return ret; 129 130 txbuf[0] = PCF2123_WRITE | reg; 131 txbuf[1] = val; 132 ret = spi_write(spi, txbuf, sizeof(txbuf)); 133 if (ret < 0) 134 return -EIO; 135 pcf2123_delay_trec(); 136 return count; 137} 138 139static int pcf2123_rtc_read_time(struct device *dev, struct rtc_time *tm) 140{ 141 struct spi_device *spi = to_spi_device(dev); 142 u8 txbuf[1], rxbuf[7]; 143 int ret; 144 145 txbuf[0] = PCF2123_READ | PCF2123_REG_SC; 146 ret = spi_write_then_read(spi, txbuf, sizeof(txbuf), 147 rxbuf, sizeof(rxbuf)); 148 if (ret < 0) 149 return ret; 150 pcf2123_delay_trec(); 151 152 tm->tm_sec = bcd2bin(rxbuf[0] & 0x7F); 153 tm->tm_min = bcd2bin(rxbuf[1] & 0x7F); 154 tm->tm_hour = bcd2bin(rxbuf[2] & 0x3F); /* rtc hr 0-23 */ 155 tm->tm_mday = bcd2bin(rxbuf[3] & 0x3F); 156 tm->tm_wday = rxbuf[4] & 0x07; 157 tm->tm_mon = bcd2bin(rxbuf[5] & 0x1F) - 1; /* rtc mn 1-12 */ 158 tm->tm_year = bcd2bin(rxbuf[6]); 159 if (tm->tm_year < 70) 160 tm->tm_year += 100; /* assume we are in 1970...2069 */ 161 162 dev_dbg(dev, "%s: tm is secs=%d, mins=%d, hours=%d, " 163 "mday=%d, mon=%d, year=%d, wday=%d\n", 164 __func__, 165 tm->tm_sec, tm->tm_min, tm->tm_hour, 166 tm->tm_mday, tm->tm_mon, tm->tm_year, tm->tm_wday); 167 168 /* the clock can give out invalid datetime, but we cannot return 169 * -EINVAL otherwise hwclock will refuse to set the time on bootup. 170 */ 171 if (rtc_valid_tm(tm) < 0) 172 dev_err(dev, "retrieved date/time is not valid.\n"); 173 174 return 0; 175} 176 177static int pcf2123_rtc_set_time(struct device *dev, struct rtc_time *tm) 178{ 179 struct spi_device *spi = to_spi_device(dev); 180 u8 txbuf[8]; 181 int ret; 182 183 dev_dbg(dev, "%s: tm is secs=%d, mins=%d, hours=%d, " 184 "mday=%d, mon=%d, year=%d, wday=%d\n", 185 __func__, 186 tm->tm_sec, tm->tm_min, tm->tm_hour, 187 tm->tm_mday, tm->tm_mon, tm->tm_year, tm->tm_wday); 188 189 /* Stop the counter first */ 190 txbuf[0] = PCF2123_WRITE | PCF2123_REG_CTRL1; 191 txbuf[1] = 0x20; 192 ret = spi_write(spi, txbuf, 2); 193 if (ret < 0) 194 return ret; 195 pcf2123_delay_trec(); 196 197 /* Set the new time */ 198 txbuf[0] = PCF2123_WRITE | PCF2123_REG_SC; 199 txbuf[1] = bin2bcd(tm->tm_sec & 0x7F); 200 txbuf[2] = bin2bcd(tm->tm_min & 0x7F); 201 txbuf[3] = bin2bcd(tm->tm_hour & 0x3F); 202 txbuf[4] = bin2bcd(tm->tm_mday & 0x3F); 203 txbuf[5] = tm->tm_wday & 0x07; 204 txbuf[6] = bin2bcd((tm->tm_mon + 1) & 0x1F); /* rtc mn 1-12 */ 205 txbuf[7] = bin2bcd(tm->tm_year < 100 ? tm->tm_year : tm->tm_year - 100); 206 207 ret = spi_write(spi, txbuf, sizeof(txbuf)); 208 if (ret < 0) 209 return ret; 210 pcf2123_delay_trec(); 211 212 /* Start the counter */ 213 txbuf[0] = PCF2123_WRITE | PCF2123_REG_CTRL1; 214 txbuf[1] = 0x00; 215 ret = spi_write(spi, txbuf, 2); 216 if (ret < 0) 217 return ret; 218 pcf2123_delay_trec(); 219 220 return 0; 221} 222 223static const struct rtc_class_ops pcf2123_rtc_ops = { 224 .read_time = pcf2123_rtc_read_time, 225 .set_time = pcf2123_rtc_set_time, 226}; 227 228static int pcf2123_probe(struct spi_device *spi) 229{ 230 struct rtc_device *rtc; 231 struct pcf2123_plat_data *pdata; 232 u8 txbuf[2], rxbuf[2]; 233 int ret, i; 234 235 pdata = devm_kzalloc(&spi->dev, sizeof(struct pcf2123_plat_data), 236 GFP_KERNEL); 237 if (!pdata) 238 return -ENOMEM; 239 spi->dev.platform_data = pdata; 240 241 /* Send a software reset command */ 242 txbuf[0] = PCF2123_WRITE | PCF2123_REG_CTRL1; 243 txbuf[1] = 0x58; 244 dev_dbg(&spi->dev, "resetting RTC (0x%02X 0x%02X)\n", 245 txbuf[0], txbuf[1]); 246 ret = spi_write(spi, txbuf, 2 * sizeof(u8)); 247 if (ret < 0) 248 goto kfree_exit; 249 pcf2123_delay_trec(); 250 251 /* Stop the counter */ 252 txbuf[0] = PCF2123_WRITE | PCF2123_REG_CTRL1; 253 txbuf[1] = 0x20; 254 dev_dbg(&spi->dev, "stopping RTC (0x%02X 0x%02X)\n", 255 txbuf[0], txbuf[1]); 256 ret = spi_write(spi, txbuf, 2 * sizeof(u8)); 257 if (ret < 0) 258 goto kfree_exit; 259 pcf2123_delay_trec(); 260 261 /* See if the counter was actually stopped */ 262 txbuf[0] = PCF2123_READ | PCF2123_REG_CTRL1; 263 dev_dbg(&spi->dev, "checking for presence of RTC (0x%02X)\n", 264 txbuf[0]); 265 ret = spi_write_then_read(spi, txbuf, 1 * sizeof(u8), 266 rxbuf, 2 * sizeof(u8)); 267 dev_dbg(&spi->dev, "received data from RTC (0x%02X 0x%02X)\n", 268 rxbuf[0], rxbuf[1]); 269 if (ret < 0) 270 goto kfree_exit; 271 pcf2123_delay_trec(); 272 273 if (!(rxbuf[0] & 0x20)) { 274 dev_err(&spi->dev, "chip not found\n"); 275 ret = -ENODEV; 276 goto kfree_exit; 277 } 278 279 dev_info(&spi->dev, "chip found, driver version " DRV_VERSION "\n"); 280 dev_info(&spi->dev, "spiclk %u KHz.\n", 281 (spi->max_speed_hz + 500) / 1000); 282 283 /* Start the counter */ 284 txbuf[0] = PCF2123_WRITE | PCF2123_REG_CTRL1; 285 txbuf[1] = 0x00; 286 ret = spi_write(spi, txbuf, sizeof(txbuf)); 287 if (ret < 0) 288 goto kfree_exit; 289 pcf2123_delay_trec(); 290 291 /* Finalize the initialization */ 292 rtc = devm_rtc_device_register(&spi->dev, pcf2123_driver.driver.name, 293 &pcf2123_rtc_ops, THIS_MODULE); 294 295 if (IS_ERR(rtc)) { 296 dev_err(&spi->dev, "failed to register.\n"); 297 ret = PTR_ERR(rtc); 298 goto kfree_exit; 299 } 300 301 pdata->rtc = rtc; 302 303 for (i = 0; i < 16; i++) { 304 sysfs_attr_init(&pdata->regs[i].attr.attr); 305 sprintf(pdata->regs[i].name, "%1x", i); 306 pdata->regs[i].attr.attr.mode = S_IRUGO | S_IWUSR; 307 pdata->regs[i].attr.attr.name = pdata->regs[i].name; 308 pdata->regs[i].attr.show = pcf2123_show; 309 pdata->regs[i].attr.store = pcf2123_store; 310 ret = device_create_file(&spi->dev, &pdata->regs[i].attr); 311 if (ret) { 312 dev_err(&spi->dev, "Unable to create sysfs %s\n", 313 pdata->regs[i].name); 314 goto sysfs_exit; 315 } 316 } 317 318 return 0; 319 320sysfs_exit: 321 for (i--; i >= 0; i--) 322 device_remove_file(&spi->dev, &pdata->regs[i].attr); 323 324kfree_exit: 325 spi->dev.platform_data = NULL; 326 return ret; 327} 328 329static int pcf2123_remove(struct spi_device *spi) 330{ 331 struct pcf2123_plat_data *pdata = dev_get_platdata(&spi->dev); 332 int i; 333 334 if (pdata) { 335 for (i = 0; i < 16; i++) 336 if (pdata->regs[i].name[0]) 337 device_remove_file(&spi->dev, 338 &pdata->regs[i].attr); 339 } 340 341 return 0; 342} 343 344#ifdef CONFIG_OF 345static const struct of_device_id pcf2123_dt_ids[] = { 346 { .compatible = "nxp,rtc-pcf2123", }, 347 { /* sentinel */ } 348}; 349MODULE_DEVICE_TABLE(of, pcf2123_dt_ids); 350#endif 351 352static struct spi_driver pcf2123_driver = { 353 .driver = { 354 .name = "rtc-pcf2123", 355 .owner = THIS_MODULE, 356 .of_match_table = of_match_ptr(pcf2123_dt_ids), 357 }, 358 .probe = pcf2123_probe, 359 .remove = pcf2123_remove, 360}; 361 362module_spi_driver(pcf2123_driver); 363 364MODULE_AUTHOR("Chris Verges <chrisv@cyberswitching.com>"); 365MODULE_DESCRIPTION("NXP PCF2123 RTC driver"); 366MODULE_LICENSE("GPL"); 367MODULE_VERSION(DRV_VERSION); 368