1/* 2 * SuperH Pin Function Controller pinmux support. 3 * 4 * Copyright (C) 2012 Paul Mundt 5 * 6 * This file is subject to the terms and conditions of the GNU General Public 7 * License. See the file "COPYING" in the main directory of this archive 8 * for more details. 9 */ 10 11#define DRV_NAME "sh-pfc" 12 13#include <linux/device.h> 14#include <linux/err.h> 15#include <linux/init.h> 16#include <linux/module.h> 17#include <linux/of.h> 18#include <linux/pinctrl/consumer.h> 19#include <linux/pinctrl/machine.h> 20#include <linux/pinctrl/pinconf.h> 21#include <linux/pinctrl/pinconf-generic.h> 22#include <linux/pinctrl/pinctrl.h> 23#include <linux/pinctrl/pinmux.h> 24#include <linux/slab.h> 25#include <linux/spinlock.h> 26 27#include "core.h" 28#include "../core.h" 29#include "../pinconf.h" 30 31struct sh_pfc_pin_config { 32 u32 type; 33}; 34 35struct sh_pfc_pinctrl { 36 struct pinctrl_dev *pctl; 37 struct pinctrl_desc pctl_desc; 38 39 struct sh_pfc *pfc; 40 41 struct pinctrl_pin_desc *pins; 42 struct sh_pfc_pin_config *configs; 43}; 44 45static int sh_pfc_get_groups_count(struct pinctrl_dev *pctldev) 46{ 47 struct sh_pfc_pinctrl *pmx = pinctrl_dev_get_drvdata(pctldev); 48 49 return pmx->pfc->info->nr_groups; 50} 51 52static const char *sh_pfc_get_group_name(struct pinctrl_dev *pctldev, 53 unsigned selector) 54{ 55 struct sh_pfc_pinctrl *pmx = pinctrl_dev_get_drvdata(pctldev); 56 57 return pmx->pfc->info->groups[selector].name; 58} 59 60static int sh_pfc_get_group_pins(struct pinctrl_dev *pctldev, unsigned selector, 61 const unsigned **pins, unsigned *num_pins) 62{ 63 struct sh_pfc_pinctrl *pmx = pinctrl_dev_get_drvdata(pctldev); 64 65 *pins = pmx->pfc->info->groups[selector].pins; 66 *num_pins = pmx->pfc->info->groups[selector].nr_pins; 67 68 return 0; 69} 70 71static void sh_pfc_pin_dbg_show(struct pinctrl_dev *pctldev, struct seq_file *s, 72 unsigned offset) 73{ 74 seq_printf(s, "%s", DRV_NAME); 75} 76 77#ifdef CONFIG_OF 78static int sh_pfc_map_add_config(struct pinctrl_map *map, 79 const char *group_or_pin, 80 enum pinctrl_map_type type, 81 unsigned long *configs, 82 unsigned int num_configs) 83{ 84 unsigned long *cfgs; 85 86 cfgs = kmemdup(configs, num_configs * sizeof(*cfgs), 87 GFP_KERNEL); 88 if (cfgs == NULL) 89 return -ENOMEM; 90 91 map->type = type; 92 map->data.configs.group_or_pin = group_or_pin; 93 map->data.configs.configs = cfgs; 94 map->data.configs.num_configs = num_configs; 95 96 return 0; 97} 98 99static int sh_pfc_dt_subnode_to_map(struct device *dev, struct device_node *np, 100 struct pinctrl_map **map, 101 unsigned int *num_maps, unsigned int *index) 102{ 103 struct pinctrl_map *maps = *map; 104 unsigned int nmaps = *num_maps; 105 unsigned int idx = *index; 106 unsigned int num_configs; 107 const char *function = NULL; 108 unsigned long *configs; 109 struct property *prop; 110 unsigned int num_groups; 111 unsigned int num_pins; 112 const char *group; 113 const char *pin; 114 int ret; 115 116 /* Parse the function and configuration properties. At least a function 117 * or one configuration must be specified. 118 */ 119 ret = of_property_read_string(np, "renesas,function", &function); 120 if (ret < 0 && ret != -EINVAL) { 121 dev_err(dev, "Invalid function in DT\n"); 122 return ret; 123 } 124 125 ret = pinconf_generic_parse_dt_config(np, NULL, &configs, &num_configs); 126 if (ret < 0) 127 return ret; 128 129 if (!function && num_configs == 0) { 130 dev_err(dev, 131 "DT node must contain at least a function or config\n"); 132 goto done; 133 } 134 135 /* Count the number of pins and groups and reallocate mappings. */ 136 ret = of_property_count_strings(np, "renesas,pins"); 137 if (ret == -EINVAL) { 138 num_pins = 0; 139 } else if (ret < 0) { 140 dev_err(dev, "Invalid pins list in DT\n"); 141 goto done; 142 } else { 143 num_pins = ret; 144 } 145 146 ret = of_property_count_strings(np, "renesas,groups"); 147 if (ret == -EINVAL) { 148 num_groups = 0; 149 } else if (ret < 0) { 150 dev_err(dev, "Invalid pin groups list in DT\n"); 151 goto done; 152 } else { 153 num_groups = ret; 154 } 155 156 if (!num_pins && !num_groups) { 157 dev_err(dev, "No pin or group provided in DT node\n"); 158 ret = -ENODEV; 159 goto done; 160 } 161 162 if (function) 163 nmaps += num_groups; 164 if (configs) 165 nmaps += num_pins + num_groups; 166 167 maps = krealloc(maps, sizeof(*maps) * nmaps, GFP_KERNEL); 168 if (maps == NULL) { 169 ret = -ENOMEM; 170 goto done; 171 } 172 173 *map = maps; 174 *num_maps = nmaps; 175 176 /* Iterate over pins and groups and create the mappings. */ 177 of_property_for_each_string(np, "renesas,groups", prop, group) { 178 if (function) { 179 maps[idx].type = PIN_MAP_TYPE_MUX_GROUP; 180 maps[idx].data.mux.group = group; 181 maps[idx].data.mux.function = function; 182 idx++; 183 } 184 185 if (configs) { 186 ret = sh_pfc_map_add_config(&maps[idx], group, 187 PIN_MAP_TYPE_CONFIGS_GROUP, 188 configs, num_configs); 189 if (ret < 0) 190 goto done; 191 192 idx++; 193 } 194 } 195 196 if (!configs) { 197 ret = 0; 198 goto done; 199 } 200 201 of_property_for_each_string(np, "renesas,pins", prop, pin) { 202 ret = sh_pfc_map_add_config(&maps[idx], pin, 203 PIN_MAP_TYPE_CONFIGS_PIN, 204 configs, num_configs); 205 if (ret < 0) 206 goto done; 207 208 idx++; 209 } 210 211done: 212 *index = idx; 213 kfree(configs); 214 return ret; 215} 216 217static void sh_pfc_dt_free_map(struct pinctrl_dev *pctldev, 218 struct pinctrl_map *map, unsigned num_maps) 219{ 220 unsigned int i; 221 222 if (map == NULL) 223 return; 224 225 for (i = 0; i < num_maps; ++i) { 226 if (map[i].type == PIN_MAP_TYPE_CONFIGS_GROUP || 227 map[i].type == PIN_MAP_TYPE_CONFIGS_PIN) 228 kfree(map[i].data.configs.configs); 229 } 230 231 kfree(map); 232} 233 234static int sh_pfc_dt_node_to_map(struct pinctrl_dev *pctldev, 235 struct device_node *np, 236 struct pinctrl_map **map, unsigned *num_maps) 237{ 238 struct sh_pfc_pinctrl *pmx = pinctrl_dev_get_drvdata(pctldev); 239 struct device *dev = pmx->pfc->dev; 240 struct device_node *child; 241 unsigned int index; 242 int ret; 243 244 *map = NULL; 245 *num_maps = 0; 246 index = 0; 247 248 for_each_child_of_node(np, child) { 249 ret = sh_pfc_dt_subnode_to_map(dev, child, map, num_maps, 250 &index); 251 if (ret < 0) 252 goto done; 253 } 254 255 /* If no mapping has been found in child nodes try the config node. */ 256 if (*num_maps == 0) { 257 ret = sh_pfc_dt_subnode_to_map(dev, np, map, num_maps, &index); 258 if (ret < 0) 259 goto done; 260 } 261 262 if (*num_maps) 263 return 0; 264 265 dev_err(dev, "no mapping found in node %s\n", np->full_name); 266 ret = -EINVAL; 267 268done: 269 if (ret < 0) 270 sh_pfc_dt_free_map(pctldev, *map, *num_maps); 271 272 return ret; 273} 274#endif /* CONFIG_OF */ 275 276static const struct pinctrl_ops sh_pfc_pinctrl_ops = { 277 .get_groups_count = sh_pfc_get_groups_count, 278 .get_group_name = sh_pfc_get_group_name, 279 .get_group_pins = sh_pfc_get_group_pins, 280 .pin_dbg_show = sh_pfc_pin_dbg_show, 281#ifdef CONFIG_OF 282 .dt_node_to_map = sh_pfc_dt_node_to_map, 283 .dt_free_map = sh_pfc_dt_free_map, 284#endif 285}; 286 287static int sh_pfc_get_functions_count(struct pinctrl_dev *pctldev) 288{ 289 struct sh_pfc_pinctrl *pmx = pinctrl_dev_get_drvdata(pctldev); 290 291 return pmx->pfc->info->nr_functions; 292} 293 294static const char *sh_pfc_get_function_name(struct pinctrl_dev *pctldev, 295 unsigned selector) 296{ 297 struct sh_pfc_pinctrl *pmx = pinctrl_dev_get_drvdata(pctldev); 298 299 return pmx->pfc->info->functions[selector].name; 300} 301 302static int sh_pfc_get_function_groups(struct pinctrl_dev *pctldev, 303 unsigned selector, 304 const char * const **groups, 305 unsigned * const num_groups) 306{ 307 struct sh_pfc_pinctrl *pmx = pinctrl_dev_get_drvdata(pctldev); 308 309 *groups = pmx->pfc->info->functions[selector].groups; 310 *num_groups = pmx->pfc->info->functions[selector].nr_groups; 311 312 return 0; 313} 314 315static int sh_pfc_func_set_mux(struct pinctrl_dev *pctldev, unsigned selector, 316 unsigned group) 317{ 318 struct sh_pfc_pinctrl *pmx = pinctrl_dev_get_drvdata(pctldev); 319 struct sh_pfc *pfc = pmx->pfc; 320 const struct sh_pfc_pin_group *grp = &pfc->info->groups[group]; 321 unsigned long flags; 322 unsigned int i; 323 int ret = 0; 324 325 spin_lock_irqsave(&pfc->lock, flags); 326 327 for (i = 0; i < grp->nr_pins; ++i) { 328 int idx = sh_pfc_get_pin_index(pfc, grp->pins[i]); 329 struct sh_pfc_pin_config *cfg = &pmx->configs[idx]; 330 331 if (cfg->type != PINMUX_TYPE_NONE) { 332 ret = -EBUSY; 333 goto done; 334 } 335 } 336 337 for (i = 0; i < grp->nr_pins; ++i) { 338 ret = sh_pfc_config_mux(pfc, grp->mux[i], PINMUX_TYPE_FUNCTION); 339 if (ret < 0) 340 break; 341 } 342 343done: 344 spin_unlock_irqrestore(&pfc->lock, flags); 345 return ret; 346} 347 348static int sh_pfc_gpio_request_enable(struct pinctrl_dev *pctldev, 349 struct pinctrl_gpio_range *range, 350 unsigned offset) 351{ 352 struct sh_pfc_pinctrl *pmx = pinctrl_dev_get_drvdata(pctldev); 353 struct sh_pfc *pfc = pmx->pfc; 354 int idx = sh_pfc_get_pin_index(pfc, offset); 355 struct sh_pfc_pin_config *cfg = &pmx->configs[idx]; 356 unsigned long flags; 357 int ret; 358 359 spin_lock_irqsave(&pfc->lock, flags); 360 361 if (cfg->type != PINMUX_TYPE_NONE) { 362 dev_err(pfc->dev, 363 "Pin %u is busy, can't configure it as GPIO.\n", 364 offset); 365 ret = -EBUSY; 366 goto done; 367 } 368 369 if (!pfc->gpio) { 370 /* If GPIOs are handled externally the pin mux type need to be 371 * set to GPIO here. 372 */ 373 const struct sh_pfc_pin *pin = &pfc->info->pins[idx]; 374 375 ret = sh_pfc_config_mux(pfc, pin->enum_id, PINMUX_TYPE_GPIO); 376 if (ret < 0) 377 goto done; 378 } 379 380 cfg->type = PINMUX_TYPE_GPIO; 381 382 ret = 0; 383 384done: 385 spin_unlock_irqrestore(&pfc->lock, flags); 386 387 return ret; 388} 389 390static void sh_pfc_gpio_disable_free(struct pinctrl_dev *pctldev, 391 struct pinctrl_gpio_range *range, 392 unsigned offset) 393{ 394 struct sh_pfc_pinctrl *pmx = pinctrl_dev_get_drvdata(pctldev); 395 struct sh_pfc *pfc = pmx->pfc; 396 int idx = sh_pfc_get_pin_index(pfc, offset); 397 struct sh_pfc_pin_config *cfg = &pmx->configs[idx]; 398 unsigned long flags; 399 400 spin_lock_irqsave(&pfc->lock, flags); 401 cfg->type = PINMUX_TYPE_NONE; 402 spin_unlock_irqrestore(&pfc->lock, flags); 403} 404 405static int sh_pfc_gpio_set_direction(struct pinctrl_dev *pctldev, 406 struct pinctrl_gpio_range *range, 407 unsigned offset, bool input) 408{ 409 struct sh_pfc_pinctrl *pmx = pinctrl_dev_get_drvdata(pctldev); 410 struct sh_pfc *pfc = pmx->pfc; 411 int new_type = input ? PINMUX_TYPE_INPUT : PINMUX_TYPE_OUTPUT; 412 int idx = sh_pfc_get_pin_index(pfc, offset); 413 const struct sh_pfc_pin *pin = &pfc->info->pins[idx]; 414 struct sh_pfc_pin_config *cfg = &pmx->configs[idx]; 415 unsigned long flags; 416 unsigned int dir; 417 int ret; 418 419 /* Check if the requested direction is supported by the pin. Not all SoC 420 * provide pin config data, so perform the check conditionally. 421 */ 422 if (pin->configs) { 423 dir = input ? SH_PFC_PIN_CFG_INPUT : SH_PFC_PIN_CFG_OUTPUT; 424 if (!(pin->configs & dir)) 425 return -EINVAL; 426 } 427 428 spin_lock_irqsave(&pfc->lock, flags); 429 430 ret = sh_pfc_config_mux(pfc, pin->enum_id, new_type); 431 if (ret < 0) 432 goto done; 433 434 cfg->type = new_type; 435 436done: 437 spin_unlock_irqrestore(&pfc->lock, flags); 438 return ret; 439} 440 441static const struct pinmux_ops sh_pfc_pinmux_ops = { 442 .get_functions_count = sh_pfc_get_functions_count, 443 .get_function_name = sh_pfc_get_function_name, 444 .get_function_groups = sh_pfc_get_function_groups, 445 .set_mux = sh_pfc_func_set_mux, 446 .gpio_request_enable = sh_pfc_gpio_request_enable, 447 .gpio_disable_free = sh_pfc_gpio_disable_free, 448 .gpio_set_direction = sh_pfc_gpio_set_direction, 449}; 450 451/* Check whether the requested parameter is supported for a pin. */ 452static bool sh_pfc_pinconf_validate(struct sh_pfc *pfc, unsigned int _pin, 453 enum pin_config_param param) 454{ 455 int idx = sh_pfc_get_pin_index(pfc, _pin); 456 const struct sh_pfc_pin *pin = &pfc->info->pins[idx]; 457 458 switch (param) { 459 case PIN_CONFIG_BIAS_DISABLE: 460 return true; 461 462 case PIN_CONFIG_BIAS_PULL_UP: 463 return pin->configs & SH_PFC_PIN_CFG_PULL_UP; 464 465 case PIN_CONFIG_BIAS_PULL_DOWN: 466 return pin->configs & SH_PFC_PIN_CFG_PULL_DOWN; 467 468 default: 469 return false; 470 } 471} 472 473static int sh_pfc_pinconf_get(struct pinctrl_dev *pctldev, unsigned _pin, 474 unsigned long *config) 475{ 476 struct sh_pfc_pinctrl *pmx = pinctrl_dev_get_drvdata(pctldev); 477 struct sh_pfc *pfc = pmx->pfc; 478 enum pin_config_param param = pinconf_to_config_param(*config); 479 unsigned long flags; 480 unsigned int bias; 481 482 if (!sh_pfc_pinconf_validate(pfc, _pin, param)) 483 return -ENOTSUPP; 484 485 switch (param) { 486 case PIN_CONFIG_BIAS_DISABLE: 487 case PIN_CONFIG_BIAS_PULL_UP: 488 case PIN_CONFIG_BIAS_PULL_DOWN: 489 if (!pfc->info->ops || !pfc->info->ops->get_bias) 490 return -ENOTSUPP; 491 492 spin_lock_irqsave(&pfc->lock, flags); 493 bias = pfc->info->ops->get_bias(pfc, _pin); 494 spin_unlock_irqrestore(&pfc->lock, flags); 495 496 if (bias != param) 497 return -EINVAL; 498 499 *config = 0; 500 break; 501 502 default: 503 return -ENOTSUPP; 504 } 505 506 return 0; 507} 508 509static int sh_pfc_pinconf_set(struct pinctrl_dev *pctldev, unsigned _pin, 510 unsigned long *configs, unsigned num_configs) 511{ 512 struct sh_pfc_pinctrl *pmx = pinctrl_dev_get_drvdata(pctldev); 513 struct sh_pfc *pfc = pmx->pfc; 514 enum pin_config_param param; 515 unsigned long flags; 516 unsigned int i; 517 518 for (i = 0; i < num_configs; i++) { 519 param = pinconf_to_config_param(configs[i]); 520 521 if (!sh_pfc_pinconf_validate(pfc, _pin, param)) 522 return -ENOTSUPP; 523 524 switch (param) { 525 case PIN_CONFIG_BIAS_PULL_UP: 526 case PIN_CONFIG_BIAS_PULL_DOWN: 527 case PIN_CONFIG_BIAS_DISABLE: 528 if (!pfc->info->ops || !pfc->info->ops->set_bias) 529 return -ENOTSUPP; 530 531 spin_lock_irqsave(&pfc->lock, flags); 532 pfc->info->ops->set_bias(pfc, _pin, param); 533 spin_unlock_irqrestore(&pfc->lock, flags); 534 535 break; 536 537 default: 538 return -ENOTSUPP; 539 } 540 } /* for each config */ 541 542 return 0; 543} 544 545static int sh_pfc_pinconf_group_set(struct pinctrl_dev *pctldev, unsigned group, 546 unsigned long *configs, 547 unsigned num_configs) 548{ 549 struct sh_pfc_pinctrl *pmx = pinctrl_dev_get_drvdata(pctldev); 550 const unsigned int *pins; 551 unsigned int num_pins; 552 unsigned int i; 553 554 pins = pmx->pfc->info->groups[group].pins; 555 num_pins = pmx->pfc->info->groups[group].nr_pins; 556 557 for (i = 0; i < num_pins; ++i) 558 sh_pfc_pinconf_set(pctldev, pins[i], configs, num_configs); 559 560 return 0; 561} 562 563static const struct pinconf_ops sh_pfc_pinconf_ops = { 564 .is_generic = true, 565 .pin_config_get = sh_pfc_pinconf_get, 566 .pin_config_set = sh_pfc_pinconf_set, 567 .pin_config_group_set = sh_pfc_pinconf_group_set, 568 .pin_config_config_dbg_show = pinconf_generic_dump_config, 569}; 570 571/* PFC ranges -> pinctrl pin descs */ 572static int sh_pfc_map_pins(struct sh_pfc *pfc, struct sh_pfc_pinctrl *pmx) 573{ 574 unsigned int i; 575 576 /* Allocate and initialize the pins and configs arrays. */ 577 pmx->pins = devm_kzalloc(pfc->dev, 578 sizeof(*pmx->pins) * pfc->info->nr_pins, 579 GFP_KERNEL); 580 if (unlikely(!pmx->pins)) 581 return -ENOMEM; 582 583 pmx->configs = devm_kzalloc(pfc->dev, 584 sizeof(*pmx->configs) * pfc->info->nr_pins, 585 GFP_KERNEL); 586 if (unlikely(!pmx->configs)) 587 return -ENOMEM; 588 589 for (i = 0; i < pfc->info->nr_pins; ++i) { 590 const struct sh_pfc_pin *info = &pfc->info->pins[i]; 591 struct sh_pfc_pin_config *cfg = &pmx->configs[i]; 592 struct pinctrl_pin_desc *pin = &pmx->pins[i]; 593 594 /* If the pin number is equal to -1 all pins are considered */ 595 pin->number = info->pin != (u16)-1 ? info->pin : i; 596 pin->name = info->name; 597 cfg->type = PINMUX_TYPE_NONE; 598 } 599 600 return 0; 601} 602 603int sh_pfc_register_pinctrl(struct sh_pfc *pfc) 604{ 605 struct sh_pfc_pinctrl *pmx; 606 int ret; 607 608 pmx = devm_kzalloc(pfc->dev, sizeof(*pmx), GFP_KERNEL); 609 if (unlikely(!pmx)) 610 return -ENOMEM; 611 612 pmx->pfc = pfc; 613 pfc->pinctrl = pmx; 614 615 ret = sh_pfc_map_pins(pfc, pmx); 616 if (ret < 0) 617 return ret; 618 619 pmx->pctl_desc.name = DRV_NAME; 620 pmx->pctl_desc.owner = THIS_MODULE; 621 pmx->pctl_desc.pctlops = &sh_pfc_pinctrl_ops; 622 pmx->pctl_desc.pmxops = &sh_pfc_pinmux_ops; 623 pmx->pctl_desc.confops = &sh_pfc_pinconf_ops; 624 pmx->pctl_desc.pins = pmx->pins; 625 pmx->pctl_desc.npins = pfc->info->nr_pins; 626 627 pmx->pctl = pinctrl_register(&pmx->pctl_desc, pfc->dev, pmx); 628 if (pmx->pctl == NULL) 629 return -EINVAL; 630 631 return 0; 632} 633 634int sh_pfc_unregister_pinctrl(struct sh_pfc *pfc) 635{ 636 struct sh_pfc_pinctrl *pmx = pfc->pinctrl; 637 638 pinctrl_unregister(pmx->pctl); 639 640 pfc->pinctrl = NULL; 641 return 0; 642} 643