1/*
2 * Copyright (c) 2014 MediaTek Inc.
3 * Author: Hongzhou.Yang <hongzhou.yang@mediatek.com>
4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License version 2 as
7 * published by the Free Software Foundation.
8 *
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
12 * GNU General Public License for more details.
13 */
14
15#ifndef __PINCTRL_MTK_COMMON_H
16#define __PINCTRL_MTK_COMMON_H
17
18#include <linux/pinctrl/pinctrl.h>
19#include <linux/regmap.h>
20
21#define NO_EINT_SUPPORT    255
22#define MTK_CHIP_TYPE_BASE     0
23#define MTK_CHIP_TYPE_PMIC     1
24#define MT_EDGE_SENSITIVE           0
25#define MT_LEVEL_SENSITIVE          1
26#define EINT_DBNC_SET_DBNC_BITS     4
27#define EINT_DBNC_RST_BIT           (0x1 << 1)
28#define EINT_DBNC_SET_EN            (0x1 << 0)
29
30struct mtk_desc_function {
31	const char *name;
32	unsigned char muxval;
33};
34
35struct mtk_desc_eint {
36	unsigned char eintmux;
37	unsigned char eintnum;
38};
39
40struct mtk_desc_pin {
41	struct pinctrl_pin_desc	pin;
42	const char *chip;
43	const struct mtk_desc_eint eint;
44	const struct mtk_desc_function	*functions;
45};
46
47#define MTK_PIN(_pin, _pad, _chip, _eint, ...)		\
48	{							\
49		.pin = _pin,					\
50		.chip = _chip,					\
51		.eint = _eint,					\
52		.functions = (struct mtk_desc_function[]){	\
53			__VA_ARGS__, { } },			\
54	}
55
56#define MTK_EINT_FUNCTION(_eintmux, _eintnum)				\
57	{							\
58		.eintmux = _eintmux,					\
59		.eintnum = _eintnum,					\
60	}
61
62#define MTK_FUNCTION(_val, _name)				\
63	{							\
64		.muxval = _val,					\
65		.name = _name,					\
66	}
67
68#define SET_ADDR(x, y)  (x + (y->devdata->port_align))
69#define CLR_ADDR(x, y)  (x + (y->devdata->port_align << 1))
70
71struct mtk_pinctrl_group {
72	const char	*name;
73	unsigned long	config;
74	unsigned	pin;
75};
76
77/**
78 * struct mtk_drv_group_desc - Provide driving group data.
79 * @max_drv: The maximum current of this group.
80 * @min_drv: The minimum current of this group.
81 * @low_bit: The lowest bit of this group.
82 * @high_bit: The highest bit of this group.
83 * @step: The step current of this group.
84 */
85struct mtk_drv_group_desc {
86	unsigned char min_drv;
87	unsigned char max_drv;
88	unsigned char low_bit;
89	unsigned char high_bit;
90	unsigned char step;
91};
92
93#define MTK_DRV_GRP(_min, _max, _low, _high, _step)	\
94	{	\
95		.min_drv = _min,	\
96		.max_drv = _max,	\
97		.low_bit = _low,	\
98		.high_bit = _high,	\
99		.step = _step,		\
100	}
101
102/**
103 * struct mtk_pin_drv_grp - Provide each pin driving info.
104 * @pin: The pin number.
105 * @offset: The offset of driving register for this pin.
106 * @bit: The bit of driving register for this pin.
107 * @grp: The group for this pin belongs to.
108 */
109struct mtk_pin_drv_grp {
110	unsigned int pin;
111	unsigned int offset;
112	unsigned char bit;
113	unsigned char grp;
114};
115
116#define MTK_PIN_DRV_GRP(_pin, _offset, _bit, _grp)	\
117	{	\
118		.pin = _pin,	\
119		.offset = _offset,	\
120		.bit = _bit,	\
121		.grp = _grp,	\
122	}
123
124struct mtk_eint_offsets {
125	const char *name;
126	unsigned int  stat;
127	unsigned int  ack;
128	unsigned int  mask;
129	unsigned int  mask_set;
130	unsigned int  mask_clr;
131	unsigned int  sens;
132	unsigned int  sens_set;
133	unsigned int  sens_clr;
134	unsigned int  soft;
135	unsigned int  soft_set;
136	unsigned int  soft_clr;
137	unsigned int  pol;
138	unsigned int  pol_set;
139	unsigned int  pol_clr;
140	unsigned int  dom_en;
141	unsigned int  dbnc_ctrl;
142	unsigned int  dbnc_set;
143	unsigned int  dbnc_clr;
144	u8  port_mask;
145	u8  ports;
146};
147
148/**
149 * struct mtk_pinctrl_devdata - Provide HW GPIO related data.
150 * @pins: An array describing all pins the pin controller affects.
151 * @npins: The number of entries in @pins.
152 *
153 * @grp_desc: The driving group info.
154 * @pin_drv_grp: The driving group for all pins.
155 * @spec_pull_set: Each SoC may have special pins for pull up/down setting,
156 *  these pins' pull setting are very different, they have separate pull
157 *  up/down bit, R0 and R1 resistor bit, so they need special pull setting.
158 *  If special setting is success, this should return 0, otherwise it should
159 *  return non-zero value.
160 * @spec_ies_smt_set: Some pins are irregular, their input enable and smt
161 * control register are discontinuous, but they are mapping together. That
162 * means when user set smt, input enable is set at the same time. So they
163 * also need special control. If special control is success, this should
164 * return 0, otherwise return non-zero value.
165 *
166 * @dir_offset: The direction register offset.
167 * @pullen_offset: The pull-up/pull-down enable register offset.
168 * @pinmux_offset: The pinmux register offset.
169 *
170 * @type1_start: Some chips have two base addresses for pull select register,
171 *  that means some pins use the first address and others use the second. This
172 *  member record the start of pin number to use the second address.
173 * @type1_end: The end of pin number to use the second address.
174 *
175 * @port_shf: The shift between two registers.
176 * @port_mask: The mask of register.
177 * @port_align: Provide clear register and set register step.
178 */
179struct mtk_pinctrl_devdata {
180	const struct mtk_desc_pin	*pins;
181	unsigned int				npins;
182	const struct mtk_drv_group_desc	*grp_desc;
183	unsigned int	n_grp_cls;
184	const struct mtk_pin_drv_grp	*pin_drv_grp;
185	unsigned int	n_pin_drv_grps;
186	int (*spec_pull_set)(struct regmap *reg, unsigned int pin,
187			unsigned char align, bool isup, unsigned int arg);
188	int (*spec_ies_smt_set)(struct regmap *reg, unsigned int pin,
189			unsigned char align, int value);
190	unsigned int dir_offset;
191	unsigned int ies_offset;
192	unsigned int smt_offset;
193	unsigned int pullen_offset;
194	unsigned int pullsel_offset;
195	unsigned int drv_offset;
196	unsigned int invser_offset;
197	unsigned int dout_offset;
198	unsigned int din_offset;
199	unsigned int pinmux_offset;
200	unsigned short type1_start;
201	unsigned short type1_end;
202	unsigned char  port_shf;
203	unsigned char  port_mask;
204	unsigned char  port_align;
205	unsigned char	chip_type;
206	struct mtk_eint_offsets eint_offsets;
207	unsigned int	ap_num;
208	unsigned int	db_cnt;
209};
210
211struct mtk_pinctrl {
212	struct regmap	*regmap1;
213	struct regmap	*regmap2;
214	struct device           *dev;
215	struct gpio_chip	*chip;
216	struct mtk_pinctrl_group	*groups;
217	unsigned			ngroups;
218	const char          **grp_names;
219	struct pinctrl_dev      *pctl_dev;
220	const struct mtk_pinctrl_devdata  *devdata;
221	void __iomem		*eint_reg_base;
222	struct irq_domain	*domain;
223	int			*eint_dual_edges;
224};
225
226int mtk_pctrl_init(struct platform_device *pdev,
227		const struct mtk_pinctrl_devdata *data);
228
229#endif /* __PINCTRL_MTK_COMMON_H */
230