1/* 2 * Rockchip usb PHY driver 3 * 4 * Copyright (C) 2014 Yunzhi Li <lyz@rock-chips.com> 5 * Copyright (C) 2014 ROCKCHIP, Inc. 6 * 7 * This program is free software; you can redistribute it and/or modify 8 * it under the terms of the GNU General Public License as published by 9 * the Free Software Foundation; either version 2 of the License. 10 * 11 * This program is distributed in the hope that it will be useful, 12 * but WITHOUT ANY WARRANTY; without even the implied warranty of 13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14 * GNU General Public License for more details. 15 */ 16 17#include <linux/clk.h> 18#include <linux/io.h> 19#include <linux/kernel.h> 20#include <linux/module.h> 21#include <linux/mutex.h> 22#include <linux/of.h> 23#include <linux/of_address.h> 24#include <linux/phy/phy.h> 25#include <linux/platform_device.h> 26#include <linux/regulator/consumer.h> 27#include <linux/reset.h> 28#include <linux/regmap.h> 29#include <linux/mfd/syscon.h> 30 31/* 32 * The higher 16-bit of this register is used for write protection 33 * only if BIT(13 + 16) set to 1 the BIT(13) can be written. 34 */ 35#define SIDDQ_WRITE_ENA BIT(29) 36#define SIDDQ_ON BIT(13) 37#define SIDDQ_OFF (0 << 13) 38 39struct rockchip_usb_phy { 40 unsigned int reg_offset; 41 struct regmap *reg_base; 42 struct clk *clk; 43 struct phy *phy; 44}; 45 46static int rockchip_usb_phy_power(struct rockchip_usb_phy *phy, 47 bool siddq) 48{ 49 return regmap_write(phy->reg_base, phy->reg_offset, 50 SIDDQ_WRITE_ENA | (siddq ? SIDDQ_ON : SIDDQ_OFF)); 51} 52 53static int rockchip_usb_phy_power_off(struct phy *_phy) 54{ 55 struct rockchip_usb_phy *phy = phy_get_drvdata(_phy); 56 int ret = 0; 57 58 /* Power down usb phy analog blocks by set siddq 1 */ 59 ret = rockchip_usb_phy_power(phy, 1); 60 if (ret) 61 return ret; 62 63 clk_disable_unprepare(phy->clk); 64 65 return 0; 66} 67 68static int rockchip_usb_phy_power_on(struct phy *_phy) 69{ 70 struct rockchip_usb_phy *phy = phy_get_drvdata(_phy); 71 int ret = 0; 72 73 ret = clk_prepare_enable(phy->clk); 74 if (ret) 75 return ret; 76 77 /* Power up usb phy analog blocks by set siddq 0 */ 78 ret = rockchip_usb_phy_power(phy, 0); 79 if (ret) { 80 clk_disable_unprepare(phy->clk); 81 return ret; 82 } 83 84 return 0; 85} 86 87static struct phy_ops ops = { 88 .power_on = rockchip_usb_phy_power_on, 89 .power_off = rockchip_usb_phy_power_off, 90 .owner = THIS_MODULE, 91}; 92 93static int rockchip_usb_phy_probe(struct platform_device *pdev) 94{ 95 struct device *dev = &pdev->dev; 96 struct rockchip_usb_phy *rk_phy; 97 struct phy_provider *phy_provider; 98 struct device_node *child; 99 struct regmap *grf; 100 unsigned int reg_offset; 101 102 grf = syscon_regmap_lookup_by_phandle(dev->of_node, "rockchip,grf"); 103 if (IS_ERR(grf)) { 104 dev_err(&pdev->dev, "Missing rockchip,grf property\n"); 105 return PTR_ERR(grf); 106 } 107 108 for_each_available_child_of_node(dev->of_node, child) { 109 rk_phy = devm_kzalloc(dev, sizeof(*rk_phy), GFP_KERNEL); 110 if (!rk_phy) 111 return -ENOMEM; 112 113 if (of_property_read_u32(child, "reg", ®_offset)) { 114 dev_err(dev, "missing reg property in node %s\n", 115 child->name); 116 return -EINVAL; 117 } 118 119 rk_phy->reg_offset = reg_offset; 120 rk_phy->reg_base = grf; 121 122 rk_phy->clk = of_clk_get_by_name(child, "phyclk"); 123 if (IS_ERR(rk_phy->clk)) 124 rk_phy->clk = NULL; 125 126 rk_phy->phy = devm_phy_create(dev, child, &ops); 127 if (IS_ERR(rk_phy->phy)) { 128 dev_err(dev, "failed to create PHY\n"); 129 return PTR_ERR(rk_phy->phy); 130 } 131 phy_set_drvdata(rk_phy->phy, rk_phy); 132 } 133 134 phy_provider = devm_of_phy_provider_register(dev, of_phy_simple_xlate); 135 return PTR_ERR_OR_ZERO(phy_provider); 136} 137 138static const struct of_device_id rockchip_usb_phy_dt_ids[] = { 139 { .compatible = "rockchip,rk3288-usb-phy" }, 140 {} 141}; 142 143MODULE_DEVICE_TABLE(of, rockchip_usb_phy_dt_ids); 144 145static struct platform_driver rockchip_usb_driver = { 146 .probe = rockchip_usb_phy_probe, 147 .driver = { 148 .name = "rockchip-usb-phy", 149 .owner = THIS_MODULE, 150 .of_match_table = rockchip_usb_phy_dt_ids, 151 }, 152}; 153 154module_platform_driver(rockchip_usb_driver); 155 156MODULE_AUTHOR("Yunzhi Li <lyz@rock-chips.com>"); 157MODULE_DESCRIPTION("Rockchip USB 2.0 PHY driver"); 158MODULE_LICENSE("GPL v2"); 159