1/* 2 * This file is part of the Chelsio T4 PCI-E SR-IOV Virtual Function Ethernet 3 * driver for Linux. 4 * 5 * Copyright (c) 2009-2010 Chelsio Communications, Inc. All rights reserved. 6 * 7 * This software is available to you under a choice of one of two 8 * licenses. You may choose to be licensed under the terms of the GNU 9 * General Public License (GPL) Version 2, available from the file 10 * COPYING in the main directory of this source tree, or the 11 * OpenIB.org BSD license below: 12 * 13 * Redistribution and use in source and binary forms, with or 14 * without modification, are permitted provided that the following 15 * conditions are met: 16 * 17 * - Redistributions of source code must retain the above 18 * copyright notice, this list of conditions and the following 19 * disclaimer. 20 * 21 * - Redistributions in binary form must reproduce the above 22 * copyright notice, this list of conditions and the following 23 * disclaimer in the documentation and/or other materials 24 * provided with the distribution. 25 * 26 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 27 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 28 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND 29 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS 30 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN 31 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN 32 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 33 * SOFTWARE. 34 */ 35 36#include <linux/pci.h> 37 38#include "t4vf_common.h" 39#include "t4vf_defs.h" 40 41#include "../cxgb4/t4_regs.h" 42#include "../cxgb4/t4_values.h" 43#include "../cxgb4/t4fw_api.h" 44 45/* 46 * Wait for the device to become ready (signified by our "who am I" register 47 * returning a value other than all 1's). Return an error if it doesn't 48 * become ready ... 49 */ 50int t4vf_wait_dev_ready(struct adapter *adapter) 51{ 52 const u32 whoami = T4VF_PL_BASE_ADDR + PL_VF_WHOAMI; 53 const u32 notready1 = 0xffffffff; 54 const u32 notready2 = 0xeeeeeeee; 55 u32 val; 56 57 val = t4_read_reg(adapter, whoami); 58 if (val != notready1 && val != notready2) 59 return 0; 60 msleep(500); 61 val = t4_read_reg(adapter, whoami); 62 if (val != notready1 && val != notready2) 63 return 0; 64 else 65 return -EIO; 66} 67 68/* 69 * Get the reply to a mailbox command and store it in @rpl in big-endian order 70 * (since the firmware data structures are specified in a big-endian layout). 71 */ 72static void get_mbox_rpl(struct adapter *adapter, __be64 *rpl, int size, 73 u32 mbox_data) 74{ 75 for ( ; size; size -= 8, mbox_data += 8) 76 *rpl++ = cpu_to_be64(t4_read_reg64(adapter, mbox_data)); 77} 78 79/* 80 * Dump contents of mailbox with a leading tag. 81 */ 82static void dump_mbox(struct adapter *adapter, const char *tag, u32 mbox_data) 83{ 84 dev_err(adapter->pdev_dev, 85 "mbox %s: %llx %llx %llx %llx %llx %llx %llx %llx\n", tag, 86 (unsigned long long)t4_read_reg64(adapter, mbox_data + 0), 87 (unsigned long long)t4_read_reg64(adapter, mbox_data + 8), 88 (unsigned long long)t4_read_reg64(adapter, mbox_data + 16), 89 (unsigned long long)t4_read_reg64(adapter, mbox_data + 24), 90 (unsigned long long)t4_read_reg64(adapter, mbox_data + 32), 91 (unsigned long long)t4_read_reg64(adapter, mbox_data + 40), 92 (unsigned long long)t4_read_reg64(adapter, mbox_data + 48), 93 (unsigned long long)t4_read_reg64(adapter, mbox_data + 56)); 94} 95 96/** 97 * t4vf_wr_mbox_core - send a command to FW through the mailbox 98 * @adapter: the adapter 99 * @cmd: the command to write 100 * @size: command length in bytes 101 * @rpl: where to optionally store the reply 102 * @sleep_ok: if true we may sleep while awaiting command completion 103 * 104 * Sends the given command to FW through the mailbox and waits for the 105 * FW to execute the command. If @rpl is not %NULL it is used to store 106 * the FW's reply to the command. The command and its optional reply 107 * are of the same length. FW can take up to 500 ms to respond. 108 * @sleep_ok determines whether we may sleep while awaiting the response. 109 * If sleeping is allowed we use progressive backoff otherwise we spin. 110 * 111 * The return value is 0 on success or a negative errno on failure. A 112 * failure can happen either because we are not able to execute the 113 * command or FW executes it but signals an error. In the latter case 114 * the return value is the error code indicated by FW (negated). 115 */ 116int t4vf_wr_mbox_core(struct adapter *adapter, const void *cmd, int size, 117 void *rpl, bool sleep_ok) 118{ 119 static const int delay[] = { 120 1, 1, 3, 5, 10, 10, 20, 50, 100 121 }; 122 123 u32 v; 124 int i, ms, delay_idx; 125 const __be64 *p; 126 u32 mbox_data = T4VF_MBDATA_BASE_ADDR; 127 u32 mbox_ctl = T4VF_CIM_BASE_ADDR + CIM_VF_EXT_MAILBOX_CTRL; 128 129 /* 130 * Commands must be multiples of 16 bytes in length and may not be 131 * larger than the size of the Mailbox Data register array. 132 */ 133 if ((size % 16) != 0 || 134 size > NUM_CIM_VF_MAILBOX_DATA_INSTANCES * 4) 135 return -EINVAL; 136 137 /* 138 * Loop trying to get ownership of the mailbox. Return an error 139 * if we can't gain ownership. 140 */ 141 v = MBOWNER_G(t4_read_reg(adapter, mbox_ctl)); 142 for (i = 0; v == MBOX_OWNER_NONE && i < 3; i++) 143 v = MBOWNER_G(t4_read_reg(adapter, mbox_ctl)); 144 if (v != MBOX_OWNER_DRV) 145 return v == MBOX_OWNER_FW ? -EBUSY : -ETIMEDOUT; 146 147 /* 148 * Write the command array into the Mailbox Data register array and 149 * transfer ownership of the mailbox to the firmware. 150 * 151 * For the VFs, the Mailbox Data "registers" are actually backed by 152 * T4's "MA" interface rather than PL Registers (as is the case for 153 * the PFs). Because these are in different coherency domains, the 154 * write to the VF's PL-register-backed Mailbox Control can race in 155 * front of the writes to the MA-backed VF Mailbox Data "registers". 156 * So we need to do a read-back on at least one byte of the VF Mailbox 157 * Data registers before doing the write to the VF Mailbox Control 158 * register. 159 */ 160 for (i = 0, p = cmd; i < size; i += 8) 161 t4_write_reg64(adapter, mbox_data + i, be64_to_cpu(*p++)); 162 t4_read_reg(adapter, mbox_data); /* flush write */ 163 164 t4_write_reg(adapter, mbox_ctl, 165 MBMSGVALID_F | MBOWNER_V(MBOX_OWNER_FW)); 166 t4_read_reg(adapter, mbox_ctl); /* flush write */ 167 168 /* 169 * Spin waiting for firmware to acknowledge processing our command. 170 */ 171 delay_idx = 0; 172 ms = delay[0]; 173 174 for (i = 0; i < FW_CMD_MAX_TIMEOUT; i += ms) { 175 if (sleep_ok) { 176 ms = delay[delay_idx]; 177 if (delay_idx < ARRAY_SIZE(delay) - 1) 178 delay_idx++; 179 msleep(ms); 180 } else 181 mdelay(ms); 182 183 /* 184 * If we're the owner, see if this is the reply we wanted. 185 */ 186 v = t4_read_reg(adapter, mbox_ctl); 187 if (MBOWNER_G(v) == MBOX_OWNER_DRV) { 188 /* 189 * If the Message Valid bit isn't on, revoke ownership 190 * of the mailbox and continue waiting for our reply. 191 */ 192 if ((v & MBMSGVALID_F) == 0) { 193 t4_write_reg(adapter, mbox_ctl, 194 MBOWNER_V(MBOX_OWNER_NONE)); 195 continue; 196 } 197 198 /* 199 * We now have our reply. Extract the command return 200 * value, copy the reply back to our caller's buffer 201 * (if specified) and revoke ownership of the mailbox. 202 * We return the (negated) firmware command return 203 * code (this depends on FW_SUCCESS == 0). 204 */ 205 206 /* return value in low-order little-endian word */ 207 v = t4_read_reg(adapter, mbox_data); 208 if (FW_CMD_RETVAL_G(v)) 209 dump_mbox(adapter, "FW Error", mbox_data); 210 211 if (rpl) { 212 /* request bit in high-order BE word */ 213 WARN_ON((be32_to_cpu(*(const __be32 *)cmd) 214 & FW_CMD_REQUEST_F) == 0); 215 get_mbox_rpl(adapter, rpl, size, mbox_data); 216 WARN_ON((be32_to_cpu(*(__be32 *)rpl) 217 & FW_CMD_REQUEST_F) != 0); 218 } 219 t4_write_reg(adapter, mbox_ctl, 220 MBOWNER_V(MBOX_OWNER_NONE)); 221 return -FW_CMD_RETVAL_G(v); 222 } 223 } 224 225 /* 226 * We timed out. Return the error ... 227 */ 228 dump_mbox(adapter, "FW Timeout", mbox_data); 229 return -ETIMEDOUT; 230} 231 232/** 233 * hash_mac_addr - return the hash value of a MAC address 234 * @addr: the 48-bit Ethernet MAC address 235 * 236 * Hashes a MAC address according to the hash function used by hardware 237 * inexact (hash) address matching. 238 */ 239static int hash_mac_addr(const u8 *addr) 240{ 241 u32 a = ((u32)addr[0] << 16) | ((u32)addr[1] << 8) | addr[2]; 242 u32 b = ((u32)addr[3] << 16) | ((u32)addr[4] << 8) | addr[5]; 243 a ^= b; 244 a ^= (a >> 12); 245 a ^= (a >> 6); 246 return a & 0x3f; 247} 248 249#define ADVERT_MASK (FW_PORT_CAP_SPEED_100M | FW_PORT_CAP_SPEED_1G |\ 250 FW_PORT_CAP_SPEED_10G | FW_PORT_CAP_SPEED_40G | \ 251 FW_PORT_CAP_SPEED_100G | FW_PORT_CAP_ANEG) 252 253/** 254 * init_link_config - initialize a link's SW state 255 * @lc: structure holding the link state 256 * @caps: link capabilities 257 * 258 * Initializes the SW state maintained for each link, including the link's 259 * capabilities and default speed/flow-control/autonegotiation settings. 260 */ 261static void init_link_config(struct link_config *lc, unsigned int caps) 262{ 263 lc->supported = caps; 264 lc->requested_speed = 0; 265 lc->speed = 0; 266 lc->requested_fc = lc->fc = PAUSE_RX | PAUSE_TX; 267 if (lc->supported & FW_PORT_CAP_ANEG) { 268 lc->advertising = lc->supported & ADVERT_MASK; 269 lc->autoneg = AUTONEG_ENABLE; 270 lc->requested_fc |= PAUSE_AUTONEG; 271 } else { 272 lc->advertising = 0; 273 lc->autoneg = AUTONEG_DISABLE; 274 } 275} 276 277/** 278 * t4vf_port_init - initialize port hardware/software state 279 * @adapter: the adapter 280 * @pidx: the adapter port index 281 */ 282int t4vf_port_init(struct adapter *adapter, int pidx) 283{ 284 struct port_info *pi = adap2pinfo(adapter, pidx); 285 struct fw_vi_cmd vi_cmd, vi_rpl; 286 struct fw_port_cmd port_cmd, port_rpl; 287 int v; 288 289 /* 290 * Execute a VI Read command to get our Virtual Interface information 291 * like MAC address, etc. 292 */ 293 memset(&vi_cmd, 0, sizeof(vi_cmd)); 294 vi_cmd.op_to_vfn = cpu_to_be32(FW_CMD_OP_V(FW_VI_CMD) | 295 FW_CMD_REQUEST_F | 296 FW_CMD_READ_F); 297 vi_cmd.alloc_to_len16 = cpu_to_be32(FW_LEN16(vi_cmd)); 298 vi_cmd.type_viid = cpu_to_be16(FW_VI_CMD_VIID_V(pi->viid)); 299 v = t4vf_wr_mbox(adapter, &vi_cmd, sizeof(vi_cmd), &vi_rpl); 300 if (v) 301 return v; 302 303 BUG_ON(pi->port_id != FW_VI_CMD_PORTID_G(vi_rpl.portid_pkd)); 304 pi->rss_size = FW_VI_CMD_RSSSIZE_G(be16_to_cpu(vi_rpl.rsssize_pkd)); 305 t4_os_set_hw_addr(adapter, pidx, vi_rpl.mac); 306 307 /* 308 * If we don't have read access to our port information, we're done 309 * now. Otherwise, execute a PORT Read command to get it ... 310 */ 311 if (!(adapter->params.vfres.r_caps & FW_CMD_CAP_PORT)) 312 return 0; 313 314 memset(&port_cmd, 0, sizeof(port_cmd)); 315 port_cmd.op_to_portid = cpu_to_be32(FW_CMD_OP_V(FW_PORT_CMD) | 316 FW_CMD_REQUEST_F | 317 FW_CMD_READ_F | 318 FW_PORT_CMD_PORTID_V(pi->port_id)); 319 port_cmd.action_to_len16 = 320 cpu_to_be32(FW_PORT_CMD_ACTION_V(FW_PORT_ACTION_GET_PORT_INFO) | 321 FW_LEN16(port_cmd)); 322 v = t4vf_wr_mbox(adapter, &port_cmd, sizeof(port_cmd), &port_rpl); 323 if (v) 324 return v; 325 326 v = be32_to_cpu(port_rpl.u.info.lstatus_to_modtype); 327 pi->mdio_addr = (v & FW_PORT_CMD_MDIOCAP_F) ? 328 FW_PORT_CMD_MDIOADDR_G(v) : -1; 329 pi->port_type = FW_PORT_CMD_PTYPE_G(v); 330 pi->mod_type = FW_PORT_MOD_TYPE_NA; 331 332 init_link_config(&pi->link_cfg, be16_to_cpu(port_rpl.u.info.pcap)); 333 334 return 0; 335} 336 337/** 338 * t4vf_fw_reset - issue a reset to FW 339 * @adapter: the adapter 340 * 341 * Issues a reset command to FW. For a Physical Function this would 342 * result in the Firmware resetting all of its state. For a Virtual 343 * Function this just resets the state associated with the VF. 344 */ 345int t4vf_fw_reset(struct adapter *adapter) 346{ 347 struct fw_reset_cmd cmd; 348 349 memset(&cmd, 0, sizeof(cmd)); 350 cmd.op_to_write = cpu_to_be32(FW_CMD_OP_V(FW_RESET_CMD) | 351 FW_CMD_WRITE_F); 352 cmd.retval_len16 = cpu_to_be32(FW_LEN16(cmd)); 353 return t4vf_wr_mbox(adapter, &cmd, sizeof(cmd), NULL); 354} 355 356/** 357 * t4vf_query_params - query FW or device parameters 358 * @adapter: the adapter 359 * @nparams: the number of parameters 360 * @params: the parameter names 361 * @vals: the parameter values 362 * 363 * Reads the values of firmware or device parameters. Up to 7 parameters 364 * can be queried at once. 365 */ 366static int t4vf_query_params(struct adapter *adapter, unsigned int nparams, 367 const u32 *params, u32 *vals) 368{ 369 int i, ret; 370 struct fw_params_cmd cmd, rpl; 371 struct fw_params_param *p; 372 size_t len16; 373 374 if (nparams > 7) 375 return -EINVAL; 376 377 memset(&cmd, 0, sizeof(cmd)); 378 cmd.op_to_vfn = cpu_to_be32(FW_CMD_OP_V(FW_PARAMS_CMD) | 379 FW_CMD_REQUEST_F | 380 FW_CMD_READ_F); 381 len16 = DIV_ROUND_UP(offsetof(struct fw_params_cmd, 382 param[nparams].mnem), 16); 383 cmd.retval_len16 = cpu_to_be32(FW_CMD_LEN16_V(len16)); 384 for (i = 0, p = &cmd.param[0]; i < nparams; i++, p++) 385 p->mnem = htonl(*params++); 386 387 ret = t4vf_wr_mbox(adapter, &cmd, sizeof(cmd), &rpl); 388 if (ret == 0) 389 for (i = 0, p = &rpl.param[0]; i < nparams; i++, p++) 390 *vals++ = be32_to_cpu(p->val); 391 return ret; 392} 393 394/** 395 * t4vf_set_params - sets FW or device parameters 396 * @adapter: the adapter 397 * @nparams: the number of parameters 398 * @params: the parameter names 399 * @vals: the parameter values 400 * 401 * Sets the values of firmware or device parameters. Up to 7 parameters 402 * can be specified at once. 403 */ 404int t4vf_set_params(struct adapter *adapter, unsigned int nparams, 405 const u32 *params, const u32 *vals) 406{ 407 int i; 408 struct fw_params_cmd cmd; 409 struct fw_params_param *p; 410 size_t len16; 411 412 if (nparams > 7) 413 return -EINVAL; 414 415 memset(&cmd, 0, sizeof(cmd)); 416 cmd.op_to_vfn = cpu_to_be32(FW_CMD_OP_V(FW_PARAMS_CMD) | 417 FW_CMD_REQUEST_F | 418 FW_CMD_WRITE_F); 419 len16 = DIV_ROUND_UP(offsetof(struct fw_params_cmd, 420 param[nparams]), 16); 421 cmd.retval_len16 = cpu_to_be32(FW_CMD_LEN16_V(len16)); 422 for (i = 0, p = &cmd.param[0]; i < nparams; i++, p++) { 423 p->mnem = cpu_to_be32(*params++); 424 p->val = cpu_to_be32(*vals++); 425 } 426 427 return t4vf_wr_mbox(adapter, &cmd, sizeof(cmd), NULL); 428} 429 430/** 431 * t4_bar2_sge_qregs - return BAR2 SGE Queue register information 432 * @adapter: the adapter 433 * @qid: the Queue ID 434 * @qtype: the Ingress or Egress type for @qid 435 * @pbar2_qoffset: BAR2 Queue Offset 436 * @pbar2_qid: BAR2 Queue ID or 0 for Queue ID inferred SGE Queues 437 * 438 * Returns the BAR2 SGE Queue Registers information associated with the 439 * indicated Absolute Queue ID. These are passed back in return value 440 * pointers. @qtype should be T4_BAR2_QTYPE_EGRESS for Egress Queue 441 * and T4_BAR2_QTYPE_INGRESS for Ingress Queues. 442 * 443 * This may return an error which indicates that BAR2 SGE Queue 444 * registers aren't available. If an error is not returned, then the 445 * following values are returned: 446 * 447 * *@pbar2_qoffset: the BAR2 Offset of the @qid Registers 448 * *@pbar2_qid: the BAR2 SGE Queue ID or 0 of @qid 449 * 450 * If the returned BAR2 Queue ID is 0, then BAR2 SGE registers which 451 * require the "Inferred Queue ID" ability may be used. E.g. the 452 * Write Combining Doorbell Buffer. If the BAR2 Queue ID is not 0, 453 * then these "Inferred Queue ID" register may not be used. 454 */ 455int t4_bar2_sge_qregs(struct adapter *adapter, 456 unsigned int qid, 457 enum t4_bar2_qtype qtype, 458 u64 *pbar2_qoffset, 459 unsigned int *pbar2_qid) 460{ 461 unsigned int page_shift, page_size, qpp_shift, qpp_mask; 462 u64 bar2_page_offset, bar2_qoffset; 463 unsigned int bar2_qid, bar2_qid_offset, bar2_qinferred; 464 465 /* T4 doesn't support BAR2 SGE Queue registers. 466 */ 467 if (is_t4(adapter->params.chip)) 468 return -EINVAL; 469 470 /* Get our SGE Page Size parameters. 471 */ 472 page_shift = adapter->params.sge.sge_vf_hps + 10; 473 page_size = 1 << page_shift; 474 475 /* Get the right Queues per Page parameters for our Queue. 476 */ 477 qpp_shift = (qtype == T4_BAR2_QTYPE_EGRESS 478 ? adapter->params.sge.sge_vf_eq_qpp 479 : adapter->params.sge.sge_vf_iq_qpp); 480 qpp_mask = (1 << qpp_shift) - 1; 481 482 /* Calculate the basics of the BAR2 SGE Queue register area: 483 * o The BAR2 page the Queue registers will be in. 484 * o The BAR2 Queue ID. 485 * o The BAR2 Queue ID Offset into the BAR2 page. 486 */ 487 bar2_page_offset = ((u64)(qid >> qpp_shift) << page_shift); 488 bar2_qid = qid & qpp_mask; 489 bar2_qid_offset = bar2_qid * SGE_UDB_SIZE; 490 491 /* If the BAR2 Queue ID Offset is less than the Page Size, then the 492 * hardware will infer the Absolute Queue ID simply from the writes to 493 * the BAR2 Queue ID Offset within the BAR2 Page (and we need to use a 494 * BAR2 Queue ID of 0 for those writes). Otherwise, we'll simply 495 * write to the first BAR2 SGE Queue Area within the BAR2 Page with 496 * the BAR2 Queue ID and the hardware will infer the Absolute Queue ID 497 * from the BAR2 Page and BAR2 Queue ID. 498 * 499 * One important censequence of this is that some BAR2 SGE registers 500 * have a "Queue ID" field and we can write the BAR2 SGE Queue ID 501 * there. But other registers synthesize the SGE Queue ID purely 502 * from the writes to the registers -- the Write Combined Doorbell 503 * Buffer is a good example. These BAR2 SGE Registers are only 504 * available for those BAR2 SGE Register areas where the SGE Absolute 505 * Queue ID can be inferred from simple writes. 506 */ 507 bar2_qoffset = bar2_page_offset; 508 bar2_qinferred = (bar2_qid_offset < page_size); 509 if (bar2_qinferred) { 510 bar2_qoffset += bar2_qid_offset; 511 bar2_qid = 0; 512 } 513 514 *pbar2_qoffset = bar2_qoffset; 515 *pbar2_qid = bar2_qid; 516 return 0; 517} 518 519/** 520 * t4vf_get_sge_params - retrieve adapter Scatter gather Engine parameters 521 * @adapter: the adapter 522 * 523 * Retrieves various core SGE parameters in the form of hardware SGE 524 * register values. The caller is responsible for decoding these as 525 * needed. The SGE parameters are stored in @adapter->params.sge. 526 */ 527int t4vf_get_sge_params(struct adapter *adapter) 528{ 529 struct sge_params *sge_params = &adapter->params.sge; 530 u32 params[7], vals[7]; 531 int v; 532 533 params[0] = (FW_PARAMS_MNEM_V(FW_PARAMS_MNEM_REG) | 534 FW_PARAMS_PARAM_XYZ_V(SGE_CONTROL_A)); 535 params[1] = (FW_PARAMS_MNEM_V(FW_PARAMS_MNEM_REG) | 536 FW_PARAMS_PARAM_XYZ_V(SGE_HOST_PAGE_SIZE_A)); 537 params[2] = (FW_PARAMS_MNEM_V(FW_PARAMS_MNEM_REG) | 538 FW_PARAMS_PARAM_XYZ_V(SGE_FL_BUFFER_SIZE0_A)); 539 params[3] = (FW_PARAMS_MNEM_V(FW_PARAMS_MNEM_REG) | 540 FW_PARAMS_PARAM_XYZ_V(SGE_FL_BUFFER_SIZE1_A)); 541 params[4] = (FW_PARAMS_MNEM_V(FW_PARAMS_MNEM_REG) | 542 FW_PARAMS_PARAM_XYZ_V(SGE_TIMER_VALUE_0_AND_1_A)); 543 params[5] = (FW_PARAMS_MNEM_V(FW_PARAMS_MNEM_REG) | 544 FW_PARAMS_PARAM_XYZ_V(SGE_TIMER_VALUE_2_AND_3_A)); 545 params[6] = (FW_PARAMS_MNEM_V(FW_PARAMS_MNEM_REG) | 546 FW_PARAMS_PARAM_XYZ_V(SGE_TIMER_VALUE_4_AND_5_A)); 547 v = t4vf_query_params(adapter, 7, params, vals); 548 if (v) 549 return v; 550 sge_params->sge_control = vals[0]; 551 sge_params->sge_host_page_size = vals[1]; 552 sge_params->sge_fl_buffer_size[0] = vals[2]; 553 sge_params->sge_fl_buffer_size[1] = vals[3]; 554 sge_params->sge_timer_value_0_and_1 = vals[4]; 555 sge_params->sge_timer_value_2_and_3 = vals[5]; 556 sge_params->sge_timer_value_4_and_5 = vals[6]; 557 558 /* T4 uses a single control field to specify both the PCIe Padding and 559 * Packing Boundary. T5 introduced the ability to specify these 560 * separately with the Padding Boundary in SGE_CONTROL and and Packing 561 * Boundary in SGE_CONTROL2. So for T5 and later we need to grab 562 * SGE_CONTROL in order to determine how ingress packet data will be 563 * laid out in Packed Buffer Mode. Unfortunately, older versions of 564 * the firmware won't let us retrieve SGE_CONTROL2 so if we get a 565 * failure grabbing it we throw an error since we can't figure out the 566 * right value. 567 */ 568 if (!is_t4(adapter->params.chip)) { 569 params[0] = (FW_PARAMS_MNEM_V(FW_PARAMS_MNEM_REG) | 570 FW_PARAMS_PARAM_XYZ_V(SGE_CONTROL2_A)); 571 v = t4vf_query_params(adapter, 1, params, vals); 572 if (v != FW_SUCCESS) { 573 dev_err(adapter->pdev_dev, 574 "Unable to get SGE Control2; " 575 "probably old firmware.\n"); 576 return v; 577 } 578 sge_params->sge_control2 = vals[0]; 579 } 580 581 params[0] = (FW_PARAMS_MNEM_V(FW_PARAMS_MNEM_REG) | 582 FW_PARAMS_PARAM_XYZ_V(SGE_INGRESS_RX_THRESHOLD_A)); 583 params[1] = (FW_PARAMS_MNEM_V(FW_PARAMS_MNEM_REG) | 584 FW_PARAMS_PARAM_XYZ_V(SGE_CONM_CTRL_A)); 585 v = t4vf_query_params(adapter, 2, params, vals); 586 if (v) 587 return v; 588 sge_params->sge_ingress_rx_threshold = vals[0]; 589 sge_params->sge_congestion_control = vals[1]; 590 591 /* For T5 and later we want to use the new BAR2 Doorbells. 592 * Unfortunately, older firmware didn't allow the this register to be 593 * read. 594 */ 595 if (!is_t4(adapter->params.chip)) { 596 u32 whoami; 597 unsigned int pf, s_hps, s_qpp; 598 599 params[0] = (FW_PARAMS_MNEM_V(FW_PARAMS_MNEM_REG) | 600 FW_PARAMS_PARAM_XYZ_V( 601 SGE_EGRESS_QUEUES_PER_PAGE_VF_A)); 602 params[1] = (FW_PARAMS_MNEM_V(FW_PARAMS_MNEM_REG) | 603 FW_PARAMS_PARAM_XYZ_V( 604 SGE_INGRESS_QUEUES_PER_PAGE_VF_A)); 605 v = t4vf_query_params(adapter, 2, params, vals); 606 if (v != FW_SUCCESS) { 607 dev_warn(adapter->pdev_dev, 608 "Unable to get VF SGE Queues/Page; " 609 "probably old firmware.\n"); 610 return v; 611 } 612 sge_params->sge_egress_queues_per_page = vals[0]; 613 sge_params->sge_ingress_queues_per_page = vals[1]; 614 615 /* We need the Queues/Page for our VF. This is based on the 616 * PF from which we're instantiated and is indexed in the 617 * register we just read. Do it once here so other code in 618 * the driver can just use it. 619 */ 620 whoami = t4_read_reg(adapter, 621 T4VF_PL_BASE_ADDR + PL_VF_WHOAMI_A); 622 pf = SOURCEPF_G(whoami); 623 624 s_hps = (HOSTPAGESIZEPF0_S + 625 (HOSTPAGESIZEPF1_S - HOSTPAGESIZEPF0_S) * pf); 626 sge_params->sge_vf_hps = 627 ((sge_params->sge_host_page_size >> s_hps) 628 & HOSTPAGESIZEPF0_M); 629 630 s_qpp = (QUEUESPERPAGEPF0_S + 631 (QUEUESPERPAGEPF1_S - QUEUESPERPAGEPF0_S) * pf); 632 sge_params->sge_vf_eq_qpp = 633 ((sge_params->sge_egress_queues_per_page >> s_qpp) 634 & QUEUESPERPAGEPF0_M); 635 sge_params->sge_vf_iq_qpp = 636 ((sge_params->sge_ingress_queues_per_page >> s_qpp) 637 & QUEUESPERPAGEPF0_M); 638 } 639 640 return 0; 641} 642 643/** 644 * t4vf_get_vpd_params - retrieve device VPD paremeters 645 * @adapter: the adapter 646 * 647 * Retrives various device Vital Product Data parameters. The parameters 648 * are stored in @adapter->params.vpd. 649 */ 650int t4vf_get_vpd_params(struct adapter *adapter) 651{ 652 struct vpd_params *vpd_params = &adapter->params.vpd; 653 u32 params[7], vals[7]; 654 int v; 655 656 params[0] = (FW_PARAMS_MNEM_V(FW_PARAMS_MNEM_DEV) | 657 FW_PARAMS_PARAM_X_V(FW_PARAMS_PARAM_DEV_CCLK)); 658 v = t4vf_query_params(adapter, 1, params, vals); 659 if (v) 660 return v; 661 vpd_params->cclk = vals[0]; 662 663 return 0; 664} 665 666/** 667 * t4vf_get_dev_params - retrieve device paremeters 668 * @adapter: the adapter 669 * 670 * Retrives various device parameters. The parameters are stored in 671 * @adapter->params.dev. 672 */ 673int t4vf_get_dev_params(struct adapter *adapter) 674{ 675 struct dev_params *dev_params = &adapter->params.dev; 676 u32 params[7], vals[7]; 677 int v; 678 679 params[0] = (FW_PARAMS_MNEM_V(FW_PARAMS_MNEM_DEV) | 680 FW_PARAMS_PARAM_X_V(FW_PARAMS_PARAM_DEV_FWREV)); 681 params[1] = (FW_PARAMS_MNEM_V(FW_PARAMS_MNEM_DEV) | 682 FW_PARAMS_PARAM_X_V(FW_PARAMS_PARAM_DEV_TPREV)); 683 v = t4vf_query_params(adapter, 2, params, vals); 684 if (v) 685 return v; 686 dev_params->fwrev = vals[0]; 687 dev_params->tprev = vals[1]; 688 689 return 0; 690} 691 692/** 693 * t4vf_get_rss_glb_config - retrieve adapter RSS Global Configuration 694 * @adapter: the adapter 695 * 696 * Retrieves global RSS mode and parameters with which we have to live 697 * and stores them in the @adapter's RSS parameters. 698 */ 699int t4vf_get_rss_glb_config(struct adapter *adapter) 700{ 701 struct rss_params *rss = &adapter->params.rss; 702 struct fw_rss_glb_config_cmd cmd, rpl; 703 int v; 704 705 /* 706 * Execute an RSS Global Configuration read command to retrieve 707 * our RSS configuration. 708 */ 709 memset(&cmd, 0, sizeof(cmd)); 710 cmd.op_to_write = cpu_to_be32(FW_CMD_OP_V(FW_RSS_GLB_CONFIG_CMD) | 711 FW_CMD_REQUEST_F | 712 FW_CMD_READ_F); 713 cmd.retval_len16 = cpu_to_be32(FW_LEN16(cmd)); 714 v = t4vf_wr_mbox(adapter, &cmd, sizeof(cmd), &rpl); 715 if (v) 716 return v; 717 718 /* 719 * Transate the big-endian RSS Global Configuration into our 720 * cpu-endian format based on the RSS mode. We also do first level 721 * filtering at this point to weed out modes which don't support 722 * VF Drivers ... 723 */ 724 rss->mode = FW_RSS_GLB_CONFIG_CMD_MODE_G( 725 be32_to_cpu(rpl.u.manual.mode_pkd)); 726 switch (rss->mode) { 727 case FW_RSS_GLB_CONFIG_CMD_MODE_BASICVIRTUAL: { 728 u32 word = be32_to_cpu( 729 rpl.u.basicvirtual.synmapen_to_hashtoeplitz); 730 731 rss->u.basicvirtual.synmapen = 732 ((word & FW_RSS_GLB_CONFIG_CMD_SYNMAPEN_F) != 0); 733 rss->u.basicvirtual.syn4tupenipv6 = 734 ((word & FW_RSS_GLB_CONFIG_CMD_SYN4TUPENIPV6_F) != 0); 735 rss->u.basicvirtual.syn2tupenipv6 = 736 ((word & FW_RSS_GLB_CONFIG_CMD_SYN2TUPENIPV6_F) != 0); 737 rss->u.basicvirtual.syn4tupenipv4 = 738 ((word & FW_RSS_GLB_CONFIG_CMD_SYN4TUPENIPV4_F) != 0); 739 rss->u.basicvirtual.syn2tupenipv4 = 740 ((word & FW_RSS_GLB_CONFIG_CMD_SYN2TUPENIPV4_F) != 0); 741 742 rss->u.basicvirtual.ofdmapen = 743 ((word & FW_RSS_GLB_CONFIG_CMD_OFDMAPEN_F) != 0); 744 745 rss->u.basicvirtual.tnlmapen = 746 ((word & FW_RSS_GLB_CONFIG_CMD_TNLMAPEN_F) != 0); 747 rss->u.basicvirtual.tnlalllookup = 748 ((word & FW_RSS_GLB_CONFIG_CMD_TNLALLLKP_F) != 0); 749 750 rss->u.basicvirtual.hashtoeplitz = 751 ((word & FW_RSS_GLB_CONFIG_CMD_HASHTOEPLITZ_F) != 0); 752 753 /* we need at least Tunnel Map Enable to be set */ 754 if (!rss->u.basicvirtual.tnlmapen) 755 return -EINVAL; 756 break; 757 } 758 759 default: 760 /* all unknown/unsupported RSS modes result in an error */ 761 return -EINVAL; 762 } 763 764 return 0; 765} 766 767/** 768 * t4vf_get_vfres - retrieve VF resource limits 769 * @adapter: the adapter 770 * 771 * Retrieves configured resource limits and capabilities for a virtual 772 * function. The results are stored in @adapter->vfres. 773 */ 774int t4vf_get_vfres(struct adapter *adapter) 775{ 776 struct vf_resources *vfres = &adapter->params.vfres; 777 struct fw_pfvf_cmd cmd, rpl; 778 int v; 779 u32 word; 780 781 /* 782 * Execute PFVF Read command to get VF resource limits; bail out early 783 * with error on command failure. 784 */ 785 memset(&cmd, 0, sizeof(cmd)); 786 cmd.op_to_vfn = cpu_to_be32(FW_CMD_OP_V(FW_PFVF_CMD) | 787 FW_CMD_REQUEST_F | 788 FW_CMD_READ_F); 789 cmd.retval_len16 = cpu_to_be32(FW_LEN16(cmd)); 790 v = t4vf_wr_mbox(adapter, &cmd, sizeof(cmd), &rpl); 791 if (v) 792 return v; 793 794 /* 795 * Extract VF resource limits and return success. 796 */ 797 word = be32_to_cpu(rpl.niqflint_niq); 798 vfres->niqflint = FW_PFVF_CMD_NIQFLINT_G(word); 799 vfres->niq = FW_PFVF_CMD_NIQ_G(word); 800 801 word = be32_to_cpu(rpl.type_to_neq); 802 vfres->neq = FW_PFVF_CMD_NEQ_G(word); 803 vfres->pmask = FW_PFVF_CMD_PMASK_G(word); 804 805 word = be32_to_cpu(rpl.tc_to_nexactf); 806 vfres->tc = FW_PFVF_CMD_TC_G(word); 807 vfres->nvi = FW_PFVF_CMD_NVI_G(word); 808 vfres->nexactf = FW_PFVF_CMD_NEXACTF_G(word); 809 810 word = be32_to_cpu(rpl.r_caps_to_nethctrl); 811 vfres->r_caps = FW_PFVF_CMD_R_CAPS_G(word); 812 vfres->wx_caps = FW_PFVF_CMD_WX_CAPS_G(word); 813 vfres->nethctrl = FW_PFVF_CMD_NETHCTRL_G(word); 814 815 return 0; 816} 817 818/** 819 * t4vf_read_rss_vi_config - read a VI's RSS configuration 820 * @adapter: the adapter 821 * @viid: Virtual Interface ID 822 * @config: pointer to host-native VI RSS Configuration buffer 823 * 824 * Reads the Virtual Interface's RSS configuration information and 825 * translates it into CPU-native format. 826 */ 827int t4vf_read_rss_vi_config(struct adapter *adapter, unsigned int viid, 828 union rss_vi_config *config) 829{ 830 struct fw_rss_vi_config_cmd cmd, rpl; 831 int v; 832 833 memset(&cmd, 0, sizeof(cmd)); 834 cmd.op_to_viid = cpu_to_be32(FW_CMD_OP_V(FW_RSS_VI_CONFIG_CMD) | 835 FW_CMD_REQUEST_F | 836 FW_CMD_READ_F | 837 FW_RSS_VI_CONFIG_CMD_VIID(viid)); 838 cmd.retval_len16 = cpu_to_be32(FW_LEN16(cmd)); 839 v = t4vf_wr_mbox(adapter, &cmd, sizeof(cmd), &rpl); 840 if (v) 841 return v; 842 843 switch (adapter->params.rss.mode) { 844 case FW_RSS_GLB_CONFIG_CMD_MODE_BASICVIRTUAL: { 845 u32 word = be32_to_cpu(rpl.u.basicvirtual.defaultq_to_udpen); 846 847 config->basicvirtual.ip6fourtupen = 848 ((word & FW_RSS_VI_CONFIG_CMD_IP6FOURTUPEN_F) != 0); 849 config->basicvirtual.ip6twotupen = 850 ((word & FW_RSS_VI_CONFIG_CMD_IP6TWOTUPEN_F) != 0); 851 config->basicvirtual.ip4fourtupen = 852 ((word & FW_RSS_VI_CONFIG_CMD_IP4FOURTUPEN_F) != 0); 853 config->basicvirtual.ip4twotupen = 854 ((word & FW_RSS_VI_CONFIG_CMD_IP4TWOTUPEN_F) != 0); 855 config->basicvirtual.udpen = 856 ((word & FW_RSS_VI_CONFIG_CMD_UDPEN_F) != 0); 857 config->basicvirtual.defaultq = 858 FW_RSS_VI_CONFIG_CMD_DEFAULTQ_G(word); 859 break; 860 } 861 862 default: 863 return -EINVAL; 864 } 865 866 return 0; 867} 868 869/** 870 * t4vf_write_rss_vi_config - write a VI's RSS configuration 871 * @adapter: the adapter 872 * @viid: Virtual Interface ID 873 * @config: pointer to host-native VI RSS Configuration buffer 874 * 875 * Write the Virtual Interface's RSS configuration information 876 * (translating it into firmware-native format before writing). 877 */ 878int t4vf_write_rss_vi_config(struct adapter *adapter, unsigned int viid, 879 union rss_vi_config *config) 880{ 881 struct fw_rss_vi_config_cmd cmd, rpl; 882 883 memset(&cmd, 0, sizeof(cmd)); 884 cmd.op_to_viid = cpu_to_be32(FW_CMD_OP_V(FW_RSS_VI_CONFIG_CMD) | 885 FW_CMD_REQUEST_F | 886 FW_CMD_WRITE_F | 887 FW_RSS_VI_CONFIG_CMD_VIID(viid)); 888 cmd.retval_len16 = cpu_to_be32(FW_LEN16(cmd)); 889 switch (adapter->params.rss.mode) { 890 case FW_RSS_GLB_CONFIG_CMD_MODE_BASICVIRTUAL: { 891 u32 word = 0; 892 893 if (config->basicvirtual.ip6fourtupen) 894 word |= FW_RSS_VI_CONFIG_CMD_IP6FOURTUPEN_F; 895 if (config->basicvirtual.ip6twotupen) 896 word |= FW_RSS_VI_CONFIG_CMD_IP6TWOTUPEN_F; 897 if (config->basicvirtual.ip4fourtupen) 898 word |= FW_RSS_VI_CONFIG_CMD_IP4FOURTUPEN_F; 899 if (config->basicvirtual.ip4twotupen) 900 word |= FW_RSS_VI_CONFIG_CMD_IP4TWOTUPEN_F; 901 if (config->basicvirtual.udpen) 902 word |= FW_RSS_VI_CONFIG_CMD_UDPEN_F; 903 word |= FW_RSS_VI_CONFIG_CMD_DEFAULTQ_V( 904 config->basicvirtual.defaultq); 905 cmd.u.basicvirtual.defaultq_to_udpen = cpu_to_be32(word); 906 break; 907 } 908 909 default: 910 return -EINVAL; 911 } 912 913 return t4vf_wr_mbox(adapter, &cmd, sizeof(cmd), &rpl); 914} 915 916/** 917 * t4vf_config_rss_range - configure a portion of the RSS mapping table 918 * @adapter: the adapter 919 * @viid: Virtual Interface of RSS Table Slice 920 * @start: starting entry in the table to write 921 * @n: how many table entries to write 922 * @rspq: values for the "Response Queue" (Ingress Queue) lookup table 923 * @nrspq: number of values in @rspq 924 * 925 * Programs the selected part of the VI's RSS mapping table with the 926 * provided values. If @nrspq < @n the supplied values are used repeatedly 927 * until the full table range is populated. 928 * 929 * The caller must ensure the values in @rspq are in the range 0..1023. 930 */ 931int t4vf_config_rss_range(struct adapter *adapter, unsigned int viid, 932 int start, int n, const u16 *rspq, int nrspq) 933{ 934 const u16 *rsp = rspq; 935 const u16 *rsp_end = rspq+nrspq; 936 struct fw_rss_ind_tbl_cmd cmd; 937 938 /* 939 * Initialize firmware command template to write the RSS table. 940 */ 941 memset(&cmd, 0, sizeof(cmd)); 942 cmd.op_to_viid = cpu_to_be32(FW_CMD_OP_V(FW_RSS_IND_TBL_CMD) | 943 FW_CMD_REQUEST_F | 944 FW_CMD_WRITE_F | 945 FW_RSS_IND_TBL_CMD_VIID_V(viid)); 946 cmd.retval_len16 = cpu_to_be32(FW_LEN16(cmd)); 947 948 /* 949 * Each firmware RSS command can accommodate up to 32 RSS Ingress 950 * Queue Identifiers. These Ingress Queue IDs are packed three to 951 * a 32-bit word as 10-bit values with the upper remaining 2 bits 952 * reserved. 953 */ 954 while (n > 0) { 955 __be32 *qp = &cmd.iq0_to_iq2; 956 int nq = min(n, 32); 957 int ret; 958 959 /* 960 * Set up the firmware RSS command header to send the next 961 * "nq" Ingress Queue IDs to the firmware. 962 */ 963 cmd.niqid = cpu_to_be16(nq); 964 cmd.startidx = cpu_to_be16(start); 965 966 /* 967 * "nq" more done for the start of the next loop. 968 */ 969 start += nq; 970 n -= nq; 971 972 /* 973 * While there are still Ingress Queue IDs to stuff into the 974 * current firmware RSS command, retrieve them from the 975 * Ingress Queue ID array and insert them into the command. 976 */ 977 while (nq > 0) { 978 /* 979 * Grab up to the next 3 Ingress Queue IDs (wrapping 980 * around the Ingress Queue ID array if necessary) and 981 * insert them into the firmware RSS command at the 982 * current 3-tuple position within the commad. 983 */ 984 u16 qbuf[3]; 985 u16 *qbp = qbuf; 986 int nqbuf = min(3, nq); 987 988 nq -= nqbuf; 989 qbuf[0] = qbuf[1] = qbuf[2] = 0; 990 while (nqbuf) { 991 nqbuf--; 992 *qbp++ = *rsp++; 993 if (rsp >= rsp_end) 994 rsp = rspq; 995 } 996 *qp++ = cpu_to_be32(FW_RSS_IND_TBL_CMD_IQ0_V(qbuf[0]) | 997 FW_RSS_IND_TBL_CMD_IQ1_V(qbuf[1]) | 998 FW_RSS_IND_TBL_CMD_IQ2_V(qbuf[2])); 999 } 1000 1001 /* 1002 * Send this portion of the RRS table update to the firmware; 1003 * bail out on any errors. 1004 */ 1005 ret = t4vf_wr_mbox(adapter, &cmd, sizeof(cmd), NULL); 1006 if (ret) 1007 return ret; 1008 } 1009 return 0; 1010} 1011 1012/** 1013 * t4vf_alloc_vi - allocate a virtual interface on a port 1014 * @adapter: the adapter 1015 * @port_id: physical port associated with the VI 1016 * 1017 * Allocate a new Virtual Interface and bind it to the indicated 1018 * physical port. Return the new Virtual Interface Identifier on 1019 * success, or a [negative] error number on failure. 1020 */ 1021int t4vf_alloc_vi(struct adapter *adapter, int port_id) 1022{ 1023 struct fw_vi_cmd cmd, rpl; 1024 int v; 1025 1026 /* 1027 * Execute a VI command to allocate Virtual Interface and return its 1028 * VIID. 1029 */ 1030 memset(&cmd, 0, sizeof(cmd)); 1031 cmd.op_to_vfn = cpu_to_be32(FW_CMD_OP_V(FW_VI_CMD) | 1032 FW_CMD_REQUEST_F | 1033 FW_CMD_WRITE_F | 1034 FW_CMD_EXEC_F); 1035 cmd.alloc_to_len16 = cpu_to_be32(FW_LEN16(cmd) | 1036 FW_VI_CMD_ALLOC_F); 1037 cmd.portid_pkd = FW_VI_CMD_PORTID_V(port_id); 1038 v = t4vf_wr_mbox(adapter, &cmd, sizeof(cmd), &rpl); 1039 if (v) 1040 return v; 1041 1042 return FW_VI_CMD_VIID_G(be16_to_cpu(rpl.type_viid)); 1043} 1044 1045/** 1046 * t4vf_free_vi -- free a virtual interface 1047 * @adapter: the adapter 1048 * @viid: the virtual interface identifier 1049 * 1050 * Free a previously allocated Virtual Interface. Return an error on 1051 * failure. 1052 */ 1053int t4vf_free_vi(struct adapter *adapter, int viid) 1054{ 1055 struct fw_vi_cmd cmd; 1056 1057 /* 1058 * Execute a VI command to free the Virtual Interface. 1059 */ 1060 memset(&cmd, 0, sizeof(cmd)); 1061 cmd.op_to_vfn = cpu_to_be32(FW_CMD_OP_V(FW_VI_CMD) | 1062 FW_CMD_REQUEST_F | 1063 FW_CMD_EXEC_F); 1064 cmd.alloc_to_len16 = cpu_to_be32(FW_LEN16(cmd) | 1065 FW_VI_CMD_FREE_F); 1066 cmd.type_viid = cpu_to_be16(FW_VI_CMD_VIID_V(viid)); 1067 return t4vf_wr_mbox(adapter, &cmd, sizeof(cmd), NULL); 1068} 1069 1070/** 1071 * t4vf_enable_vi - enable/disable a virtual interface 1072 * @adapter: the adapter 1073 * @viid: the Virtual Interface ID 1074 * @rx_en: 1=enable Rx, 0=disable Rx 1075 * @tx_en: 1=enable Tx, 0=disable Tx 1076 * 1077 * Enables/disables a virtual interface. 1078 */ 1079int t4vf_enable_vi(struct adapter *adapter, unsigned int viid, 1080 bool rx_en, bool tx_en) 1081{ 1082 struct fw_vi_enable_cmd cmd; 1083 1084 memset(&cmd, 0, sizeof(cmd)); 1085 cmd.op_to_viid = cpu_to_be32(FW_CMD_OP_V(FW_VI_ENABLE_CMD) | 1086 FW_CMD_REQUEST_F | 1087 FW_CMD_EXEC_F | 1088 FW_VI_ENABLE_CMD_VIID_V(viid)); 1089 cmd.ien_to_len16 = cpu_to_be32(FW_VI_ENABLE_CMD_IEN_V(rx_en) | 1090 FW_VI_ENABLE_CMD_EEN_V(tx_en) | 1091 FW_LEN16(cmd)); 1092 return t4vf_wr_mbox(adapter, &cmd, sizeof(cmd), NULL); 1093} 1094 1095/** 1096 * t4vf_identify_port - identify a VI's port by blinking its LED 1097 * @adapter: the adapter 1098 * @viid: the Virtual Interface ID 1099 * @nblinks: how many times to blink LED at 2.5 Hz 1100 * 1101 * Identifies a VI's port by blinking its LED. 1102 */ 1103int t4vf_identify_port(struct adapter *adapter, unsigned int viid, 1104 unsigned int nblinks) 1105{ 1106 struct fw_vi_enable_cmd cmd; 1107 1108 memset(&cmd, 0, sizeof(cmd)); 1109 cmd.op_to_viid = cpu_to_be32(FW_CMD_OP_V(FW_VI_ENABLE_CMD) | 1110 FW_CMD_REQUEST_F | 1111 FW_CMD_EXEC_F | 1112 FW_VI_ENABLE_CMD_VIID_V(viid)); 1113 cmd.ien_to_len16 = cpu_to_be32(FW_VI_ENABLE_CMD_LED_F | 1114 FW_LEN16(cmd)); 1115 cmd.blinkdur = cpu_to_be16(nblinks); 1116 return t4vf_wr_mbox(adapter, &cmd, sizeof(cmd), NULL); 1117} 1118 1119/** 1120 * t4vf_set_rxmode - set Rx properties of a virtual interface 1121 * @adapter: the adapter 1122 * @viid: the VI id 1123 * @mtu: the new MTU or -1 for no change 1124 * @promisc: 1 to enable promiscuous mode, 0 to disable it, -1 no change 1125 * @all_multi: 1 to enable all-multi mode, 0 to disable it, -1 no change 1126 * @bcast: 1 to enable broadcast Rx, 0 to disable it, -1 no change 1127 * @vlanex: 1 to enable hardware VLAN Tag extraction, 0 to disable it, 1128 * -1 no change 1129 * 1130 * Sets Rx properties of a virtual interface. 1131 */ 1132int t4vf_set_rxmode(struct adapter *adapter, unsigned int viid, 1133 int mtu, int promisc, int all_multi, int bcast, int vlanex, 1134 bool sleep_ok) 1135{ 1136 struct fw_vi_rxmode_cmd cmd; 1137 1138 /* convert to FW values */ 1139 if (mtu < 0) 1140 mtu = FW_VI_RXMODE_CMD_MTU_M; 1141 if (promisc < 0) 1142 promisc = FW_VI_RXMODE_CMD_PROMISCEN_M; 1143 if (all_multi < 0) 1144 all_multi = FW_VI_RXMODE_CMD_ALLMULTIEN_M; 1145 if (bcast < 0) 1146 bcast = FW_VI_RXMODE_CMD_BROADCASTEN_M; 1147 if (vlanex < 0) 1148 vlanex = FW_VI_RXMODE_CMD_VLANEXEN_M; 1149 1150 memset(&cmd, 0, sizeof(cmd)); 1151 cmd.op_to_viid = cpu_to_be32(FW_CMD_OP_V(FW_VI_RXMODE_CMD) | 1152 FW_CMD_REQUEST_F | 1153 FW_CMD_WRITE_F | 1154 FW_VI_RXMODE_CMD_VIID_V(viid)); 1155 cmd.retval_len16 = cpu_to_be32(FW_LEN16(cmd)); 1156 cmd.mtu_to_vlanexen = 1157 cpu_to_be32(FW_VI_RXMODE_CMD_MTU_V(mtu) | 1158 FW_VI_RXMODE_CMD_PROMISCEN_V(promisc) | 1159 FW_VI_RXMODE_CMD_ALLMULTIEN_V(all_multi) | 1160 FW_VI_RXMODE_CMD_BROADCASTEN_V(bcast) | 1161 FW_VI_RXMODE_CMD_VLANEXEN_V(vlanex)); 1162 return t4vf_wr_mbox_core(adapter, &cmd, sizeof(cmd), NULL, sleep_ok); 1163} 1164 1165/** 1166 * t4vf_alloc_mac_filt - allocates exact-match filters for MAC addresses 1167 * @adapter: the adapter 1168 * @viid: the Virtual Interface Identifier 1169 * @free: if true any existing filters for this VI id are first removed 1170 * @naddr: the number of MAC addresses to allocate filters for (up to 7) 1171 * @addr: the MAC address(es) 1172 * @idx: where to store the index of each allocated filter 1173 * @hash: pointer to hash address filter bitmap 1174 * @sleep_ok: call is allowed to sleep 1175 * 1176 * Allocates an exact-match filter for each of the supplied addresses and 1177 * sets it to the corresponding address. If @idx is not %NULL it should 1178 * have at least @naddr entries, each of which will be set to the index of 1179 * the filter allocated for the corresponding MAC address. If a filter 1180 * could not be allocated for an address its index is set to 0xffff. 1181 * If @hash is not %NULL addresses that fail to allocate an exact filter 1182 * are hashed and update the hash filter bitmap pointed at by @hash. 1183 * 1184 * Returns a negative error number or the number of filters allocated. 1185 */ 1186int t4vf_alloc_mac_filt(struct adapter *adapter, unsigned int viid, bool free, 1187 unsigned int naddr, const u8 **addr, u16 *idx, 1188 u64 *hash, bool sleep_ok) 1189{ 1190 int offset, ret = 0; 1191 unsigned nfilters = 0; 1192 unsigned int rem = naddr; 1193 struct fw_vi_mac_cmd cmd, rpl; 1194 unsigned int max_naddr = is_t4(adapter->params.chip) ? 1195 NUM_MPS_CLS_SRAM_L_INSTANCES : 1196 NUM_MPS_T5_CLS_SRAM_L_INSTANCES; 1197 1198 if (naddr > max_naddr) 1199 return -EINVAL; 1200 1201 for (offset = 0; offset < naddr; /**/) { 1202 unsigned int fw_naddr = (rem < ARRAY_SIZE(cmd.u.exact) 1203 ? rem 1204 : ARRAY_SIZE(cmd.u.exact)); 1205 size_t len16 = DIV_ROUND_UP(offsetof(struct fw_vi_mac_cmd, 1206 u.exact[fw_naddr]), 16); 1207 struct fw_vi_mac_exact *p; 1208 int i; 1209 1210 memset(&cmd, 0, sizeof(cmd)); 1211 cmd.op_to_viid = cpu_to_be32(FW_CMD_OP_V(FW_VI_MAC_CMD) | 1212 FW_CMD_REQUEST_F | 1213 FW_CMD_WRITE_F | 1214 (free ? FW_CMD_EXEC_F : 0) | 1215 FW_VI_MAC_CMD_VIID_V(viid)); 1216 cmd.freemacs_to_len16 = 1217 cpu_to_be32(FW_VI_MAC_CMD_FREEMACS_V(free) | 1218 FW_CMD_LEN16_V(len16)); 1219 1220 for (i = 0, p = cmd.u.exact; i < fw_naddr; i++, p++) { 1221 p->valid_to_idx = cpu_to_be16( 1222 FW_VI_MAC_CMD_VALID_F | 1223 FW_VI_MAC_CMD_IDX_V(FW_VI_MAC_ADD_MAC)); 1224 memcpy(p->macaddr, addr[offset+i], sizeof(p->macaddr)); 1225 } 1226 1227 1228 ret = t4vf_wr_mbox_core(adapter, &cmd, sizeof(cmd), &rpl, 1229 sleep_ok); 1230 if (ret && ret != -ENOMEM) 1231 break; 1232 1233 for (i = 0, p = rpl.u.exact; i < fw_naddr; i++, p++) { 1234 u16 index = FW_VI_MAC_CMD_IDX_G( 1235 be16_to_cpu(p->valid_to_idx)); 1236 1237 if (idx) 1238 idx[offset+i] = 1239 (index >= max_naddr 1240 ? 0xffff 1241 : index); 1242 if (index < max_naddr) 1243 nfilters++; 1244 else if (hash) 1245 *hash |= (1ULL << hash_mac_addr(addr[offset+i])); 1246 } 1247 1248 free = false; 1249 offset += fw_naddr; 1250 rem -= fw_naddr; 1251 } 1252 1253 /* 1254 * If there were no errors or we merely ran out of room in our MAC 1255 * address arena, return the number of filters actually written. 1256 */ 1257 if (ret == 0 || ret == -ENOMEM) 1258 ret = nfilters; 1259 return ret; 1260} 1261 1262/** 1263 * t4vf_change_mac - modifies the exact-match filter for a MAC address 1264 * @adapter: the adapter 1265 * @viid: the Virtual Interface ID 1266 * @idx: index of existing filter for old value of MAC address, or -1 1267 * @addr: the new MAC address value 1268 * @persist: if idx < 0, the new MAC allocation should be persistent 1269 * 1270 * Modifies an exact-match filter and sets it to the new MAC address. 1271 * Note that in general it is not possible to modify the value of a given 1272 * filter so the generic way to modify an address filter is to free the 1273 * one being used by the old address value and allocate a new filter for 1274 * the new address value. @idx can be -1 if the address is a new 1275 * addition. 1276 * 1277 * Returns a negative error number or the index of the filter with the new 1278 * MAC value. 1279 */ 1280int t4vf_change_mac(struct adapter *adapter, unsigned int viid, 1281 int idx, const u8 *addr, bool persist) 1282{ 1283 int ret; 1284 struct fw_vi_mac_cmd cmd, rpl; 1285 struct fw_vi_mac_exact *p = &cmd.u.exact[0]; 1286 size_t len16 = DIV_ROUND_UP(offsetof(struct fw_vi_mac_cmd, 1287 u.exact[1]), 16); 1288 unsigned int max_naddr = is_t4(adapter->params.chip) ? 1289 NUM_MPS_CLS_SRAM_L_INSTANCES : 1290 NUM_MPS_T5_CLS_SRAM_L_INSTANCES; 1291 1292 /* 1293 * If this is a new allocation, determine whether it should be 1294 * persistent (across a "freemacs" operation) or not. 1295 */ 1296 if (idx < 0) 1297 idx = persist ? FW_VI_MAC_ADD_PERSIST_MAC : FW_VI_MAC_ADD_MAC; 1298 1299 memset(&cmd, 0, sizeof(cmd)); 1300 cmd.op_to_viid = cpu_to_be32(FW_CMD_OP_V(FW_VI_MAC_CMD) | 1301 FW_CMD_REQUEST_F | 1302 FW_CMD_WRITE_F | 1303 FW_VI_MAC_CMD_VIID_V(viid)); 1304 cmd.freemacs_to_len16 = cpu_to_be32(FW_CMD_LEN16_V(len16)); 1305 p->valid_to_idx = cpu_to_be16(FW_VI_MAC_CMD_VALID_F | 1306 FW_VI_MAC_CMD_IDX_V(idx)); 1307 memcpy(p->macaddr, addr, sizeof(p->macaddr)); 1308 1309 ret = t4vf_wr_mbox(adapter, &cmd, sizeof(cmd), &rpl); 1310 if (ret == 0) { 1311 p = &rpl.u.exact[0]; 1312 ret = FW_VI_MAC_CMD_IDX_G(be16_to_cpu(p->valid_to_idx)); 1313 if (ret >= max_naddr) 1314 ret = -ENOMEM; 1315 } 1316 return ret; 1317} 1318 1319/** 1320 * t4vf_set_addr_hash - program the MAC inexact-match hash filter 1321 * @adapter: the adapter 1322 * @viid: the Virtual Interface Identifier 1323 * @ucast: whether the hash filter should also match unicast addresses 1324 * @vec: the value to be written to the hash filter 1325 * @sleep_ok: call is allowed to sleep 1326 * 1327 * Sets the 64-bit inexact-match hash filter for a virtual interface. 1328 */ 1329int t4vf_set_addr_hash(struct adapter *adapter, unsigned int viid, 1330 bool ucast, u64 vec, bool sleep_ok) 1331{ 1332 struct fw_vi_mac_cmd cmd; 1333 size_t len16 = DIV_ROUND_UP(offsetof(struct fw_vi_mac_cmd, 1334 u.exact[0]), 16); 1335 1336 memset(&cmd, 0, sizeof(cmd)); 1337 cmd.op_to_viid = cpu_to_be32(FW_CMD_OP_V(FW_VI_MAC_CMD) | 1338 FW_CMD_REQUEST_F | 1339 FW_CMD_WRITE_F | 1340 FW_VI_ENABLE_CMD_VIID_V(viid)); 1341 cmd.freemacs_to_len16 = cpu_to_be32(FW_VI_MAC_CMD_HASHVECEN_F | 1342 FW_VI_MAC_CMD_HASHUNIEN_V(ucast) | 1343 FW_CMD_LEN16_V(len16)); 1344 cmd.u.hash.hashvec = cpu_to_be64(vec); 1345 return t4vf_wr_mbox_core(adapter, &cmd, sizeof(cmd), NULL, sleep_ok); 1346} 1347 1348/** 1349 * t4vf_get_port_stats - collect "port" statistics 1350 * @adapter: the adapter 1351 * @pidx: the port index 1352 * @s: the stats structure to fill 1353 * 1354 * Collect statistics for the "port"'s Virtual Interface. 1355 */ 1356int t4vf_get_port_stats(struct adapter *adapter, int pidx, 1357 struct t4vf_port_stats *s) 1358{ 1359 struct port_info *pi = adap2pinfo(adapter, pidx); 1360 struct fw_vi_stats_vf fwstats; 1361 unsigned int rem = VI_VF_NUM_STATS; 1362 __be64 *fwsp = (__be64 *)&fwstats; 1363 1364 /* 1365 * Grab the Virtual Interface statistics a chunk at a time via mailbox 1366 * commands. We could use a Work Request and get all of them at once 1367 * but that's an asynchronous interface which is awkward to use. 1368 */ 1369 while (rem) { 1370 unsigned int ix = VI_VF_NUM_STATS - rem; 1371 unsigned int nstats = min(6U, rem); 1372 struct fw_vi_stats_cmd cmd, rpl; 1373 size_t len = (offsetof(struct fw_vi_stats_cmd, u) + 1374 sizeof(struct fw_vi_stats_ctl)); 1375 size_t len16 = DIV_ROUND_UP(len, 16); 1376 int ret; 1377 1378 memset(&cmd, 0, sizeof(cmd)); 1379 cmd.op_to_viid = cpu_to_be32(FW_CMD_OP_V(FW_VI_STATS_CMD) | 1380 FW_VI_STATS_CMD_VIID_V(pi->viid) | 1381 FW_CMD_REQUEST_F | 1382 FW_CMD_READ_F); 1383 cmd.retval_len16 = cpu_to_be32(FW_CMD_LEN16_V(len16)); 1384 cmd.u.ctl.nstats_ix = 1385 cpu_to_be16(FW_VI_STATS_CMD_IX_V(ix) | 1386 FW_VI_STATS_CMD_NSTATS_V(nstats)); 1387 ret = t4vf_wr_mbox_ns(adapter, &cmd, len, &rpl); 1388 if (ret) 1389 return ret; 1390 1391 memcpy(fwsp, &rpl.u.ctl.stat0, sizeof(__be64) * nstats); 1392 1393 rem -= nstats; 1394 fwsp += nstats; 1395 } 1396 1397 /* 1398 * Translate firmware statistics into host native statistics. 1399 */ 1400 s->tx_bcast_bytes = be64_to_cpu(fwstats.tx_bcast_bytes); 1401 s->tx_bcast_frames = be64_to_cpu(fwstats.tx_bcast_frames); 1402 s->tx_mcast_bytes = be64_to_cpu(fwstats.tx_mcast_bytes); 1403 s->tx_mcast_frames = be64_to_cpu(fwstats.tx_mcast_frames); 1404 s->tx_ucast_bytes = be64_to_cpu(fwstats.tx_ucast_bytes); 1405 s->tx_ucast_frames = be64_to_cpu(fwstats.tx_ucast_frames); 1406 s->tx_drop_frames = be64_to_cpu(fwstats.tx_drop_frames); 1407 s->tx_offload_bytes = be64_to_cpu(fwstats.tx_offload_bytes); 1408 s->tx_offload_frames = be64_to_cpu(fwstats.tx_offload_frames); 1409 1410 s->rx_bcast_bytes = be64_to_cpu(fwstats.rx_bcast_bytes); 1411 s->rx_bcast_frames = be64_to_cpu(fwstats.rx_bcast_frames); 1412 s->rx_mcast_bytes = be64_to_cpu(fwstats.rx_mcast_bytes); 1413 s->rx_mcast_frames = be64_to_cpu(fwstats.rx_mcast_frames); 1414 s->rx_ucast_bytes = be64_to_cpu(fwstats.rx_ucast_bytes); 1415 s->rx_ucast_frames = be64_to_cpu(fwstats.rx_ucast_frames); 1416 1417 s->rx_err_frames = be64_to_cpu(fwstats.rx_err_frames); 1418 1419 return 0; 1420} 1421 1422/** 1423 * t4vf_iq_free - free an ingress queue and its free lists 1424 * @adapter: the adapter 1425 * @iqtype: the ingress queue type (FW_IQ_TYPE_FL_INT_CAP, etc.) 1426 * @iqid: ingress queue ID 1427 * @fl0id: FL0 queue ID or 0xffff if no attached FL0 1428 * @fl1id: FL1 queue ID or 0xffff if no attached FL1 1429 * 1430 * Frees an ingress queue and its associated free lists, if any. 1431 */ 1432int t4vf_iq_free(struct adapter *adapter, unsigned int iqtype, 1433 unsigned int iqid, unsigned int fl0id, unsigned int fl1id) 1434{ 1435 struct fw_iq_cmd cmd; 1436 1437 memset(&cmd, 0, sizeof(cmd)); 1438 cmd.op_to_vfn = cpu_to_be32(FW_CMD_OP_V(FW_IQ_CMD) | 1439 FW_CMD_REQUEST_F | 1440 FW_CMD_EXEC_F); 1441 cmd.alloc_to_len16 = cpu_to_be32(FW_IQ_CMD_FREE_F | 1442 FW_LEN16(cmd)); 1443 cmd.type_to_iqandstindex = 1444 cpu_to_be32(FW_IQ_CMD_TYPE_V(iqtype)); 1445 1446 cmd.iqid = cpu_to_be16(iqid); 1447 cmd.fl0id = cpu_to_be16(fl0id); 1448 cmd.fl1id = cpu_to_be16(fl1id); 1449 return t4vf_wr_mbox(adapter, &cmd, sizeof(cmd), NULL); 1450} 1451 1452/** 1453 * t4vf_eth_eq_free - free an Ethernet egress queue 1454 * @adapter: the adapter 1455 * @eqid: egress queue ID 1456 * 1457 * Frees an Ethernet egress queue. 1458 */ 1459int t4vf_eth_eq_free(struct adapter *adapter, unsigned int eqid) 1460{ 1461 struct fw_eq_eth_cmd cmd; 1462 1463 memset(&cmd, 0, sizeof(cmd)); 1464 cmd.op_to_vfn = cpu_to_be32(FW_CMD_OP_V(FW_EQ_ETH_CMD) | 1465 FW_CMD_REQUEST_F | 1466 FW_CMD_EXEC_F); 1467 cmd.alloc_to_len16 = cpu_to_be32(FW_EQ_ETH_CMD_FREE_F | 1468 FW_LEN16(cmd)); 1469 cmd.eqid_pkd = cpu_to_be32(FW_EQ_ETH_CMD_EQID_V(eqid)); 1470 return t4vf_wr_mbox(adapter, &cmd, sizeof(cmd), NULL); 1471} 1472 1473/** 1474 * t4vf_handle_fw_rpl - process a firmware reply message 1475 * @adapter: the adapter 1476 * @rpl: start of the firmware message 1477 * 1478 * Processes a firmware message, such as link state change messages. 1479 */ 1480int t4vf_handle_fw_rpl(struct adapter *adapter, const __be64 *rpl) 1481{ 1482 const struct fw_cmd_hdr *cmd_hdr = (const struct fw_cmd_hdr *)rpl; 1483 u8 opcode = FW_CMD_OP_G(be32_to_cpu(cmd_hdr->hi)); 1484 1485 switch (opcode) { 1486 case FW_PORT_CMD: { 1487 /* 1488 * Link/module state change message. 1489 */ 1490 const struct fw_port_cmd *port_cmd = 1491 (const struct fw_port_cmd *)rpl; 1492 u32 stat, mod; 1493 int action, port_id, link_ok, speed, fc, pidx; 1494 1495 /* 1496 * Extract various fields from port status change message. 1497 */ 1498 action = FW_PORT_CMD_ACTION_G( 1499 be32_to_cpu(port_cmd->action_to_len16)); 1500 if (action != FW_PORT_ACTION_GET_PORT_INFO) { 1501 dev_err(adapter->pdev_dev, 1502 "Unknown firmware PORT reply action %x\n", 1503 action); 1504 break; 1505 } 1506 1507 port_id = FW_PORT_CMD_PORTID_G( 1508 be32_to_cpu(port_cmd->op_to_portid)); 1509 1510 stat = be32_to_cpu(port_cmd->u.info.lstatus_to_modtype); 1511 link_ok = (stat & FW_PORT_CMD_LSTATUS_F) != 0; 1512 speed = 0; 1513 fc = 0; 1514 if (stat & FW_PORT_CMD_RXPAUSE_F) 1515 fc |= PAUSE_RX; 1516 if (stat & FW_PORT_CMD_TXPAUSE_F) 1517 fc |= PAUSE_TX; 1518 if (stat & FW_PORT_CMD_LSPEED_V(FW_PORT_CAP_SPEED_100M)) 1519 speed = 100; 1520 else if (stat & FW_PORT_CMD_LSPEED_V(FW_PORT_CAP_SPEED_1G)) 1521 speed = 1000; 1522 else if (stat & FW_PORT_CMD_LSPEED_V(FW_PORT_CAP_SPEED_10G)) 1523 speed = 10000; 1524 else if (stat & FW_PORT_CMD_LSPEED_V(FW_PORT_CAP_SPEED_40G)) 1525 speed = 40000; 1526 1527 /* 1528 * Scan all of our "ports" (Virtual Interfaces) looking for 1529 * those bound to the physical port which has changed. If 1530 * our recorded state doesn't match the current state, 1531 * signal that change to the OS code. 1532 */ 1533 for_each_port(adapter, pidx) { 1534 struct port_info *pi = adap2pinfo(adapter, pidx); 1535 struct link_config *lc; 1536 1537 if (pi->port_id != port_id) 1538 continue; 1539 1540 lc = &pi->link_cfg; 1541 1542 mod = FW_PORT_CMD_MODTYPE_G(stat); 1543 if (mod != pi->mod_type) { 1544 pi->mod_type = mod; 1545 t4vf_os_portmod_changed(adapter, pidx); 1546 } 1547 1548 if (link_ok != lc->link_ok || speed != lc->speed || 1549 fc != lc->fc) { 1550 /* something changed */ 1551 lc->link_ok = link_ok; 1552 lc->speed = speed; 1553 lc->fc = fc; 1554 lc->supported = 1555 be16_to_cpu(port_cmd->u.info.pcap); 1556 t4vf_os_link_changed(adapter, pidx, link_ok); 1557 } 1558 } 1559 break; 1560 } 1561 1562 default: 1563 dev_err(adapter->pdev_dev, "Unknown firmware reply %X\n", 1564 opcode); 1565 } 1566 return 0; 1567} 1568 1569/** 1570 */ 1571int t4vf_prep_adapter(struct adapter *adapter) 1572{ 1573 int err; 1574 unsigned int chipid; 1575 1576 /* Wait for the device to become ready before proceeding ... 1577 */ 1578 err = t4vf_wait_dev_ready(adapter); 1579 if (err) 1580 return err; 1581 1582 /* Default port and clock for debugging in case we can't reach 1583 * firmware. 1584 */ 1585 adapter->params.nports = 1; 1586 adapter->params.vfres.pmask = 1; 1587 adapter->params.vpd.cclk = 50000; 1588 1589 adapter->params.chip = 0; 1590 switch (CHELSIO_PCI_ID_VER(adapter->pdev->device)) { 1591 case CHELSIO_T4: 1592 adapter->params.chip |= CHELSIO_CHIP_CODE(CHELSIO_T4, 0); 1593 break; 1594 1595 case CHELSIO_T5: 1596 chipid = REV_G(t4_read_reg(adapter, PL_VF_REV_A)); 1597 adapter->params.chip |= CHELSIO_CHIP_CODE(CHELSIO_T5, chipid); 1598 break; 1599 } 1600 1601 return 0; 1602} 1603