1/* 2 * e100net.c: A network driver for the ETRAX 100LX network controller. 3 * 4 * Copyright (c) 1998-2002 Axis Communications AB. 5 * 6 * The outline of this driver comes from skeleton.c. 7 * 8 */ 9 10 11#include <linux/module.h> 12 13#include <linux/kernel.h> 14#include <linux/delay.h> 15#include <linux/types.h> 16#include <linux/fcntl.h> 17#include <linux/interrupt.h> 18#include <linux/ptrace.h> 19#include <linux/ioport.h> 20#include <linux/in.h> 21#include <linux/string.h> 22#include <linux/spinlock.h> 23#include <linux/errno.h> 24#include <linux/init.h> 25#include <linux/bitops.h> 26 27#include <linux/if.h> 28#include <linux/mii.h> 29#include <linux/netdevice.h> 30#include <linux/etherdevice.h> 31#include <linux/skbuff.h> 32#include <linux/ethtool.h> 33 34#include <arch/svinto.h>/* DMA and register descriptions */ 35#include <asm/io.h> /* CRIS_LED_* I/O functions */ 36#include <asm/irq.h> 37#include <asm/dma.h> 38#include <asm/ethernet.h> 39#include <asm/cache.h> 40#include <arch/io_interface_mux.h> 41 42//#define ETHDEBUG 43#define D(x) 44 45/* 46 * The name of the card. Is used for messages and in the requests for 47 * io regions, irqs and dma channels 48 */ 49 50static const char* cardname = "ETRAX 100LX built-in ethernet controller"; 51 52/* A default ethernet address. Highlevel SW will set the real one later */ 53 54static struct sockaddr default_mac = { 55 0, 56 { 0x00, 0x40, 0x8C, 0xCD, 0x00, 0x00 } 57}; 58 59/* Information that need to be kept for each board. */ 60struct net_local { 61 struct mii_if_info mii_if; 62 63 /* Tx control lock. This protects the transmit buffer ring 64 * state along with the "tx full" state of the driver. This 65 * means all netif_queue flow control actions are protected 66 * by this lock as well. 67 */ 68 spinlock_t lock; 69 70 spinlock_t led_lock; /* Protect LED state */ 71 spinlock_t transceiver_lock; /* Protect transceiver state. */ 72}; 73 74typedef struct etrax_eth_descr 75{ 76 etrax_dma_descr descr; 77 struct sk_buff* skb; 78} etrax_eth_descr; 79 80/* Some transceivers requires special handling */ 81struct transceiver_ops 82{ 83 unsigned int oui; 84 void (*check_speed)(struct net_device* dev); 85 void (*check_duplex)(struct net_device* dev); 86}; 87 88/* Duplex settings */ 89enum duplex 90{ 91 half, 92 full, 93 autoneg 94}; 95 96/* Dma descriptors etc. */ 97 98#define MAX_MEDIA_DATA_SIZE 1522 99 100#define MIN_PACKET_LEN 46 101#define ETHER_HEAD_LEN 14 102 103/* 104** MDIO constants. 105*/ 106#define MDIO_START 0x1 107#define MDIO_READ 0x2 108#define MDIO_WRITE 0x1 109#define MDIO_PREAMBLE 0xfffffffful 110 111/* Broadcom specific */ 112#define MDIO_AUX_CTRL_STATUS_REG 0x18 113#define MDIO_BC_FULL_DUPLEX_IND 0x1 114#define MDIO_BC_SPEED 0x2 115 116/* TDK specific */ 117#define MDIO_TDK_DIAGNOSTIC_REG 18 118#define MDIO_TDK_DIAGNOSTIC_RATE 0x400 119#define MDIO_TDK_DIAGNOSTIC_DPLX 0x800 120 121/*Intel LXT972A specific*/ 122#define MDIO_INT_STATUS_REG_2 0x0011 123#define MDIO_INT_FULL_DUPLEX_IND (1 << 9) 124#define MDIO_INT_SPEED (1 << 14) 125 126/* Network flash constants */ 127#define NET_FLASH_TIME (HZ/50) /* 20 ms */ 128#define NET_FLASH_PAUSE (HZ/100) /* 10 ms */ 129#define NET_LINK_UP_CHECK_INTERVAL (2*HZ) /* 2 s */ 130#define NET_DUPLEX_CHECK_INTERVAL (2*HZ) /* 2 s */ 131 132#define NO_NETWORK_ACTIVITY 0 133#define NETWORK_ACTIVITY 1 134 135#define NBR_OF_RX_DESC 32 136#define NBR_OF_TX_DESC 16 137 138/* Large packets are sent directly to upper layers while small packets are */ 139/* copied (to reduce memory waste). The following constant decides the breakpoint */ 140#define RX_COPYBREAK 256 141 142/* Due to a chip bug we need to flush the cache when descriptors are returned */ 143/* to the DMA. To decrease performance impact we return descriptors in chunks. */ 144/* The following constant determines the number of descriptors to return. */ 145#define RX_QUEUE_THRESHOLD NBR_OF_RX_DESC/2 146 147#define GET_BIT(bit,val) (((val) >> (bit)) & 0x01) 148 149/* Define some macros to access ETRAX 100 registers */ 150#define SETF(var, reg, field, val) var = (var & ~IO_MASK_(reg##_, field##_)) | \ 151 IO_FIELD_(reg##_, field##_, val) 152#define SETS(var, reg, field, val) var = (var & ~IO_MASK_(reg##_, field##_)) | \ 153 IO_STATE_(reg##_, field##_, _##val) 154 155static etrax_eth_descr *myNextRxDesc; /* Points to the next descriptor to 156 to be processed */ 157static etrax_eth_descr *myLastRxDesc; /* The last processed descriptor */ 158 159static etrax_eth_descr RxDescList[NBR_OF_RX_DESC] __attribute__ ((aligned(32))); 160 161static etrax_eth_descr* myFirstTxDesc; /* First packet not yet sent */ 162static etrax_eth_descr* myLastTxDesc; /* End of send queue */ 163static etrax_eth_descr* myNextTxDesc; /* Next descriptor to use */ 164static etrax_eth_descr TxDescList[NBR_OF_TX_DESC] __attribute__ ((aligned(32))); 165 166static unsigned int network_rec_config_shadow = 0; 167 168static unsigned int network_tr_ctrl_shadow = 0; 169 170/* Network speed indication. */ 171static DEFINE_TIMER(speed_timer, NULL, 0, 0); 172static DEFINE_TIMER(clear_led_timer, NULL, 0, 0); 173static int current_speed; /* Speed read from transceiver */ 174static int current_speed_selection; /* Speed selected by user */ 175static unsigned long led_next_time; 176static int led_active; 177static int rx_queue_len; 178 179/* Duplex */ 180static DEFINE_TIMER(duplex_timer, NULL, 0, 0); 181static int full_duplex; 182static enum duplex current_duplex; 183 184/* Index to functions, as function prototypes. */ 185 186static int etrax_ethernet_init(void); 187 188static int e100_open(struct net_device *dev); 189static int e100_set_mac_address(struct net_device *dev, void *addr); 190static int e100_send_packet(struct sk_buff *skb, struct net_device *dev); 191static irqreturn_t e100rxtx_interrupt(int irq, void *dev_id); 192static irqreturn_t e100nw_interrupt(int irq, void *dev_id); 193static void e100_rx(struct net_device *dev); 194static int e100_close(struct net_device *dev); 195static int e100_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd); 196static int e100_set_config(struct net_device* dev, struct ifmap* map); 197static void e100_tx_timeout(struct net_device *dev); 198static struct net_device_stats *e100_get_stats(struct net_device *dev); 199static void set_multicast_list(struct net_device *dev); 200static void e100_hardware_send_packet(struct net_local* np, char *buf, int length); 201static void update_rx_stats(struct net_device_stats *); 202static void update_tx_stats(struct net_device_stats *); 203static int e100_probe_transceiver(struct net_device* dev); 204 205static void e100_check_speed(unsigned long priv); 206static void e100_set_speed(struct net_device* dev, unsigned long speed); 207static void e100_check_duplex(unsigned long priv); 208static void e100_set_duplex(struct net_device* dev, enum duplex); 209static void e100_negotiate(struct net_device* dev); 210 211static int e100_get_mdio_reg(struct net_device *dev, int phy_id, int location); 212static void e100_set_mdio_reg(struct net_device *dev, int phy_id, int location, int value); 213 214static void e100_send_mdio_cmd(unsigned short cmd, int write_cmd); 215static void e100_send_mdio_bit(unsigned char bit); 216static unsigned char e100_receive_mdio_bit(void); 217static void e100_reset_transceiver(struct net_device* net); 218 219static void e100_clear_network_leds(unsigned long dummy); 220static void e100_set_network_leds(int active); 221 222static const struct ethtool_ops e100_ethtool_ops; 223#if defined(CONFIG_ETRAX_NO_PHY) 224static void dummy_check_speed(struct net_device* dev); 225static void dummy_check_duplex(struct net_device* dev); 226#else 227static void broadcom_check_speed(struct net_device* dev); 228static void broadcom_check_duplex(struct net_device* dev); 229static void tdk_check_speed(struct net_device* dev); 230static void tdk_check_duplex(struct net_device* dev); 231static void intel_check_speed(struct net_device* dev); 232static void intel_check_duplex(struct net_device* dev); 233static void generic_check_speed(struct net_device* dev); 234static void generic_check_duplex(struct net_device* dev); 235#endif 236#ifdef CONFIG_NET_POLL_CONTROLLER 237static void e100_netpoll(struct net_device* dev); 238#endif 239 240static int autoneg_normal = 1; 241 242struct transceiver_ops transceivers[] = 243{ 244#if defined(CONFIG_ETRAX_NO_PHY) 245 {0x0000, dummy_check_speed, dummy_check_duplex} /* Dummy */ 246#else 247 {0x1018, broadcom_check_speed, broadcom_check_duplex}, /* Broadcom */ 248 {0xC039, tdk_check_speed, tdk_check_duplex}, /* TDK 2120 */ 249 {0x039C, tdk_check_speed, tdk_check_duplex}, /* TDK 2120C */ 250 {0x04de, intel_check_speed, intel_check_duplex}, /* Intel LXT972A*/ 251 {0x0000, generic_check_speed, generic_check_duplex} /* Generic, must be last */ 252#endif 253}; 254 255struct transceiver_ops* transceiver = &transceivers[0]; 256 257static const struct net_device_ops e100_netdev_ops = { 258 .ndo_open = e100_open, 259 .ndo_stop = e100_close, 260 .ndo_start_xmit = e100_send_packet, 261 .ndo_tx_timeout = e100_tx_timeout, 262 .ndo_get_stats = e100_get_stats, 263 .ndo_set_rx_mode = set_multicast_list, 264 .ndo_do_ioctl = e100_ioctl, 265 .ndo_set_mac_address = e100_set_mac_address, 266 .ndo_validate_addr = eth_validate_addr, 267 .ndo_change_mtu = eth_change_mtu, 268 .ndo_set_config = e100_set_config, 269#ifdef CONFIG_NET_POLL_CONTROLLER 270 .ndo_poll_controller = e100_netpoll, 271#endif 272}; 273 274#define tx_done(dev) (*R_DMA_CH0_CMD == 0) 275 276/* 277 * Check for a network adaptor of this type, and return '0' if one exists. 278 * If dev->base_addr == 0, probe all likely locations. 279 * If dev->base_addr == 1, always return failure. 280 * If dev->base_addr == 2, allocate space for the device and return success 281 * (detachable devices only). 282 */ 283 284static int __init 285etrax_ethernet_init(void) 286{ 287 struct net_device *dev; 288 struct net_local* np; 289 int i, err; 290 291 printk(KERN_INFO 292 "ETRAX 100LX 10/100MBit ethernet v2.0 (c) 1998-2007 Axis Communications AB\n"); 293 294 if (cris_request_io_interface(if_eth, cardname)) { 295 printk(KERN_CRIT "etrax_ethernet_init failed to get IO interface\n"); 296 return -EBUSY; 297 } 298 299 dev = alloc_etherdev(sizeof(struct net_local)); 300 if (!dev) 301 return -ENOMEM; 302 303 np = netdev_priv(dev); 304 305 /* we do our own locking */ 306 dev->features |= NETIF_F_LLTX; 307 308 dev->base_addr = (unsigned int)R_NETWORK_SA_0; /* just to have something to show */ 309 310 /* now setup our etrax specific stuff */ 311 312 dev->irq = NETWORK_DMA_RX_IRQ_NBR; /* we really use DMATX as well... */ 313 dev->dma = NETWORK_RX_DMA_NBR; 314 315 /* fill in our handlers so the network layer can talk to us in the future */ 316 317 dev->ethtool_ops = &e100_ethtool_ops; 318 dev->netdev_ops = &e100_netdev_ops; 319 320 spin_lock_init(&np->lock); 321 spin_lock_init(&np->led_lock); 322 spin_lock_init(&np->transceiver_lock); 323 324 /* Initialise the list of Etrax DMA-descriptors */ 325 326 /* Initialise receive descriptors */ 327 328 for (i = 0; i < NBR_OF_RX_DESC; i++) { 329 /* Allocate two extra cachelines to make sure that buffer used 330 * by DMA does not share cacheline with any other data (to 331 * avoid cache bug) 332 */ 333 RxDescList[i].skb = dev_alloc_skb(MAX_MEDIA_DATA_SIZE + 2 * L1_CACHE_BYTES); 334 if (!RxDescList[i].skb) 335 return -ENOMEM; 336 RxDescList[i].descr.ctrl = 0; 337 RxDescList[i].descr.sw_len = MAX_MEDIA_DATA_SIZE; 338 RxDescList[i].descr.next = virt_to_phys(&RxDescList[i + 1]); 339 RxDescList[i].descr.buf = L1_CACHE_ALIGN(virt_to_phys(RxDescList[i].skb->data)); 340 RxDescList[i].descr.status = 0; 341 RxDescList[i].descr.hw_len = 0; 342 prepare_rx_descriptor(&RxDescList[i].descr); 343 } 344 345 RxDescList[NBR_OF_RX_DESC - 1].descr.ctrl = d_eol; 346 RxDescList[NBR_OF_RX_DESC - 1].descr.next = virt_to_phys(&RxDescList[0]); 347 rx_queue_len = 0; 348 349 /* Initialize transmit descriptors */ 350 for (i = 0; i < NBR_OF_TX_DESC; i++) { 351 TxDescList[i].descr.ctrl = 0; 352 TxDescList[i].descr.sw_len = 0; 353 TxDescList[i].descr.next = virt_to_phys(&TxDescList[i + 1].descr); 354 TxDescList[i].descr.buf = 0; 355 TxDescList[i].descr.status = 0; 356 TxDescList[i].descr.hw_len = 0; 357 TxDescList[i].skb = 0; 358 } 359 360 TxDescList[NBR_OF_TX_DESC - 1].descr.ctrl = d_eol; 361 TxDescList[NBR_OF_TX_DESC - 1].descr.next = virt_to_phys(&TxDescList[0].descr); 362 363 /* Initialise initial pointers */ 364 365 myNextRxDesc = &RxDescList[0]; 366 myLastRxDesc = &RxDescList[NBR_OF_RX_DESC - 1]; 367 myFirstTxDesc = &TxDescList[0]; 368 myNextTxDesc = &TxDescList[0]; 369 myLastTxDesc = &TxDescList[NBR_OF_TX_DESC - 1]; 370 371 /* Register device */ 372 err = register_netdev(dev); 373 if (err) { 374 free_netdev(dev); 375 return err; 376 } 377 378 /* set the default MAC address */ 379 380 e100_set_mac_address(dev, &default_mac); 381 382 /* Initialize speed indicator stuff. */ 383 384 current_speed = 10; 385 current_speed_selection = 0; /* Auto */ 386 speed_timer.expires = jiffies + NET_LINK_UP_CHECK_INTERVAL; 387 speed_timer.data = (unsigned long)dev; 388 speed_timer.function = e100_check_speed; 389 390 clear_led_timer.function = e100_clear_network_leds; 391 clear_led_timer.data = (unsigned long)dev; 392 393 full_duplex = 0; 394 current_duplex = autoneg; 395 duplex_timer.expires = jiffies + NET_DUPLEX_CHECK_INTERVAL; 396 duplex_timer.data = (unsigned long)dev; 397 duplex_timer.function = e100_check_duplex; 398 399 /* Initialize mii interface */ 400 np->mii_if.phy_id_mask = 0x1f; 401 np->mii_if.reg_num_mask = 0x1f; 402 np->mii_if.dev = dev; 403 np->mii_if.mdio_read = e100_get_mdio_reg; 404 np->mii_if.mdio_write = e100_set_mdio_reg; 405 406 /* Initialize group address registers to make sure that no */ 407 /* unwanted addresses are matched */ 408 *R_NETWORK_GA_0 = 0x00000000; 409 *R_NETWORK_GA_1 = 0x00000000; 410 411 /* Initialize next time the led can flash */ 412 led_next_time = jiffies; 413 return 0; 414} 415 416/* set MAC address of the interface. called from the core after a 417 * SIOCSIFADDR ioctl, and from the bootup above. 418 */ 419 420static int 421e100_set_mac_address(struct net_device *dev, void *p) 422{ 423 struct net_local *np = netdev_priv(dev); 424 struct sockaddr *addr = p; 425 426 spin_lock(&np->lock); /* preemption protection */ 427 428 /* remember it */ 429 430 memcpy(dev->dev_addr, addr->sa_data, dev->addr_len); 431 432 /* Write it to the hardware. 433 * Note the way the address is wrapped: 434 * *R_NETWORK_SA_0 = a0_0 | (a0_1 << 8) | (a0_2 << 16) | (a0_3 << 24); 435 * *R_NETWORK_SA_1 = a0_4 | (a0_5 << 8); 436 */ 437 438 *R_NETWORK_SA_0 = dev->dev_addr[0] | (dev->dev_addr[1] << 8) | 439 (dev->dev_addr[2] << 16) | (dev->dev_addr[3] << 24); 440 *R_NETWORK_SA_1 = dev->dev_addr[4] | (dev->dev_addr[5] << 8); 441 *R_NETWORK_SA_2 = 0; 442 443 /* show it in the log as well */ 444 445 printk(KERN_INFO "%s: changed MAC to %pM\n", dev->name, dev->dev_addr); 446 447 spin_unlock(&np->lock); 448 449 return 0; 450} 451 452/* 453 * Open/initialize the board. This is called (in the current kernel) 454 * sometime after booting when the 'ifconfig' program is run. 455 * 456 * This routine should set everything up anew at each open, even 457 * registers that "should" only need to be set once at boot, so that 458 * there is non-reboot way to recover if something goes wrong. 459 */ 460 461static int 462e100_open(struct net_device *dev) 463{ 464 unsigned long flags; 465 466 /* enable the MDIO output pin */ 467 468 *R_NETWORK_MGM_CTRL = IO_STATE(R_NETWORK_MGM_CTRL, mdoe, enable); 469 470 *R_IRQ_MASK0_CLR = 471 IO_STATE(R_IRQ_MASK0_CLR, overrun, clr) | 472 IO_STATE(R_IRQ_MASK0_CLR, underrun, clr) | 473 IO_STATE(R_IRQ_MASK0_CLR, excessive_col, clr); 474 475 /* clear dma0 and 1 eop and descr irq masks */ 476 *R_IRQ_MASK2_CLR = 477 IO_STATE(R_IRQ_MASK2_CLR, dma0_descr, clr) | 478 IO_STATE(R_IRQ_MASK2_CLR, dma0_eop, clr) | 479 IO_STATE(R_IRQ_MASK2_CLR, dma1_descr, clr) | 480 IO_STATE(R_IRQ_MASK2_CLR, dma1_eop, clr); 481 482 /* Reset and wait for the DMA channels */ 483 484 RESET_DMA(NETWORK_TX_DMA_NBR); 485 RESET_DMA(NETWORK_RX_DMA_NBR); 486 WAIT_DMA(NETWORK_TX_DMA_NBR); 487 WAIT_DMA(NETWORK_RX_DMA_NBR); 488 489 /* Initialise the etrax network controller */ 490 491 /* allocate the irq corresponding to the receiving DMA */ 492 493 if (request_irq(NETWORK_DMA_RX_IRQ_NBR, e100rxtx_interrupt, 0, cardname, 494 (void *)dev)) { 495 goto grace_exit0; 496 } 497 498 /* allocate the irq corresponding to the transmitting DMA */ 499 500 if (request_irq(NETWORK_DMA_TX_IRQ_NBR, e100rxtx_interrupt, 0, 501 cardname, (void *)dev)) { 502 goto grace_exit1; 503 } 504 505 /* allocate the irq corresponding to the network errors etc */ 506 507 if (request_irq(NETWORK_STATUS_IRQ_NBR, e100nw_interrupt, 0, 508 cardname, (void *)dev)) { 509 goto grace_exit2; 510 } 511 512 /* 513 * Always allocate the DMA channels after the IRQ, 514 * and clean up on failure. 515 */ 516 517 if (cris_request_dma(NETWORK_TX_DMA_NBR, 518 cardname, 519 DMA_VERBOSE_ON_ERROR, 520 dma_eth)) { 521 goto grace_exit3; 522 } 523 524 if (cris_request_dma(NETWORK_RX_DMA_NBR, 525 cardname, 526 DMA_VERBOSE_ON_ERROR, 527 dma_eth)) { 528 goto grace_exit4; 529 } 530 531 /* give the HW an idea of what MAC address we want */ 532 533 *R_NETWORK_SA_0 = dev->dev_addr[0] | (dev->dev_addr[1] << 8) | 534 (dev->dev_addr[2] << 16) | (dev->dev_addr[3] << 24); 535 *R_NETWORK_SA_1 = dev->dev_addr[4] | (dev->dev_addr[5] << 8); 536 *R_NETWORK_SA_2 = 0; 537 538#if 0 539 /* use promiscuous mode for testing */ 540 *R_NETWORK_GA_0 = 0xffffffff; 541 *R_NETWORK_GA_1 = 0xffffffff; 542 543 *R_NETWORK_REC_CONFIG = 0xd; /* broadcast rec, individ. rec, ma0 enabled */ 544#else 545 SETS(network_rec_config_shadow, R_NETWORK_REC_CONFIG, max_size, size1522); 546 SETS(network_rec_config_shadow, R_NETWORK_REC_CONFIG, broadcast, receive); 547 SETS(network_rec_config_shadow, R_NETWORK_REC_CONFIG, ma0, enable); 548 SETF(network_rec_config_shadow, R_NETWORK_REC_CONFIG, duplex, full_duplex); 549 *R_NETWORK_REC_CONFIG = network_rec_config_shadow; 550#endif 551 552 *R_NETWORK_GEN_CONFIG = 553 IO_STATE(R_NETWORK_GEN_CONFIG, phy, mii_clk) | 554 IO_STATE(R_NETWORK_GEN_CONFIG, enable, on); 555 556 SETS(network_tr_ctrl_shadow, R_NETWORK_TR_CTRL, clr_error, clr); 557 SETS(network_tr_ctrl_shadow, R_NETWORK_TR_CTRL, delay, none); 558 SETS(network_tr_ctrl_shadow, R_NETWORK_TR_CTRL, cancel, dont); 559 SETS(network_tr_ctrl_shadow, R_NETWORK_TR_CTRL, cd, enable); 560 SETS(network_tr_ctrl_shadow, R_NETWORK_TR_CTRL, retry, enable); 561 SETS(network_tr_ctrl_shadow, R_NETWORK_TR_CTRL, pad, enable); 562 SETS(network_tr_ctrl_shadow, R_NETWORK_TR_CTRL, crc, enable); 563 *R_NETWORK_TR_CTRL = network_tr_ctrl_shadow; 564 565 local_irq_save(flags); 566 567 /* enable the irq's for ethernet DMA */ 568 569 *R_IRQ_MASK2_SET = 570 IO_STATE(R_IRQ_MASK2_SET, dma0_eop, set) | 571 IO_STATE(R_IRQ_MASK2_SET, dma1_eop, set); 572 573 *R_IRQ_MASK0_SET = 574 IO_STATE(R_IRQ_MASK0_SET, overrun, set) | 575 IO_STATE(R_IRQ_MASK0_SET, underrun, set) | 576 IO_STATE(R_IRQ_MASK0_SET, excessive_col, set); 577 578 /* make sure the irqs are cleared */ 579 580 *R_DMA_CH0_CLR_INTR = IO_STATE(R_DMA_CH0_CLR_INTR, clr_eop, do); 581 *R_DMA_CH1_CLR_INTR = IO_STATE(R_DMA_CH1_CLR_INTR, clr_eop, do); 582 583 /* make sure the rec and transmit error counters are cleared */ 584 585 (void)*R_REC_COUNTERS; /* dummy read */ 586 (void)*R_TR_COUNTERS; /* dummy read */ 587 588 /* start the receiving DMA channel so we can receive packets from now on */ 589 590 *R_DMA_CH1_FIRST = virt_to_phys(myNextRxDesc); 591 *R_DMA_CH1_CMD = IO_STATE(R_DMA_CH1_CMD, cmd, start); 592 593 /* Set up transmit DMA channel so it can be restarted later */ 594 595 *R_DMA_CH0_FIRST = 0; 596 *R_DMA_CH0_DESCR = virt_to_phys(myLastTxDesc); 597 netif_start_queue(dev); 598 599 local_irq_restore(flags); 600 601 /* Probe for transceiver */ 602 if (e100_probe_transceiver(dev)) 603 goto grace_exit5; 604 605 /* Start duplex/speed timers */ 606 add_timer(&speed_timer); 607 add_timer(&duplex_timer); 608 609 /* We are now ready to accept transmit requeusts from 610 * the queueing layer of the networking. 611 */ 612 netif_carrier_on(dev); 613 614 return 0; 615 616grace_exit5: 617 cris_free_dma(NETWORK_RX_DMA_NBR, cardname); 618grace_exit4: 619 cris_free_dma(NETWORK_TX_DMA_NBR, cardname); 620grace_exit3: 621 free_irq(NETWORK_STATUS_IRQ_NBR, (void *)dev); 622grace_exit2: 623 free_irq(NETWORK_DMA_TX_IRQ_NBR, (void *)dev); 624grace_exit1: 625 free_irq(NETWORK_DMA_RX_IRQ_NBR, (void *)dev); 626grace_exit0: 627 return -EAGAIN; 628} 629 630#if defined(CONFIG_ETRAX_NO_PHY) 631static void 632dummy_check_speed(struct net_device* dev) 633{ 634 current_speed = 100; 635} 636#else 637static void 638generic_check_speed(struct net_device* dev) 639{ 640 unsigned long data; 641 struct net_local *np = netdev_priv(dev); 642 643 data = e100_get_mdio_reg(dev, np->mii_if.phy_id, MII_ADVERTISE); 644 if ((data & ADVERTISE_100FULL) || 645 (data & ADVERTISE_100HALF)) 646 current_speed = 100; 647 else 648 current_speed = 10; 649} 650 651static void 652tdk_check_speed(struct net_device* dev) 653{ 654 unsigned long data; 655 struct net_local *np = netdev_priv(dev); 656 657 data = e100_get_mdio_reg(dev, np->mii_if.phy_id, 658 MDIO_TDK_DIAGNOSTIC_REG); 659 current_speed = (data & MDIO_TDK_DIAGNOSTIC_RATE ? 100 : 10); 660} 661 662static void 663broadcom_check_speed(struct net_device* dev) 664{ 665 unsigned long data; 666 struct net_local *np = netdev_priv(dev); 667 668 data = e100_get_mdio_reg(dev, np->mii_if.phy_id, 669 MDIO_AUX_CTRL_STATUS_REG); 670 current_speed = (data & MDIO_BC_SPEED ? 100 : 10); 671} 672 673static void 674intel_check_speed(struct net_device* dev) 675{ 676 unsigned long data; 677 struct net_local *np = netdev_priv(dev); 678 679 data = e100_get_mdio_reg(dev, np->mii_if.phy_id, 680 MDIO_INT_STATUS_REG_2); 681 current_speed = (data & MDIO_INT_SPEED ? 100 : 10); 682} 683#endif 684static void 685e100_check_speed(unsigned long priv) 686{ 687 struct net_device* dev = (struct net_device*)priv; 688 struct net_local *np = netdev_priv(dev); 689 static int led_initiated = 0; 690 unsigned long data; 691 int old_speed = current_speed; 692 693 spin_lock(&np->transceiver_lock); 694 695 data = e100_get_mdio_reg(dev, np->mii_if.phy_id, MII_BMSR); 696 if (!(data & BMSR_LSTATUS)) { 697 current_speed = 0; 698 } else { 699 transceiver->check_speed(dev); 700 } 701 702 spin_lock(&np->led_lock); 703 if ((old_speed != current_speed) || !led_initiated) { 704 led_initiated = 1; 705 e100_set_network_leds(NO_NETWORK_ACTIVITY); 706 if (current_speed) 707 netif_carrier_on(dev); 708 else 709 netif_carrier_off(dev); 710 } 711 spin_unlock(&np->led_lock); 712 713 /* Reinitialize the timer. */ 714 speed_timer.expires = jiffies + NET_LINK_UP_CHECK_INTERVAL; 715 add_timer(&speed_timer); 716 717 spin_unlock(&np->transceiver_lock); 718} 719 720static void 721e100_negotiate(struct net_device* dev) 722{ 723 struct net_local *np = netdev_priv(dev); 724 unsigned short data = e100_get_mdio_reg(dev, np->mii_if.phy_id, 725 MII_ADVERTISE); 726 727 /* Discard old speed and duplex settings */ 728 data &= ~(ADVERTISE_100HALF | ADVERTISE_100FULL | 729 ADVERTISE_10HALF | ADVERTISE_10FULL); 730 731 switch (current_speed_selection) { 732 case 10: 733 if (current_duplex == full) 734 data |= ADVERTISE_10FULL; 735 else if (current_duplex == half) 736 data |= ADVERTISE_10HALF; 737 else 738 data |= ADVERTISE_10HALF | ADVERTISE_10FULL; 739 break; 740 741 case 100: 742 if (current_duplex == full) 743 data |= ADVERTISE_100FULL; 744 else if (current_duplex == half) 745 data |= ADVERTISE_100HALF; 746 else 747 data |= ADVERTISE_100HALF | ADVERTISE_100FULL; 748 break; 749 750 case 0: /* Auto */ 751 if (current_duplex == full) 752 data |= ADVERTISE_100FULL | ADVERTISE_10FULL; 753 else if (current_duplex == half) 754 data |= ADVERTISE_100HALF | ADVERTISE_10HALF; 755 else 756 data |= ADVERTISE_10HALF | ADVERTISE_10FULL | 757 ADVERTISE_100HALF | ADVERTISE_100FULL; 758 break; 759 760 default: /* assume autoneg speed and duplex */ 761 data |= ADVERTISE_10HALF | ADVERTISE_10FULL | 762 ADVERTISE_100HALF | ADVERTISE_100FULL; 763 break; 764 } 765 766 e100_set_mdio_reg(dev, np->mii_if.phy_id, MII_ADVERTISE, data); 767 768 data = e100_get_mdio_reg(dev, np->mii_if.phy_id, MII_BMCR); 769 if (autoneg_normal) { 770 /* Renegotiate with link partner */ 771 data |= BMCR_ANENABLE | BMCR_ANRESTART; 772 } else { 773 /* Don't negotiate speed or duplex */ 774 data &= ~(BMCR_ANENABLE | BMCR_ANRESTART); 775 776 /* Set speed and duplex static */ 777 if (current_speed_selection == 10) 778 data &= ~BMCR_SPEED100; 779 else 780 data |= BMCR_SPEED100; 781 782 if (current_duplex != full) 783 data &= ~BMCR_FULLDPLX; 784 else 785 data |= BMCR_FULLDPLX; 786 } 787 e100_set_mdio_reg(dev, np->mii_if.phy_id, MII_BMCR, data); 788} 789 790static void 791e100_set_speed(struct net_device* dev, unsigned long speed) 792{ 793 struct net_local *np = netdev_priv(dev); 794 795 spin_lock(&np->transceiver_lock); 796 if (speed != current_speed_selection) { 797 current_speed_selection = speed; 798 e100_negotiate(dev); 799 } 800 spin_unlock(&np->transceiver_lock); 801} 802 803static void 804e100_check_duplex(unsigned long priv) 805{ 806 struct net_device *dev = (struct net_device *)priv; 807 struct net_local *np = netdev_priv(dev); 808 int old_duplex; 809 810 spin_lock(&np->transceiver_lock); 811 old_duplex = full_duplex; 812 transceiver->check_duplex(dev); 813 if (old_duplex != full_duplex) { 814 /* Duplex changed */ 815 SETF(network_rec_config_shadow, R_NETWORK_REC_CONFIG, duplex, full_duplex); 816 *R_NETWORK_REC_CONFIG = network_rec_config_shadow; 817 } 818 819 /* Reinitialize the timer. */ 820 duplex_timer.expires = jiffies + NET_DUPLEX_CHECK_INTERVAL; 821 add_timer(&duplex_timer); 822 np->mii_if.full_duplex = full_duplex; 823 spin_unlock(&np->transceiver_lock); 824} 825#if defined(CONFIG_ETRAX_NO_PHY) 826static void 827dummy_check_duplex(struct net_device* dev) 828{ 829 full_duplex = 1; 830} 831#else 832static void 833generic_check_duplex(struct net_device* dev) 834{ 835 unsigned long data; 836 struct net_local *np = netdev_priv(dev); 837 838 data = e100_get_mdio_reg(dev, np->mii_if.phy_id, MII_ADVERTISE); 839 if ((data & ADVERTISE_10FULL) || 840 (data & ADVERTISE_100FULL)) 841 full_duplex = 1; 842 else 843 full_duplex = 0; 844} 845 846static void 847tdk_check_duplex(struct net_device* dev) 848{ 849 unsigned long data; 850 struct net_local *np = netdev_priv(dev); 851 852 data = e100_get_mdio_reg(dev, np->mii_if.phy_id, 853 MDIO_TDK_DIAGNOSTIC_REG); 854 full_duplex = (data & MDIO_TDK_DIAGNOSTIC_DPLX) ? 1 : 0; 855} 856 857static void 858broadcom_check_duplex(struct net_device* dev) 859{ 860 unsigned long data; 861 struct net_local *np = netdev_priv(dev); 862 863 data = e100_get_mdio_reg(dev, np->mii_if.phy_id, 864 MDIO_AUX_CTRL_STATUS_REG); 865 full_duplex = (data & MDIO_BC_FULL_DUPLEX_IND) ? 1 : 0; 866} 867 868static void 869intel_check_duplex(struct net_device* dev) 870{ 871 unsigned long data; 872 struct net_local *np = netdev_priv(dev); 873 874 data = e100_get_mdio_reg(dev, np->mii_if.phy_id, 875 MDIO_INT_STATUS_REG_2); 876 full_duplex = (data & MDIO_INT_FULL_DUPLEX_IND) ? 1 : 0; 877} 878#endif 879static void 880e100_set_duplex(struct net_device* dev, enum duplex new_duplex) 881{ 882 struct net_local *np = netdev_priv(dev); 883 884 spin_lock(&np->transceiver_lock); 885 if (new_duplex != current_duplex) { 886 current_duplex = new_duplex; 887 e100_negotiate(dev); 888 } 889 spin_unlock(&np->transceiver_lock); 890} 891 892static int 893e100_probe_transceiver(struct net_device* dev) 894{ 895 int ret = 0; 896 897#if !defined(CONFIG_ETRAX_NO_PHY) 898 unsigned int phyid_high; 899 unsigned int phyid_low; 900 unsigned int oui; 901 struct transceiver_ops* ops = NULL; 902 struct net_local *np = netdev_priv(dev); 903 904 spin_lock(&np->transceiver_lock); 905 906 /* Probe MDIO physical address */ 907 for (np->mii_if.phy_id = 0; np->mii_if.phy_id <= 31; 908 np->mii_if.phy_id++) { 909 if (e100_get_mdio_reg(dev, 910 np->mii_if.phy_id, MII_BMSR) != 0xffff) 911 break; 912 } 913 if (np->mii_if.phy_id == 32) { 914 ret = -ENODEV; 915 goto out; 916 } 917 918 /* Get manufacturer */ 919 phyid_high = e100_get_mdio_reg(dev, np->mii_if.phy_id, MII_PHYSID1); 920 phyid_low = e100_get_mdio_reg(dev, np->mii_if.phy_id, MII_PHYSID2); 921 oui = (phyid_high << 6) | (phyid_low >> 10); 922 923 for (ops = &transceivers[0]; ops->oui; ops++) { 924 if (ops->oui == oui) 925 break; 926 } 927 transceiver = ops; 928out: 929 spin_unlock(&np->transceiver_lock); 930#endif 931 return ret; 932} 933 934static int 935e100_get_mdio_reg(struct net_device *dev, int phy_id, int location) 936{ 937 unsigned short cmd; /* Data to be sent on MDIO port */ 938 int data; /* Data read from MDIO */ 939 int bitCounter; 940 941 /* Start of frame, OP Code, Physical Address, Register Address */ 942 cmd = (MDIO_START << 14) | (MDIO_READ << 12) | (phy_id << 7) | 943 (location << 2); 944 945 e100_send_mdio_cmd(cmd, 0); 946 947 data = 0; 948 949 /* Data... */ 950 for (bitCounter=15; bitCounter>=0 ; bitCounter--) { 951 data |= (e100_receive_mdio_bit() << bitCounter); 952 } 953 954 return data; 955} 956 957static void 958e100_set_mdio_reg(struct net_device *dev, int phy_id, int location, int value) 959{ 960 int bitCounter; 961 unsigned short cmd; 962 963 cmd = (MDIO_START << 14) | (MDIO_WRITE << 12) | (phy_id << 7) | 964 (location << 2); 965 966 e100_send_mdio_cmd(cmd, 1); 967 968 /* Data... */ 969 for (bitCounter=15; bitCounter>=0 ; bitCounter--) { 970 e100_send_mdio_bit(GET_BIT(bitCounter, value)); 971 } 972 973} 974 975static void 976e100_send_mdio_cmd(unsigned short cmd, int write_cmd) 977{ 978 int bitCounter; 979 unsigned char data = 0x2; 980 981 /* Preamble */ 982 for (bitCounter = 31; bitCounter>= 0; bitCounter--) 983 e100_send_mdio_bit(GET_BIT(bitCounter, MDIO_PREAMBLE)); 984 985 for (bitCounter = 15; bitCounter >= 2; bitCounter--) 986 e100_send_mdio_bit(GET_BIT(bitCounter, cmd)); 987 988 /* Turnaround */ 989 for (bitCounter = 1; bitCounter >= 0 ; bitCounter--) 990 if (write_cmd) 991 e100_send_mdio_bit(GET_BIT(bitCounter, data)); 992 else 993 e100_receive_mdio_bit(); 994} 995 996static void 997e100_send_mdio_bit(unsigned char bit) 998{ 999 *R_NETWORK_MGM_CTRL = 1000 IO_STATE(R_NETWORK_MGM_CTRL, mdoe, enable) | 1001 IO_FIELD(R_NETWORK_MGM_CTRL, mdio, bit); 1002 udelay(1); 1003 *R_NETWORK_MGM_CTRL = 1004 IO_STATE(R_NETWORK_MGM_CTRL, mdoe, enable) | 1005 IO_MASK(R_NETWORK_MGM_CTRL, mdck) | 1006 IO_FIELD(R_NETWORK_MGM_CTRL, mdio, bit); 1007 udelay(1); 1008} 1009 1010static unsigned char 1011e100_receive_mdio_bit(void) 1012{ 1013 unsigned char bit; 1014 *R_NETWORK_MGM_CTRL = 0; 1015 bit = IO_EXTRACT(R_NETWORK_STAT, mdio, *R_NETWORK_STAT); 1016 udelay(1); 1017 *R_NETWORK_MGM_CTRL = IO_MASK(R_NETWORK_MGM_CTRL, mdck); 1018 udelay(1); 1019 return bit; 1020} 1021 1022static void 1023e100_reset_transceiver(struct net_device* dev) 1024{ 1025 struct net_local *np = netdev_priv(dev); 1026 unsigned short cmd; 1027 unsigned short data; 1028 int bitCounter; 1029 1030 data = e100_get_mdio_reg(dev, np->mii_if.phy_id, MII_BMCR); 1031 1032 cmd = (MDIO_START << 14) | (MDIO_WRITE << 12) | (np->mii_if.phy_id << 7) | (MII_BMCR << 2); 1033 1034 e100_send_mdio_cmd(cmd, 1); 1035 1036 data |= 0x8000; 1037 1038 for (bitCounter = 15; bitCounter >= 0 ; bitCounter--) { 1039 e100_send_mdio_bit(GET_BIT(bitCounter, data)); 1040 } 1041} 1042 1043/* Called by upper layers if they decide it took too long to complete 1044 * sending a packet - we need to reset and stuff. 1045 */ 1046 1047static void 1048e100_tx_timeout(struct net_device *dev) 1049{ 1050 struct net_local *np = netdev_priv(dev); 1051 unsigned long flags; 1052 1053 spin_lock_irqsave(&np->lock, flags); 1054 1055 printk(KERN_WARNING "%s: transmit timed out, %s?\n", dev->name, 1056 tx_done(dev) ? "IRQ problem" : "network cable problem"); 1057 1058 /* remember we got an error */ 1059 1060 dev->stats.tx_errors++; 1061 1062 /* reset the TX DMA in case it has hung on something */ 1063 1064 RESET_DMA(NETWORK_TX_DMA_NBR); 1065 WAIT_DMA(NETWORK_TX_DMA_NBR); 1066 1067 /* Reset the transceiver. */ 1068 1069 e100_reset_transceiver(dev); 1070 1071 /* and get rid of the packets that never got an interrupt */ 1072 while (myFirstTxDesc != myNextTxDesc) { 1073 dev_kfree_skb(myFirstTxDesc->skb); 1074 myFirstTxDesc->skb = 0; 1075 myFirstTxDesc = phys_to_virt(myFirstTxDesc->descr.next); 1076 } 1077 1078 /* Set up transmit DMA channel so it can be restarted later */ 1079 *R_DMA_CH0_FIRST = 0; 1080 *R_DMA_CH0_DESCR = virt_to_phys(myLastTxDesc); 1081 1082 /* tell the upper layers we're ok again */ 1083 1084 netif_wake_queue(dev); 1085 spin_unlock_irqrestore(&np->lock, flags); 1086} 1087 1088 1089/* This will only be invoked if the driver is _not_ in XOFF state. 1090 * What this means is that we need not check it, and that this 1091 * invariant will hold if we make sure that the netif_*_queue() 1092 * calls are done at the proper times. 1093 */ 1094 1095static int 1096e100_send_packet(struct sk_buff *skb, struct net_device *dev) 1097{ 1098 struct net_local *np = netdev_priv(dev); 1099 unsigned char *buf = skb->data; 1100 unsigned long flags; 1101 1102#ifdef ETHDEBUG 1103 printk("send packet len %d\n", length); 1104#endif 1105 spin_lock_irqsave(&np->lock, flags); /* protect from tx_interrupt and ourself */ 1106 1107 myNextTxDesc->skb = skb; 1108 1109 dev->trans_start = jiffies; /* NETIF_F_LLTX driver :( */ 1110 1111 e100_hardware_send_packet(np, buf, skb->len); 1112 1113 myNextTxDesc = phys_to_virt(myNextTxDesc->descr.next); 1114 1115 /* Stop queue if full */ 1116 if (myNextTxDesc == myFirstTxDesc) { 1117 netif_stop_queue(dev); 1118 } 1119 1120 spin_unlock_irqrestore(&np->lock, flags); 1121 1122 return NETDEV_TX_OK; 1123} 1124 1125/* 1126 * The typical workload of the driver: 1127 * Handle the network interface interrupts. 1128 */ 1129 1130static irqreturn_t 1131e100rxtx_interrupt(int irq, void *dev_id) 1132{ 1133 struct net_device *dev = (struct net_device *)dev_id; 1134 unsigned long irqbits; 1135 1136 /* 1137 * Note that both rx and tx interrupts are blocked at this point, 1138 * regardless of which got us here. 1139 */ 1140 1141 irqbits = *R_IRQ_MASK2_RD; 1142 1143 /* Handle received packets */ 1144 if (irqbits & IO_STATE(R_IRQ_MASK2_RD, dma1_eop, active)) { 1145 /* acknowledge the eop interrupt */ 1146 1147 *R_DMA_CH1_CLR_INTR = IO_STATE(R_DMA_CH1_CLR_INTR, clr_eop, do); 1148 1149 /* check if one or more complete packets were indeed received */ 1150 1151 while ((*R_DMA_CH1_FIRST != virt_to_phys(myNextRxDesc)) && 1152 (myNextRxDesc != myLastRxDesc)) { 1153 /* Take out the buffer and give it to the OS, then 1154 * allocate a new buffer to put a packet in. 1155 */ 1156 e100_rx(dev); 1157 dev->stats.rx_packets++; 1158 /* restart/continue on the channel, for safety */ 1159 *R_DMA_CH1_CMD = IO_STATE(R_DMA_CH1_CMD, cmd, restart); 1160 /* clear dma channel 1 eop/descr irq bits */ 1161 *R_DMA_CH1_CLR_INTR = 1162 IO_STATE(R_DMA_CH1_CLR_INTR, clr_eop, do) | 1163 IO_STATE(R_DMA_CH1_CLR_INTR, clr_descr, do); 1164 1165 /* now, we might have gotten another packet 1166 so we have to loop back and check if so */ 1167 } 1168 } 1169 1170 /* Report any packets that have been sent */ 1171 while (virt_to_phys(myFirstTxDesc) != *R_DMA_CH0_FIRST && 1172 (netif_queue_stopped(dev) || myFirstTxDesc != myNextTxDesc)) { 1173 dev->stats.tx_bytes += myFirstTxDesc->skb->len; 1174 dev->stats.tx_packets++; 1175 1176 /* dma is ready with the transmission of the data in tx_skb, so now 1177 we can release the skb memory */ 1178 dev_kfree_skb_irq(myFirstTxDesc->skb); 1179 myFirstTxDesc->skb = 0; 1180 myFirstTxDesc = phys_to_virt(myFirstTxDesc->descr.next); 1181 /* Wake up queue. */ 1182 netif_wake_queue(dev); 1183 } 1184 1185 if (irqbits & IO_STATE(R_IRQ_MASK2_RD, dma0_eop, active)) { 1186 /* acknowledge the eop interrupt. */ 1187 *R_DMA_CH0_CLR_INTR = IO_STATE(R_DMA_CH0_CLR_INTR, clr_eop, do); 1188 } 1189 1190 return IRQ_HANDLED; 1191} 1192 1193static irqreturn_t 1194e100nw_interrupt(int irq, void *dev_id) 1195{ 1196 struct net_device *dev = (struct net_device *)dev_id; 1197 unsigned long irqbits = *R_IRQ_MASK0_RD; 1198 1199 /* check for underrun irq */ 1200 if (irqbits & IO_STATE(R_IRQ_MASK0_RD, underrun, active)) { 1201 SETS(network_tr_ctrl_shadow, R_NETWORK_TR_CTRL, clr_error, clr); 1202 *R_NETWORK_TR_CTRL = network_tr_ctrl_shadow; 1203 SETS(network_tr_ctrl_shadow, R_NETWORK_TR_CTRL, clr_error, nop); 1204 dev->stats.tx_errors++; 1205 D(printk("ethernet receiver underrun!\n")); 1206 } 1207 1208 /* check for overrun irq */ 1209 if (irqbits & IO_STATE(R_IRQ_MASK0_RD, overrun, active)) { 1210 update_rx_stats(&dev->stats); /* this will ack the irq */ 1211 D(printk("ethernet receiver overrun!\n")); 1212 } 1213 /* check for excessive collision irq */ 1214 if (irqbits & IO_STATE(R_IRQ_MASK0_RD, excessive_col, active)) { 1215 SETS(network_tr_ctrl_shadow, R_NETWORK_TR_CTRL, clr_error, clr); 1216 *R_NETWORK_TR_CTRL = network_tr_ctrl_shadow; 1217 SETS(network_tr_ctrl_shadow, R_NETWORK_TR_CTRL, clr_error, nop); 1218 dev->stats.tx_errors++; 1219 D(printk("ethernet excessive collisions!\n")); 1220 } 1221 return IRQ_HANDLED; 1222} 1223 1224/* We have a good packet(s), get it/them out of the buffers. */ 1225static void 1226e100_rx(struct net_device *dev) 1227{ 1228 struct sk_buff *skb; 1229 int length = 0; 1230 struct net_local *np = netdev_priv(dev); 1231 unsigned char *skb_data_ptr; 1232#ifdef ETHDEBUG 1233 int i; 1234#endif 1235 etrax_eth_descr *prevRxDesc; /* The descriptor right before myNextRxDesc */ 1236 spin_lock(&np->led_lock); 1237 if (!led_active && time_after(jiffies, led_next_time)) { 1238 /* light the network leds depending on the current speed. */ 1239 e100_set_network_leds(NETWORK_ACTIVITY); 1240 1241 /* Set the earliest time we may clear the LED */ 1242 led_next_time = jiffies + NET_FLASH_TIME; 1243 led_active = 1; 1244 mod_timer(&clear_led_timer, jiffies + HZ/10); 1245 } 1246 spin_unlock(&np->led_lock); 1247 1248 length = myNextRxDesc->descr.hw_len - 4; 1249 dev->stats.rx_bytes += length; 1250 1251#ifdef ETHDEBUG 1252 printk("Got a packet of length %d:\n", length); 1253 /* dump the first bytes in the packet */ 1254 skb_data_ptr = (unsigned char *)phys_to_virt(myNextRxDesc->descr.buf); 1255 for (i = 0; i < 8; i++) { 1256 printk("%d: %.2x %.2x %.2x %.2x %.2x %.2x %.2x %.2x\n", i * 8, 1257 skb_data_ptr[0],skb_data_ptr[1],skb_data_ptr[2],skb_data_ptr[3], 1258 skb_data_ptr[4],skb_data_ptr[5],skb_data_ptr[6],skb_data_ptr[7]); 1259 skb_data_ptr += 8; 1260 } 1261#endif 1262 1263 if (length < RX_COPYBREAK) { 1264 /* Small packet, copy data */ 1265 skb = dev_alloc_skb(length - ETHER_HEAD_LEN); 1266 if (!skb) { 1267 dev->stats.rx_errors++; 1268 printk(KERN_NOTICE "%s: Memory squeeze, dropping packet.\n", dev->name); 1269 goto update_nextrxdesc; 1270 } 1271 1272 skb_put(skb, length - ETHER_HEAD_LEN); /* allocate room for the packet body */ 1273 skb_data_ptr = skb_push(skb, ETHER_HEAD_LEN); /* allocate room for the header */ 1274 1275#ifdef ETHDEBUG 1276 printk("head = 0x%x, data = 0x%x, tail = 0x%x, end = 0x%x\n", 1277 skb->head, skb->data, skb_tail_pointer(skb), 1278 skb_end_pointer(skb)); 1279 printk("copying packet to 0x%x.\n", skb_data_ptr); 1280#endif 1281 1282 memcpy(skb_data_ptr, phys_to_virt(myNextRxDesc->descr.buf), length); 1283 } 1284 else { 1285 /* Large packet, send directly to upper layers and allocate new 1286 * memory (aligned to cache line boundary to avoid bug). 1287 * Before sending the skb to upper layers we must make sure 1288 * that skb->data points to the aligned start of the packet. 1289 */ 1290 int align; 1291 struct sk_buff *new_skb = dev_alloc_skb(MAX_MEDIA_DATA_SIZE + 2 * L1_CACHE_BYTES); 1292 if (!new_skb) { 1293 dev->stats.rx_errors++; 1294 printk(KERN_NOTICE "%s: Memory squeeze, dropping packet.\n", dev->name); 1295 goto update_nextrxdesc; 1296 } 1297 skb = myNextRxDesc->skb; 1298 align = (int)phys_to_virt(myNextRxDesc->descr.buf) - (int)skb->data; 1299 skb_put(skb, length + align); 1300 skb_pull(skb, align); /* Remove alignment bytes */ 1301 myNextRxDesc->skb = new_skb; 1302 myNextRxDesc->descr.buf = L1_CACHE_ALIGN(virt_to_phys(myNextRxDesc->skb->data)); 1303 } 1304 1305 skb->protocol = eth_type_trans(skb, dev); 1306 1307 /* Send the packet to the upper layers */ 1308 netif_rx(skb); 1309 1310 update_nextrxdesc: 1311 /* Prepare for next packet */ 1312 myNextRxDesc->descr.status = 0; 1313 prevRxDesc = myNextRxDesc; 1314 myNextRxDesc = phys_to_virt(myNextRxDesc->descr.next); 1315 1316 rx_queue_len++; 1317 1318 /* Check if descriptors should be returned */ 1319 if (rx_queue_len == RX_QUEUE_THRESHOLD) { 1320 flush_etrax_cache(); 1321 prevRxDesc->descr.ctrl |= d_eol; 1322 myLastRxDesc->descr.ctrl &= ~d_eol; 1323 myLastRxDesc = prevRxDesc; 1324 rx_queue_len = 0; 1325 } 1326} 1327 1328/* The inverse routine to net_open(). */ 1329static int 1330e100_close(struct net_device *dev) 1331{ 1332 printk(KERN_INFO "Closing %s.\n", dev->name); 1333 1334 netif_stop_queue(dev); 1335 1336 *R_IRQ_MASK0_CLR = 1337 IO_STATE(R_IRQ_MASK0_CLR, overrun, clr) | 1338 IO_STATE(R_IRQ_MASK0_CLR, underrun, clr) | 1339 IO_STATE(R_IRQ_MASK0_CLR, excessive_col, clr); 1340 1341 *R_IRQ_MASK2_CLR = 1342 IO_STATE(R_IRQ_MASK2_CLR, dma0_descr, clr) | 1343 IO_STATE(R_IRQ_MASK2_CLR, dma0_eop, clr) | 1344 IO_STATE(R_IRQ_MASK2_CLR, dma1_descr, clr) | 1345 IO_STATE(R_IRQ_MASK2_CLR, dma1_eop, clr); 1346 1347 /* Stop the receiver and the transmitter */ 1348 1349 RESET_DMA(NETWORK_TX_DMA_NBR); 1350 RESET_DMA(NETWORK_RX_DMA_NBR); 1351 1352 /* Flush the Tx and disable Rx here. */ 1353 1354 free_irq(NETWORK_DMA_RX_IRQ_NBR, (void *)dev); 1355 free_irq(NETWORK_DMA_TX_IRQ_NBR, (void *)dev); 1356 free_irq(NETWORK_STATUS_IRQ_NBR, (void *)dev); 1357 1358 cris_free_dma(NETWORK_TX_DMA_NBR, cardname); 1359 cris_free_dma(NETWORK_RX_DMA_NBR, cardname); 1360 1361 /* Update the statistics here. */ 1362 1363 update_rx_stats(&dev->stats); 1364 update_tx_stats(&dev->stats); 1365 1366 /* Stop speed/duplex timers */ 1367 del_timer(&speed_timer); 1368 del_timer(&duplex_timer); 1369 1370 return 0; 1371} 1372 1373static int 1374e100_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd) 1375{ 1376 struct mii_ioctl_data *data = if_mii(ifr); 1377 struct net_local *np = netdev_priv(dev); 1378 int rc = 0; 1379 int old_autoneg; 1380 1381 spin_lock(&np->lock); /* Preempt protection */ 1382 switch (cmd) { 1383 /* The ioctls below should be considered obsolete but are */ 1384 /* still present for compatibility with old scripts/apps */ 1385 case SET_ETH_SPEED_10: /* 10 Mbps */ 1386 e100_set_speed(dev, 10); 1387 break; 1388 case SET_ETH_SPEED_100: /* 100 Mbps */ 1389 e100_set_speed(dev, 100); 1390 break; 1391 case SET_ETH_SPEED_AUTO: /* Auto-negotiate speed */ 1392 e100_set_speed(dev, 0); 1393 break; 1394 case SET_ETH_DUPLEX_HALF: /* Half duplex */ 1395 e100_set_duplex(dev, half); 1396 break; 1397 case SET_ETH_DUPLEX_FULL: /* Full duplex */ 1398 e100_set_duplex(dev, full); 1399 break; 1400 case SET_ETH_DUPLEX_AUTO: /* Auto-negotiate duplex */ 1401 e100_set_duplex(dev, autoneg); 1402 break; 1403 case SET_ETH_AUTONEG: 1404 old_autoneg = autoneg_normal; 1405 autoneg_normal = *(int*)data; 1406 if (autoneg_normal != old_autoneg) 1407 e100_negotiate(dev); 1408 break; 1409 default: 1410 rc = generic_mii_ioctl(&np->mii_if, if_mii(ifr), 1411 cmd, NULL); 1412 break; 1413 } 1414 spin_unlock(&np->lock); 1415 return rc; 1416} 1417 1418static int e100_get_settings(struct net_device *dev, 1419 struct ethtool_cmd *cmd) 1420{ 1421 struct net_local *np = netdev_priv(dev); 1422 int err; 1423 1424 spin_lock_irq(&np->lock); 1425 err = mii_ethtool_gset(&np->mii_if, cmd); 1426 spin_unlock_irq(&np->lock); 1427 1428 /* The PHY may support 1000baseT, but the Etrax100 does not. */ 1429 cmd->supported &= ~(SUPPORTED_1000baseT_Half 1430 | SUPPORTED_1000baseT_Full); 1431 return err; 1432} 1433 1434static int e100_set_settings(struct net_device *dev, 1435 struct ethtool_cmd *ecmd) 1436{ 1437 if (ecmd->autoneg == AUTONEG_ENABLE) { 1438 e100_set_duplex(dev, autoneg); 1439 e100_set_speed(dev, 0); 1440 } else { 1441 e100_set_duplex(dev, ecmd->duplex == DUPLEX_HALF ? half : full); 1442 e100_set_speed(dev, ecmd->speed == SPEED_10 ? 10: 100); 1443 } 1444 1445 return 0; 1446} 1447 1448static void e100_get_drvinfo(struct net_device *dev, 1449 struct ethtool_drvinfo *info) 1450{ 1451 strlcpy(info->driver, "ETRAX 100LX", sizeof(info->driver)); 1452 strlcpy(info->version, "$Revision: 1.31 $", sizeof(info->version)); 1453 strlcpy(info->fw_version, "N/A", sizeof(info->fw_version)); 1454 strlcpy(info->bus_info, "N/A", sizeof(info->bus_info)); 1455} 1456 1457static int e100_nway_reset(struct net_device *dev) 1458{ 1459 if (current_duplex == autoneg && current_speed_selection == 0) 1460 e100_negotiate(dev); 1461 return 0; 1462} 1463 1464static const struct ethtool_ops e100_ethtool_ops = { 1465 .get_settings = e100_get_settings, 1466 .set_settings = e100_set_settings, 1467 .get_drvinfo = e100_get_drvinfo, 1468 .nway_reset = e100_nway_reset, 1469 .get_link = ethtool_op_get_link, 1470}; 1471 1472static int 1473e100_set_config(struct net_device *dev, struct ifmap *map) 1474{ 1475 struct net_local *np = netdev_priv(dev); 1476 1477 spin_lock(&np->lock); /* Preempt protection */ 1478 1479 switch(map->port) { 1480 case IF_PORT_UNKNOWN: 1481 /* Use autoneg */ 1482 e100_set_speed(dev, 0); 1483 e100_set_duplex(dev, autoneg); 1484 break; 1485 case IF_PORT_10BASET: 1486 e100_set_speed(dev, 10); 1487 e100_set_duplex(dev, autoneg); 1488 break; 1489 case IF_PORT_100BASET: 1490 case IF_PORT_100BASETX: 1491 e100_set_speed(dev, 100); 1492 e100_set_duplex(dev, autoneg); 1493 break; 1494 case IF_PORT_100BASEFX: 1495 case IF_PORT_10BASE2: 1496 case IF_PORT_AUI: 1497 spin_unlock(&np->lock); 1498 return -EOPNOTSUPP; 1499 default: 1500 printk(KERN_ERR "%s: Invalid media selected", dev->name); 1501 spin_unlock(&np->lock); 1502 return -EINVAL; 1503 } 1504 spin_unlock(&np->lock); 1505 return 0; 1506} 1507 1508static void 1509update_rx_stats(struct net_device_stats *es) 1510{ 1511 unsigned long r = *R_REC_COUNTERS; 1512 /* update stats relevant to reception errors */ 1513 es->rx_fifo_errors += IO_EXTRACT(R_REC_COUNTERS, congestion, r); 1514 es->rx_crc_errors += IO_EXTRACT(R_REC_COUNTERS, crc_error, r); 1515 es->rx_frame_errors += IO_EXTRACT(R_REC_COUNTERS, alignment_error, r); 1516 es->rx_length_errors += IO_EXTRACT(R_REC_COUNTERS, oversize, r); 1517} 1518 1519static void 1520update_tx_stats(struct net_device_stats *es) 1521{ 1522 unsigned long r = *R_TR_COUNTERS; 1523 /* update stats relevant to transmission errors */ 1524 es->collisions += 1525 IO_EXTRACT(R_TR_COUNTERS, single_col, r) + 1526 IO_EXTRACT(R_TR_COUNTERS, multiple_col, r); 1527} 1528 1529/* 1530 * Get the current statistics. 1531 * This may be called with the card open or closed. 1532 */ 1533static struct net_device_stats * 1534e100_get_stats(struct net_device *dev) 1535{ 1536 struct net_local *lp = netdev_priv(dev); 1537 unsigned long flags; 1538 1539 spin_lock_irqsave(&lp->lock, flags); 1540 1541 update_rx_stats(&dev->stats); 1542 update_tx_stats(&dev->stats); 1543 1544 spin_unlock_irqrestore(&lp->lock, flags); 1545 return &dev->stats; 1546} 1547 1548/* 1549 * Set or clear the multicast filter for this adaptor. 1550 * num_addrs == -1 Promiscuous mode, receive all packets 1551 * num_addrs == 0 Normal mode, clear multicast list 1552 * num_addrs > 0 Multicast mode, receive normal and MC packets, 1553 * and do best-effort filtering. 1554 */ 1555static void 1556set_multicast_list(struct net_device *dev) 1557{ 1558 struct net_local *lp = netdev_priv(dev); 1559 int num_addr = netdev_mc_count(dev); 1560 unsigned long int lo_bits; 1561 unsigned long int hi_bits; 1562 1563 spin_lock(&lp->lock); 1564 if (dev->flags & IFF_PROMISC) { 1565 /* promiscuous mode */ 1566 lo_bits = 0xfffffffful; 1567 hi_bits = 0xfffffffful; 1568 1569 /* Enable individual receive */ 1570 SETS(network_rec_config_shadow, R_NETWORK_REC_CONFIG, individual, receive); 1571 *R_NETWORK_REC_CONFIG = network_rec_config_shadow; 1572 } else if (dev->flags & IFF_ALLMULTI) { 1573 /* enable all multicasts */ 1574 lo_bits = 0xfffffffful; 1575 hi_bits = 0xfffffffful; 1576 1577 /* Disable individual receive */ 1578 SETS(network_rec_config_shadow, R_NETWORK_REC_CONFIG, individual, discard); 1579 *R_NETWORK_REC_CONFIG = network_rec_config_shadow; 1580 } else if (num_addr == 0) { 1581 /* Normal, clear the mc list */ 1582 lo_bits = 0x00000000ul; 1583 hi_bits = 0x00000000ul; 1584 1585 /* Disable individual receive */ 1586 SETS(network_rec_config_shadow, R_NETWORK_REC_CONFIG, individual, discard); 1587 *R_NETWORK_REC_CONFIG = network_rec_config_shadow; 1588 } else { 1589 /* MC mode, receive normal and MC packets */ 1590 char hash_ix; 1591 struct netdev_hw_addr *ha; 1592 char *baddr; 1593 1594 lo_bits = 0x00000000ul; 1595 hi_bits = 0x00000000ul; 1596 netdev_for_each_mc_addr(ha, dev) { 1597 /* Calculate the hash index for the GA registers */ 1598 1599 hash_ix = 0; 1600 baddr = ha->addr; 1601 hash_ix ^= (*baddr) & 0x3f; 1602 hash_ix ^= ((*baddr) >> 6) & 0x03; 1603 ++baddr; 1604 hash_ix ^= ((*baddr) << 2) & 0x03c; 1605 hash_ix ^= ((*baddr) >> 4) & 0xf; 1606 ++baddr; 1607 hash_ix ^= ((*baddr) << 4) & 0x30; 1608 hash_ix ^= ((*baddr) >> 2) & 0x3f; 1609 ++baddr; 1610 hash_ix ^= (*baddr) & 0x3f; 1611 hash_ix ^= ((*baddr) >> 6) & 0x03; 1612 ++baddr; 1613 hash_ix ^= ((*baddr) << 2) & 0x03c; 1614 hash_ix ^= ((*baddr) >> 4) & 0xf; 1615 ++baddr; 1616 hash_ix ^= ((*baddr) << 4) & 0x30; 1617 hash_ix ^= ((*baddr) >> 2) & 0x3f; 1618 1619 hash_ix &= 0x3f; 1620 1621 if (hash_ix >= 32) { 1622 hi_bits |= (1 << (hash_ix-32)); 1623 } else { 1624 lo_bits |= (1 << hash_ix); 1625 } 1626 } 1627 /* Disable individual receive */ 1628 SETS(network_rec_config_shadow, R_NETWORK_REC_CONFIG, individual, discard); 1629 *R_NETWORK_REC_CONFIG = network_rec_config_shadow; 1630 } 1631 *R_NETWORK_GA_0 = lo_bits; 1632 *R_NETWORK_GA_1 = hi_bits; 1633 spin_unlock(&lp->lock); 1634} 1635 1636void 1637e100_hardware_send_packet(struct net_local *np, char *buf, int length) 1638{ 1639 D(printk("e100 send pack, buf 0x%x len %d\n", buf, length)); 1640 1641 spin_lock(&np->led_lock); 1642 if (!led_active && time_after(jiffies, led_next_time)) { 1643 /* light the network leds depending on the current speed. */ 1644 e100_set_network_leds(NETWORK_ACTIVITY); 1645 1646 /* Set the earliest time we may clear the LED */ 1647 led_next_time = jiffies + NET_FLASH_TIME; 1648 led_active = 1; 1649 mod_timer(&clear_led_timer, jiffies + HZ/10); 1650 } 1651 spin_unlock(&np->led_lock); 1652 1653 /* configure the tx dma descriptor */ 1654 myNextTxDesc->descr.sw_len = length; 1655 myNextTxDesc->descr.ctrl = d_eop | d_eol | d_wait; 1656 myNextTxDesc->descr.buf = virt_to_phys(buf); 1657 1658 /* Move end of list */ 1659 myLastTxDesc->descr.ctrl &= ~d_eol; 1660 myLastTxDesc = myNextTxDesc; 1661 1662 /* Restart DMA channel */ 1663 *R_DMA_CH0_CMD = IO_STATE(R_DMA_CH0_CMD, cmd, restart); 1664} 1665 1666static void 1667e100_clear_network_leds(unsigned long dummy) 1668{ 1669 struct net_device *dev = (struct net_device *)dummy; 1670 struct net_local *np = netdev_priv(dev); 1671 1672 spin_lock(&np->led_lock); 1673 1674 if (led_active && time_after(jiffies, led_next_time)) { 1675 e100_set_network_leds(NO_NETWORK_ACTIVITY); 1676 1677 /* Set the earliest time we may set the LED */ 1678 led_next_time = jiffies + NET_FLASH_PAUSE; 1679 led_active = 0; 1680 } 1681 1682 spin_unlock(&np->led_lock); 1683} 1684 1685static void 1686e100_set_network_leds(int active) 1687{ 1688#if defined(CONFIG_ETRAX_NETWORK_LED_ON_WHEN_LINK) 1689 int light_leds = (active == NO_NETWORK_ACTIVITY); 1690#elif defined(CONFIG_ETRAX_NETWORK_LED_ON_WHEN_ACTIVITY) 1691 int light_leds = (active == NETWORK_ACTIVITY); 1692#else 1693#error "Define either CONFIG_ETRAX_NETWORK_LED_ON_WHEN_LINK or CONFIG_ETRAX_NETWORK_LED_ON_WHEN_ACTIVITY" 1694#endif 1695 1696 if (!current_speed) { 1697 /* Make LED red, link is down */ 1698 CRIS_LED_NETWORK_SET(CRIS_LED_OFF); 1699 } else if (light_leds) { 1700 if (current_speed == 10) { 1701 CRIS_LED_NETWORK_SET(CRIS_LED_ORANGE); 1702 } else { 1703 CRIS_LED_NETWORK_SET(CRIS_LED_GREEN); 1704 } 1705 } else { 1706 CRIS_LED_NETWORK_SET(CRIS_LED_OFF); 1707 } 1708} 1709 1710#ifdef CONFIG_NET_POLL_CONTROLLER 1711static void 1712e100_netpoll(struct net_device* netdev) 1713{ 1714 e100rxtx_interrupt(NETWORK_DMA_TX_IRQ_NBR, netdev); 1715} 1716#endif 1717 1718static int 1719etrax_init_module(void) 1720{ 1721 return etrax_ethernet_init(); 1722} 1723 1724static int __init 1725e100_boot_setup(char* str) 1726{ 1727 struct sockaddr sa = {0}; 1728 int i; 1729 1730 /* Parse the colon separated Ethernet station address */ 1731 for (i = 0; i < ETH_ALEN; i++) { 1732 unsigned int tmp; 1733 if (sscanf(str + 3*i, "%2x", &tmp) != 1) { 1734 printk(KERN_WARNING "Malformed station address"); 1735 return 0; 1736 } 1737 sa.sa_data[i] = (char)tmp; 1738 } 1739 1740 default_mac = sa; 1741 return 1; 1742} 1743 1744__setup("etrax100_eth=", e100_boot_setup); 1745 1746module_init(etrax_init_module); 1747