1/*
2 *
3 * Intel Management Engine Interface (Intel MEI) Linux driver
4 * Copyright (c) 2013-2014, Intel Corporation.
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms and conditions of the GNU General Public License,
8 * version 2, as published by the Free Software Foundation.
9 *
10 * This program is distributed in the hope it will be useful, but WITHOUT
11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
13 * more details.
14 *
15 */
16
17#ifndef _MEI_HW_TXE_H_
18#define _MEI_HW_TXE_H_
19
20#include <linux/irqreturn.h>
21
22#include "hw.h"
23#include "hw-txe-regs.h"
24
25#define MEI_TXI_RPM_TIMEOUT    500 /* ms */
26
27/* Flatten Hierarchy interrupt cause */
28#define TXE_INTR_READINESS_BIT  0 /* HISR_INT_0_STS */
29#define TXE_INTR_READINESS      HISR_INT_0_STS
30#define TXE_INTR_ALIVENESS_BIT  1 /* HISR_INT_1_STS */
31#define TXE_INTR_ALIVENESS      HISR_INT_1_STS
32#define TXE_INTR_OUT_DB_BIT     2 /* HISR_INT_2_STS */
33#define TXE_INTR_OUT_DB         HISR_INT_2_STS
34#define TXE_INTR_IN_READY_BIT   8 /* beyond HISR */
35#define TXE_INTR_IN_READY       BIT(8)
36
37/**
38 * struct mei_txe_hw - txe hardware specifics
39 *
40 * @mem_addr:            SeC and BRIDGE bars
41 * @aliveness:           aliveness (power gating) state of the hardware
42 * @readiness:           readiness state of the hardware
43 * @slots:               number of empty slots
44 * @wait_aliveness_resp: aliveness wait queue
45 * @intr_cause:          translated interrupt cause
46 */
47struct mei_txe_hw {
48	void __iomem *mem_addr[NUM_OF_MEM_BARS];
49	u32 aliveness;
50	u32 readiness;
51	u32 slots;
52
53	wait_queue_head_t wait_aliveness_resp;
54
55	unsigned long intr_cause;
56};
57
58#define to_txe_hw(dev) (struct mei_txe_hw *)((dev)->hw)
59
60static inline struct mei_device *hw_txe_to_mei(struct mei_txe_hw *hw)
61{
62	return container_of((void *)hw, struct mei_device, hw);
63}
64
65struct mei_device *mei_txe_dev_init(struct pci_dev *pdev);
66
67irqreturn_t mei_txe_irq_quick_handler(int irq, void *dev_id);
68irqreturn_t mei_txe_irq_thread_handler(int irq, void *dev_id);
69
70int mei_txe_aliveness_set_sync(struct mei_device *dev, u32 req);
71
72int mei_txe_setup_satt2(struct mei_device *dev, phys_addr_t addr, u32 range);
73
74
75#endif /* _MEI_HW_TXE_H_ */
76