1/* 2 * SMI PCIe driver for DVBSky cards. 3 * 4 * Copyright (C) 2014 Max nibble <nibble.max@gmail.com> 5 * 6 * This program is free software; you can redistribute it and/or modify 7 * it under the terms of the GNU General Public License as published by 8 * the Free Software Foundation; either version 2 of the License, or 9 * (at your option) any later version. 10 * 11 * This program is distributed in the hope that it will be useful, 12 * but WITHOUT ANY WARRANTY; without even the implied warranty of 13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14 * GNU General Public License for more details. 15 */ 16 17#include "smipcie.h" 18#include "m88ds3103.h" 19#include "ts2020.h" 20#include "m88rs6000t.h" 21#include "si2168.h" 22#include "si2157.h" 23 24DVB_DEFINE_MOD_OPT_ADAPTER_NR(adapter_nr); 25 26static int smi_hw_init(struct smi_dev *dev) 27{ 28 u32 port_mux, port_ctrl, int_stat; 29 30 /* set port mux.*/ 31 port_mux = smi_read(MUX_MODE_CTRL); 32 port_mux &= ~(rbPaMSMask); 33 port_mux |= rbPaMSDtvNoGpio; 34 port_mux &= ~(rbPbMSMask); 35 port_mux |= rbPbMSDtvNoGpio; 36 port_mux &= ~(0x0f0000); 37 port_mux |= 0x50000; 38 smi_write(MUX_MODE_CTRL, port_mux); 39 40 /* set DTV register.*/ 41 /* Port A */ 42 port_ctrl = smi_read(VIDEO_CTRL_STATUS_A); 43 port_ctrl &= ~0x01; 44 smi_write(VIDEO_CTRL_STATUS_A, port_ctrl); 45 port_ctrl = smi_read(MPEG2_CTRL_A); 46 port_ctrl &= ~0x40; 47 port_ctrl |= 0x80; 48 smi_write(MPEG2_CTRL_A, port_ctrl); 49 /* Port B */ 50 port_ctrl = smi_read(VIDEO_CTRL_STATUS_B); 51 port_ctrl &= ~0x01; 52 smi_write(VIDEO_CTRL_STATUS_B, port_ctrl); 53 port_ctrl = smi_read(MPEG2_CTRL_B); 54 port_ctrl &= ~0x40; 55 port_ctrl |= 0x80; 56 smi_write(MPEG2_CTRL_B, port_ctrl); 57 58 /* disable and clear interrupt.*/ 59 smi_write(MSI_INT_ENA_CLR, ALL_INT); 60 int_stat = smi_read(MSI_INT_STATUS); 61 smi_write(MSI_INT_STATUS_CLR, int_stat); 62 63 /* reset demod.*/ 64 smi_clear(PERIPHERAL_CTRL, 0x0303); 65 msleep(50); 66 smi_set(PERIPHERAL_CTRL, 0x0101); 67 return 0; 68} 69 70/* i2c bit bus.*/ 71static void smi_i2c_cfg(struct smi_dev *dev, u32 sw_ctl) 72{ 73 u32 dwCtrl; 74 75 dwCtrl = smi_read(sw_ctl); 76 dwCtrl &= ~0x18; /* disable output.*/ 77 dwCtrl |= 0x21; /* reset and software mode.*/ 78 dwCtrl &= ~0xff00; 79 dwCtrl |= 0x6400; 80 smi_write(sw_ctl, dwCtrl); 81 msleep(20); 82 dwCtrl = smi_read(sw_ctl); 83 dwCtrl &= ~0x20; 84 smi_write(sw_ctl, dwCtrl); 85} 86 87static void smi_i2c_setsda(struct smi_dev *dev, int state, u32 sw_ctl) 88{ 89 if (state) { 90 /* set as input.*/ 91 smi_clear(sw_ctl, SW_I2C_MSK_DAT_EN); 92 } else { 93 smi_clear(sw_ctl, SW_I2C_MSK_DAT_OUT); 94 /* set as output.*/ 95 smi_set(sw_ctl, SW_I2C_MSK_DAT_EN); 96 } 97} 98 99static void smi_i2c_setscl(void *data, int state, u32 sw_ctl) 100{ 101 struct smi_dev *dev = data; 102 103 if (state) { 104 /* set as input.*/ 105 smi_clear(sw_ctl, SW_I2C_MSK_CLK_EN); 106 } else { 107 smi_clear(sw_ctl, SW_I2C_MSK_CLK_OUT); 108 /* set as output.*/ 109 smi_set(sw_ctl, SW_I2C_MSK_CLK_EN); 110 } 111} 112 113static int smi_i2c_getsda(void *data, u32 sw_ctl) 114{ 115 struct smi_dev *dev = data; 116 /* set as input.*/ 117 smi_clear(sw_ctl, SW_I2C_MSK_DAT_EN); 118 udelay(1); 119 return (smi_read(sw_ctl) & SW_I2C_MSK_DAT_IN) ? 1 : 0; 120} 121 122static int smi_i2c_getscl(void *data, u32 sw_ctl) 123{ 124 struct smi_dev *dev = data; 125 /* set as input.*/ 126 smi_clear(sw_ctl, SW_I2C_MSK_CLK_EN); 127 udelay(1); 128 return (smi_read(sw_ctl) & SW_I2C_MSK_CLK_IN) ? 1 : 0; 129} 130/* i2c 0.*/ 131static void smi_i2c0_setsda(void *data, int state) 132{ 133 struct smi_dev *dev = data; 134 135 smi_i2c_setsda(dev, state, I2C_A_SW_CTL); 136} 137 138static void smi_i2c0_setscl(void *data, int state) 139{ 140 struct smi_dev *dev = data; 141 142 smi_i2c_setscl(dev, state, I2C_A_SW_CTL); 143} 144 145static int smi_i2c0_getsda(void *data) 146{ 147 struct smi_dev *dev = data; 148 149 return smi_i2c_getsda(dev, I2C_A_SW_CTL); 150} 151 152static int smi_i2c0_getscl(void *data) 153{ 154 struct smi_dev *dev = data; 155 156 return smi_i2c_getscl(dev, I2C_A_SW_CTL); 157} 158/* i2c 1.*/ 159static void smi_i2c1_setsda(void *data, int state) 160{ 161 struct smi_dev *dev = data; 162 163 smi_i2c_setsda(dev, state, I2C_B_SW_CTL); 164} 165 166static void smi_i2c1_setscl(void *data, int state) 167{ 168 struct smi_dev *dev = data; 169 170 smi_i2c_setscl(dev, state, I2C_B_SW_CTL); 171} 172 173static int smi_i2c1_getsda(void *data) 174{ 175 struct smi_dev *dev = data; 176 177 return smi_i2c_getsda(dev, I2C_B_SW_CTL); 178} 179 180static int smi_i2c1_getscl(void *data) 181{ 182 struct smi_dev *dev = data; 183 184 return smi_i2c_getscl(dev, I2C_B_SW_CTL); 185} 186 187static int smi_i2c_init(struct smi_dev *dev) 188{ 189 int ret; 190 191 /* i2c bus 0 */ 192 smi_i2c_cfg(dev, I2C_A_SW_CTL); 193 i2c_set_adapdata(&dev->i2c_bus[0], dev); 194 strcpy(dev->i2c_bus[0].name, "SMI-I2C0"); 195 dev->i2c_bus[0].owner = THIS_MODULE; 196 dev->i2c_bus[0].dev.parent = &dev->pci_dev->dev; 197 dev->i2c_bus[0].algo_data = &dev->i2c_bit[0]; 198 dev->i2c_bit[0].data = dev; 199 dev->i2c_bit[0].setsda = smi_i2c0_setsda; 200 dev->i2c_bit[0].setscl = smi_i2c0_setscl; 201 dev->i2c_bit[0].getsda = smi_i2c0_getsda; 202 dev->i2c_bit[0].getscl = smi_i2c0_getscl; 203 dev->i2c_bit[0].udelay = 12; 204 dev->i2c_bit[0].timeout = 10; 205 /* Raise SCL and SDA */ 206 smi_i2c0_setsda(dev, 1); 207 smi_i2c0_setscl(dev, 1); 208 209 ret = i2c_bit_add_bus(&dev->i2c_bus[0]); 210 if (ret < 0) 211 return ret; 212 213 /* i2c bus 1 */ 214 smi_i2c_cfg(dev, I2C_B_SW_CTL); 215 i2c_set_adapdata(&dev->i2c_bus[1], dev); 216 strcpy(dev->i2c_bus[1].name, "SMI-I2C1"); 217 dev->i2c_bus[1].owner = THIS_MODULE; 218 dev->i2c_bus[1].dev.parent = &dev->pci_dev->dev; 219 dev->i2c_bus[1].algo_data = &dev->i2c_bit[1]; 220 dev->i2c_bit[1].data = dev; 221 dev->i2c_bit[1].setsda = smi_i2c1_setsda; 222 dev->i2c_bit[1].setscl = smi_i2c1_setscl; 223 dev->i2c_bit[1].getsda = smi_i2c1_getsda; 224 dev->i2c_bit[1].getscl = smi_i2c1_getscl; 225 dev->i2c_bit[1].udelay = 12; 226 dev->i2c_bit[1].timeout = 10; 227 /* Raise SCL and SDA */ 228 smi_i2c1_setsda(dev, 1); 229 smi_i2c1_setscl(dev, 1); 230 231 ret = i2c_bit_add_bus(&dev->i2c_bus[1]); 232 if (ret < 0) 233 i2c_del_adapter(&dev->i2c_bus[0]); 234 235 return ret; 236} 237 238static void smi_i2c_exit(struct smi_dev *dev) 239{ 240 i2c_del_adapter(&dev->i2c_bus[0]); 241 i2c_del_adapter(&dev->i2c_bus[1]); 242} 243 244static int smi_read_eeprom(struct i2c_adapter *i2c, u16 reg, u8 *data, u16 size) 245{ 246 int ret; 247 u8 b0[2] = { (reg >> 8) & 0xff, reg & 0xff }; 248 249 struct i2c_msg msg[] = { 250 { .addr = 0x50, .flags = 0, 251 .buf = b0, .len = 2 }, 252 { .addr = 0x50, .flags = I2C_M_RD, 253 .buf = data, .len = size } 254 }; 255 256 ret = i2c_transfer(i2c, msg, 2); 257 258 if (ret != 2) { 259 dev_err(&i2c->dev, "%s: reg=0x%x (error=%d)\n", 260 __func__, reg, ret); 261 return ret; 262 } 263 return ret; 264} 265 266/* ts port interrupt operations */ 267static void smi_port_disableInterrupt(struct smi_port *port) 268{ 269 struct smi_dev *dev = port->dev; 270 271 smi_write(MSI_INT_ENA_CLR, 272 (port->_dmaInterruptCH0 | port->_dmaInterruptCH1)); 273} 274 275static void smi_port_enableInterrupt(struct smi_port *port) 276{ 277 struct smi_dev *dev = port->dev; 278 279 smi_write(MSI_INT_ENA_SET, 280 (port->_dmaInterruptCH0 | port->_dmaInterruptCH1)); 281} 282 283static void smi_port_clearInterrupt(struct smi_port *port) 284{ 285 struct smi_dev *dev = port->dev; 286 287 smi_write(MSI_INT_STATUS_CLR, 288 (port->_dmaInterruptCH0 | port->_dmaInterruptCH1)); 289} 290 291/* tasklet handler: DMA data to dmx.*/ 292static void smi_dma_xfer(unsigned long data) 293{ 294 struct smi_port *port = (struct smi_port *) data; 295 struct smi_dev *dev = port->dev; 296 u32 intr_status, finishedData, dmaManagement; 297 u8 dmaChan0State, dmaChan1State; 298 299 intr_status = port->_int_status; 300 dmaManagement = smi_read(port->DMA_MANAGEMENT); 301 dmaChan0State = (u8)((dmaManagement & 0x00000030) >> 4); 302 dmaChan1State = (u8)((dmaManagement & 0x00300000) >> 20); 303 304 /* CH-0 DMA interrupt.*/ 305 if ((intr_status & port->_dmaInterruptCH0) && (dmaChan0State == 0x01)) { 306 dev_dbg(&dev->pci_dev->dev, 307 "Port[%d]-DMA CH0 engine complete successful !\n", 308 port->idx); 309 finishedData = smi_read(port->DMA_CHAN0_TRANS_STATE); 310 finishedData &= 0x003FFFFF; 311 /* value of DMA_PORT0_CHAN0_TRANS_STATE register [21:0] 312 * indicate dma total transfer length and 313 * zero of [21:0] indicate dma total transfer length 314 * equal to 0x400000 (4MB)*/ 315 if (finishedData == 0) 316 finishedData = 0x00400000; 317 if (finishedData != SMI_TS_DMA_BUF_SIZE) { 318 dev_dbg(&dev->pci_dev->dev, 319 "DMA CH0 engine complete length mismatched, finish data=%d !\n", 320 finishedData); 321 } 322 dvb_dmx_swfilter_packets(&port->demux, 323 port->cpu_addr[0], (finishedData / 188)); 324 /*dvb_dmx_swfilter(&port->demux, 325 port->cpu_addr[0], finishedData);*/ 326 } 327 /* CH-1 DMA interrupt.*/ 328 if ((intr_status & port->_dmaInterruptCH1) && (dmaChan1State == 0x01)) { 329 dev_dbg(&dev->pci_dev->dev, 330 "Port[%d]-DMA CH1 engine complete successful !\n", 331 port->idx); 332 finishedData = smi_read(port->DMA_CHAN1_TRANS_STATE); 333 finishedData &= 0x003FFFFF; 334 /* value of DMA_PORT0_CHAN0_TRANS_STATE register [21:0] 335 * indicate dma total transfer length and 336 * zero of [21:0] indicate dma total transfer length 337 * equal to 0x400000 (4MB)*/ 338 if (finishedData == 0) 339 finishedData = 0x00400000; 340 if (finishedData != SMI_TS_DMA_BUF_SIZE) { 341 dev_dbg(&dev->pci_dev->dev, 342 "DMA CH1 engine complete length mismatched, finish data=%d !\n", 343 finishedData); 344 } 345 dvb_dmx_swfilter_packets(&port->demux, 346 port->cpu_addr[1], (finishedData / 188)); 347 /*dvb_dmx_swfilter(&port->demux, 348 port->cpu_addr[1], finishedData);*/ 349 } 350 /* restart DMA.*/ 351 if (intr_status & port->_dmaInterruptCH0) 352 dmaManagement |= 0x00000002; 353 if (intr_status & port->_dmaInterruptCH1) 354 dmaManagement |= 0x00020000; 355 smi_write(port->DMA_MANAGEMENT, dmaManagement); 356 /* Re-enable interrupts */ 357 smi_port_enableInterrupt(port); 358} 359 360static void smi_port_dma_free(struct smi_port *port) 361{ 362 if (port->cpu_addr[0]) { 363 pci_free_consistent(port->dev->pci_dev, SMI_TS_DMA_BUF_SIZE, 364 port->cpu_addr[0], port->dma_addr[0]); 365 port->cpu_addr[0] = NULL; 366 } 367 if (port->cpu_addr[1]) { 368 pci_free_consistent(port->dev->pci_dev, SMI_TS_DMA_BUF_SIZE, 369 port->cpu_addr[1], port->dma_addr[1]); 370 port->cpu_addr[1] = NULL; 371 } 372} 373 374static int smi_port_init(struct smi_port *port, int dmaChanUsed) 375{ 376 dev_dbg(&port->dev->pci_dev->dev, 377 "%s, port %d, dmaused %d\n", __func__, port->idx, dmaChanUsed); 378 port->enable = 0; 379 if (port->idx == 0) { 380 /* Port A */ 381 port->_dmaInterruptCH0 = dmaChanUsed & 0x01; 382 port->_dmaInterruptCH1 = dmaChanUsed & 0x02; 383 384 port->DMA_CHAN0_ADDR_LOW = DMA_PORTA_CHAN0_ADDR_LOW; 385 port->DMA_CHAN0_ADDR_HI = DMA_PORTA_CHAN0_ADDR_HI; 386 port->DMA_CHAN0_TRANS_STATE = DMA_PORTA_CHAN0_TRANS_STATE; 387 port->DMA_CHAN0_CONTROL = DMA_PORTA_CHAN0_CONTROL; 388 port->DMA_CHAN1_ADDR_LOW = DMA_PORTA_CHAN1_ADDR_LOW; 389 port->DMA_CHAN1_ADDR_HI = DMA_PORTA_CHAN1_ADDR_HI; 390 port->DMA_CHAN1_TRANS_STATE = DMA_PORTA_CHAN1_TRANS_STATE; 391 port->DMA_CHAN1_CONTROL = DMA_PORTA_CHAN1_CONTROL; 392 port->DMA_MANAGEMENT = DMA_PORTA_MANAGEMENT; 393 } else { 394 /* Port B */ 395 port->_dmaInterruptCH0 = (dmaChanUsed << 2) & 0x04; 396 port->_dmaInterruptCH1 = (dmaChanUsed << 2) & 0x08; 397 398 port->DMA_CHAN0_ADDR_LOW = DMA_PORTB_CHAN0_ADDR_LOW; 399 port->DMA_CHAN0_ADDR_HI = DMA_PORTB_CHAN0_ADDR_HI; 400 port->DMA_CHAN0_TRANS_STATE = DMA_PORTB_CHAN0_TRANS_STATE; 401 port->DMA_CHAN0_CONTROL = DMA_PORTB_CHAN0_CONTROL; 402 port->DMA_CHAN1_ADDR_LOW = DMA_PORTB_CHAN1_ADDR_LOW; 403 port->DMA_CHAN1_ADDR_HI = DMA_PORTB_CHAN1_ADDR_HI; 404 port->DMA_CHAN1_TRANS_STATE = DMA_PORTB_CHAN1_TRANS_STATE; 405 port->DMA_CHAN1_CONTROL = DMA_PORTB_CHAN1_CONTROL; 406 port->DMA_MANAGEMENT = DMA_PORTB_MANAGEMENT; 407 } 408 409 if (port->_dmaInterruptCH0) { 410 port->cpu_addr[0] = pci_alloc_consistent(port->dev->pci_dev, 411 SMI_TS_DMA_BUF_SIZE, 412 &port->dma_addr[0]); 413 if (!port->cpu_addr[0]) { 414 dev_err(&port->dev->pci_dev->dev, 415 "Port[%d] DMA CH0 memory allocation failed!\n", 416 port->idx); 417 goto err; 418 } 419 } 420 421 if (port->_dmaInterruptCH1) { 422 port->cpu_addr[1] = pci_alloc_consistent(port->dev->pci_dev, 423 SMI_TS_DMA_BUF_SIZE, 424 &port->dma_addr[1]); 425 if (!port->cpu_addr[1]) { 426 dev_err(&port->dev->pci_dev->dev, 427 "Port[%d] DMA CH1 memory allocation failed!\n", 428 port->idx); 429 goto err; 430 } 431 } 432 433 smi_port_disableInterrupt(port); 434 tasklet_init(&port->tasklet, smi_dma_xfer, (unsigned long)port); 435 tasklet_disable(&port->tasklet); 436 port->enable = 1; 437 return 0; 438err: 439 smi_port_dma_free(port); 440 return -ENOMEM; 441} 442 443static void smi_port_exit(struct smi_port *port) 444{ 445 smi_port_disableInterrupt(port); 446 tasklet_kill(&port->tasklet); 447 smi_port_dma_free(port); 448 port->enable = 0; 449} 450 451static int smi_port_irq(struct smi_port *port, u32 int_status) 452{ 453 u32 port_req_irq = port->_dmaInterruptCH0 | port->_dmaInterruptCH1; 454 int handled = 0; 455 456 if (int_status & port_req_irq) { 457 smi_port_disableInterrupt(port); 458 port->_int_status = int_status; 459 smi_port_clearInterrupt(port); 460 tasklet_schedule(&port->tasklet); 461 handled = 1; 462 } 463 return handled; 464} 465 466static irqreturn_t smi_irq_handler(int irq, void *dev_id) 467{ 468 struct smi_dev *dev = dev_id; 469 struct smi_port *port0 = &dev->ts_port[0]; 470 struct smi_port *port1 = &dev->ts_port[1]; 471 int handled = 0; 472 473 u32 intr_status = smi_read(MSI_INT_STATUS); 474 475 /* ts0 interrupt.*/ 476 if (dev->info->ts_0) 477 handled += smi_port_irq(port0, intr_status); 478 479 /* ts1 interrupt.*/ 480 if (dev->info->ts_1) 481 handled += smi_port_irq(port1, intr_status); 482 483 return IRQ_RETVAL(handled); 484} 485 486static struct i2c_client *smi_add_i2c_client(struct i2c_adapter *adapter, 487 struct i2c_board_info *info) 488{ 489 struct i2c_client *client; 490 491 request_module(info->type); 492 client = i2c_new_device(adapter, info); 493 if (client == NULL || client->dev.driver == NULL) 494 goto err_add_i2c_client; 495 496 if (!try_module_get(client->dev.driver->owner)) { 497 i2c_unregister_device(client); 498 goto err_add_i2c_client; 499 } 500 return client; 501 502err_add_i2c_client: 503 client = NULL; 504 return client; 505} 506 507static void smi_del_i2c_client(struct i2c_client *client) 508{ 509 module_put(client->dev.driver->owner); 510 i2c_unregister_device(client); 511} 512 513static const struct m88ds3103_config smi_dvbsky_m88ds3103_cfg = { 514 .i2c_addr = 0x68, 515 .clock = 27000000, 516 .i2c_wr_max = 33, 517 .clock_out = 0, 518 .ts_mode = M88DS3103_TS_PARALLEL, 519 .ts_clk = 16000, 520 .ts_clk_pol = 1, 521 .agc = 0x99, 522 .lnb_hv_pol = 0, 523 .lnb_en_pol = 1, 524}; 525 526static int smi_dvbsky_m88ds3103_fe_attach(struct smi_port *port) 527{ 528 int ret = 0; 529 struct smi_dev *dev = port->dev; 530 struct i2c_adapter *i2c; 531 /* tuner I2C module */ 532 struct i2c_adapter *tuner_i2c_adapter; 533 struct i2c_client *tuner_client; 534 struct i2c_board_info tuner_info; 535 struct ts2020_config ts2020_config = {}; 536 memset(&tuner_info, 0, sizeof(struct i2c_board_info)); 537 i2c = (port->idx == 0) ? &dev->i2c_bus[0] : &dev->i2c_bus[1]; 538 539 /* attach demod */ 540 port->fe = dvb_attach(m88ds3103_attach, 541 &smi_dvbsky_m88ds3103_cfg, i2c, &tuner_i2c_adapter); 542 if (!port->fe) { 543 ret = -ENODEV; 544 return ret; 545 } 546 /* attach tuner */ 547 ts2020_config.fe = port->fe; 548 strlcpy(tuner_info.type, "ts2020", I2C_NAME_SIZE); 549 tuner_info.addr = 0x60; 550 tuner_info.platform_data = &ts2020_config; 551 tuner_client = smi_add_i2c_client(tuner_i2c_adapter, &tuner_info); 552 if (!tuner_client) { 553 ret = -ENODEV; 554 goto err_tuner_i2c_device; 555 } 556 557 /* delegate signal strength measurement to tuner */ 558 port->fe->ops.read_signal_strength = 559 port->fe->ops.tuner_ops.get_rf_strength; 560 561 port->i2c_client_tuner = tuner_client; 562 return ret; 563 564err_tuner_i2c_device: 565 dvb_frontend_detach(port->fe); 566 return ret; 567} 568 569static const struct m88ds3103_config smi_dvbsky_m88rs6000_cfg = { 570 .i2c_addr = 0x69, 571 .clock = 27000000, 572 .i2c_wr_max = 33, 573 .ts_mode = M88DS3103_TS_PARALLEL, 574 .ts_clk = 16000, 575 .ts_clk_pol = 1, 576 .agc = 0x99, 577 .lnb_hv_pol = 0, 578 .lnb_en_pol = 1, 579}; 580 581static int smi_dvbsky_m88rs6000_fe_attach(struct smi_port *port) 582{ 583 int ret = 0; 584 struct smi_dev *dev = port->dev; 585 struct i2c_adapter *i2c; 586 /* tuner I2C module */ 587 struct i2c_adapter *tuner_i2c_adapter; 588 struct i2c_client *tuner_client; 589 struct i2c_board_info tuner_info; 590 struct m88rs6000t_config m88rs6000t_config; 591 592 memset(&tuner_info, 0, sizeof(struct i2c_board_info)); 593 i2c = (port->idx == 0) ? &dev->i2c_bus[0] : &dev->i2c_bus[1]; 594 595 /* attach demod */ 596 port->fe = dvb_attach(m88ds3103_attach, 597 &smi_dvbsky_m88rs6000_cfg, i2c, &tuner_i2c_adapter); 598 if (!port->fe) { 599 ret = -ENODEV; 600 return ret; 601 } 602 /* attach tuner */ 603 m88rs6000t_config.fe = port->fe; 604 strlcpy(tuner_info.type, "m88rs6000t", I2C_NAME_SIZE); 605 tuner_info.addr = 0x21; 606 tuner_info.platform_data = &m88rs6000t_config; 607 tuner_client = smi_add_i2c_client(tuner_i2c_adapter, &tuner_info); 608 if (!tuner_client) { 609 ret = -ENODEV; 610 goto err_tuner_i2c_device; 611 } 612 613 /* delegate signal strength measurement to tuner */ 614 port->fe->ops.read_signal_strength = 615 port->fe->ops.tuner_ops.get_rf_strength; 616 617 port->i2c_client_tuner = tuner_client; 618 return ret; 619 620err_tuner_i2c_device: 621 dvb_frontend_detach(port->fe); 622 return ret; 623} 624 625static int smi_dvbsky_sit2_fe_attach(struct smi_port *port) 626{ 627 int ret = 0; 628 struct smi_dev *dev = port->dev; 629 struct i2c_adapter *i2c; 630 struct i2c_adapter *tuner_i2c_adapter; 631 struct i2c_client *client_tuner, *client_demod; 632 struct i2c_board_info client_info; 633 struct si2168_config si2168_config; 634 struct si2157_config si2157_config; 635 636 /* select i2c bus */ 637 i2c = (port->idx == 0) ? &dev->i2c_bus[0] : &dev->i2c_bus[1]; 638 639 /* attach demod */ 640 memset(&si2168_config, 0, sizeof(si2168_config)); 641 si2168_config.i2c_adapter = &tuner_i2c_adapter; 642 si2168_config.fe = &port->fe; 643 si2168_config.ts_mode = SI2168_TS_PARALLEL; 644 645 memset(&client_info, 0, sizeof(struct i2c_board_info)); 646 strlcpy(client_info.type, "si2168", I2C_NAME_SIZE); 647 client_info.addr = 0x64; 648 client_info.platform_data = &si2168_config; 649 650 client_demod = smi_add_i2c_client(i2c, &client_info); 651 if (!client_demod) { 652 ret = -ENODEV; 653 return ret; 654 } 655 port->i2c_client_demod = client_demod; 656 657 /* attach tuner */ 658 memset(&si2157_config, 0, sizeof(si2157_config)); 659 si2157_config.fe = port->fe; 660 661 memset(&client_info, 0, sizeof(struct i2c_board_info)); 662 strlcpy(client_info.type, "si2157", I2C_NAME_SIZE); 663 client_info.addr = 0x60; 664 client_info.platform_data = &si2157_config; 665 666 client_tuner = smi_add_i2c_client(tuner_i2c_adapter, &client_info); 667 if (!client_tuner) { 668 smi_del_i2c_client(port->i2c_client_demod); 669 port->i2c_client_demod = NULL; 670 ret = -ENODEV; 671 return ret; 672 } 673 port->i2c_client_tuner = client_tuner; 674 return ret; 675} 676 677static int smi_fe_init(struct smi_port *port) 678{ 679 int ret = 0; 680 struct smi_dev *dev = port->dev; 681 struct dvb_adapter *adap = &port->dvb_adapter; 682 u8 mac_ee[16]; 683 684 dev_dbg(&port->dev->pci_dev->dev, 685 "%s: port %d, fe_type = %d\n", 686 __func__, port->idx, port->fe_type); 687 switch (port->fe_type) { 688 case DVBSKY_FE_M88DS3103: 689 ret = smi_dvbsky_m88ds3103_fe_attach(port); 690 break; 691 case DVBSKY_FE_M88RS6000: 692 ret = smi_dvbsky_m88rs6000_fe_attach(port); 693 break; 694 case DVBSKY_FE_SIT2: 695 ret = smi_dvbsky_sit2_fe_attach(port); 696 break; 697 } 698 if (ret < 0) 699 return ret; 700 701 /* register dvb frontend */ 702 ret = dvb_register_frontend(adap, port->fe); 703 if (ret < 0) { 704 if (port->i2c_client_tuner) 705 smi_del_i2c_client(port->i2c_client_tuner); 706 if (port->i2c_client_demod) 707 smi_del_i2c_client(port->i2c_client_demod); 708 dvb_frontend_detach(port->fe); 709 return ret; 710 } 711 /* init MAC.*/ 712 ret = smi_read_eeprom(&dev->i2c_bus[0], 0xc0, mac_ee, 16); 713 dev_info(&port->dev->pci_dev->dev, 714 "DVBSky SMI PCIe MAC= %pM\n", mac_ee + (port->idx)*8); 715 memcpy(adap->proposed_mac, mac_ee + (port->idx)*8, 6); 716 return ret; 717} 718 719static void smi_fe_exit(struct smi_port *port) 720{ 721 dvb_unregister_frontend(port->fe); 722 /* remove I2C demod and tuner */ 723 if (port->i2c_client_tuner) 724 smi_del_i2c_client(port->i2c_client_tuner); 725 if (port->i2c_client_demod) 726 smi_del_i2c_client(port->i2c_client_demod); 727 dvb_frontend_detach(port->fe); 728} 729 730static int my_dvb_dmx_ts_card_init(struct dvb_demux *dvbdemux, char *id, 731 int (*start_feed)(struct dvb_demux_feed *), 732 int (*stop_feed)(struct dvb_demux_feed *), 733 void *priv) 734{ 735 dvbdemux->priv = priv; 736 737 dvbdemux->filternum = 256; 738 dvbdemux->feednum = 256; 739 dvbdemux->start_feed = start_feed; 740 dvbdemux->stop_feed = stop_feed; 741 dvbdemux->write_to_decoder = NULL; 742 dvbdemux->dmx.capabilities = (DMX_TS_FILTERING | 743 DMX_SECTION_FILTERING | 744 DMX_MEMORY_BASED_FILTERING); 745 return dvb_dmx_init(dvbdemux); 746} 747 748static int my_dvb_dmxdev_ts_card_init(struct dmxdev *dmxdev, 749 struct dvb_demux *dvbdemux, 750 struct dmx_frontend *hw_frontend, 751 struct dmx_frontend *mem_frontend, 752 struct dvb_adapter *dvb_adapter) 753{ 754 int ret; 755 756 dmxdev->filternum = 256; 757 dmxdev->demux = &dvbdemux->dmx; 758 dmxdev->capabilities = 0; 759 ret = dvb_dmxdev_init(dmxdev, dvb_adapter); 760 if (ret < 0) 761 return ret; 762 763 hw_frontend->source = DMX_FRONTEND_0; 764 dvbdemux->dmx.add_frontend(&dvbdemux->dmx, hw_frontend); 765 mem_frontend->source = DMX_MEMORY_FE; 766 dvbdemux->dmx.add_frontend(&dvbdemux->dmx, mem_frontend); 767 return dvbdemux->dmx.connect_frontend(&dvbdemux->dmx, hw_frontend); 768} 769 770static u32 smi_config_DMA(struct smi_port *port) 771{ 772 struct smi_dev *dev = port->dev; 773 u32 totalLength = 0, dmaMemPtrLow, dmaMemPtrHi, dmaCtlReg; 774 u8 chanLatencyTimer = 0, dmaChanEnable = 1, dmaTransStart = 1; 775 u32 dmaManagement = 0, tlpTransUnit = DMA_TRANS_UNIT_188; 776 u8 tlpTc = 0, tlpTd = 1, tlpEp = 0, tlpAttr = 0; 777 u64 mem; 778 779 dmaManagement = smi_read(port->DMA_MANAGEMENT); 780 /* Setup Channel-0 */ 781 if (port->_dmaInterruptCH0) { 782 totalLength = SMI_TS_DMA_BUF_SIZE; 783 mem = port->dma_addr[0]; 784 dmaMemPtrLow = mem & 0xffffffff; 785 dmaMemPtrHi = mem >> 32; 786 dmaCtlReg = (totalLength) | (tlpTransUnit << 22) | (tlpTc << 25) 787 | (tlpTd << 28) | (tlpEp << 29) | (tlpAttr << 30); 788 dmaManagement |= dmaChanEnable | (dmaTransStart << 1) 789 | (chanLatencyTimer << 8); 790 /* write DMA register, start DMA engine */ 791 smi_write(port->DMA_CHAN0_ADDR_LOW, dmaMemPtrLow); 792 smi_write(port->DMA_CHAN0_ADDR_HI, dmaMemPtrHi); 793 smi_write(port->DMA_CHAN0_CONTROL, dmaCtlReg); 794 } 795 /* Setup Channel-1 */ 796 if (port->_dmaInterruptCH1) { 797 totalLength = SMI_TS_DMA_BUF_SIZE; 798 mem = port->dma_addr[1]; 799 dmaMemPtrLow = mem & 0xffffffff; 800 dmaMemPtrHi = mem >> 32; 801 dmaCtlReg = (totalLength) | (tlpTransUnit << 22) | (tlpTc << 25) 802 | (tlpTd << 28) | (tlpEp << 29) | (tlpAttr << 30); 803 dmaManagement |= (dmaChanEnable << 16) | (dmaTransStart << 17) 804 | (chanLatencyTimer << 24); 805 /* write DMA register, start DMA engine */ 806 smi_write(port->DMA_CHAN1_ADDR_LOW, dmaMemPtrLow); 807 smi_write(port->DMA_CHAN1_ADDR_HI, dmaMemPtrHi); 808 smi_write(port->DMA_CHAN1_CONTROL, dmaCtlReg); 809 } 810 return dmaManagement; 811} 812 813static int smi_start_feed(struct dvb_demux_feed *dvbdmxfeed) 814{ 815 struct dvb_demux *dvbdmx = dvbdmxfeed->demux; 816 struct smi_port *port = dvbdmx->priv; 817 struct smi_dev *dev = port->dev; 818 u32 dmaManagement; 819 820 if (port->users++ == 0) { 821 dmaManagement = smi_config_DMA(port); 822 smi_port_clearInterrupt(port); 823 smi_port_enableInterrupt(port); 824 smi_write(port->DMA_MANAGEMENT, dmaManagement); 825 tasklet_enable(&port->tasklet); 826 } 827 return port->users; 828} 829 830static int smi_stop_feed(struct dvb_demux_feed *dvbdmxfeed) 831{ 832 struct dvb_demux *dvbdmx = dvbdmxfeed->demux; 833 struct smi_port *port = dvbdmx->priv; 834 struct smi_dev *dev = port->dev; 835 836 if (--port->users) 837 return port->users; 838 839 tasklet_disable(&port->tasklet); 840 smi_port_disableInterrupt(port); 841 smi_clear(port->DMA_MANAGEMENT, 0x30003); 842 return 0; 843} 844 845static int smi_dvb_init(struct smi_port *port) 846{ 847 int ret; 848 struct dvb_adapter *adap = &port->dvb_adapter; 849 struct dvb_demux *dvbdemux = &port->demux; 850 851 dev_dbg(&port->dev->pci_dev->dev, 852 "%s, port %d\n", __func__, port->idx); 853 854 ret = dvb_register_adapter(adap, "SMI_DVB", THIS_MODULE, 855 &port->dev->pci_dev->dev, 856 adapter_nr); 857 if (ret < 0) { 858 dev_err(&port->dev->pci_dev->dev, "Fail to register DVB adapter.\n"); 859 return ret; 860 } 861 ret = my_dvb_dmx_ts_card_init(dvbdemux, "SW demux", 862 smi_start_feed, 863 smi_stop_feed, port); 864 if (ret < 0) 865 goto err_del_dvb_register_adapter; 866 867 ret = my_dvb_dmxdev_ts_card_init(&port->dmxdev, &port->demux, 868 &port->hw_frontend, 869 &port->mem_frontend, adap); 870 if (ret < 0) 871 goto err_del_dvb_dmx; 872 873 ret = dvb_net_init(adap, &port->dvbnet, port->dmxdev.demux); 874 if (ret < 0) 875 goto err_del_dvb_dmxdev; 876 return 0; 877err_del_dvb_dmxdev: 878 dvbdemux->dmx.close(&dvbdemux->dmx); 879 dvbdemux->dmx.remove_frontend(&dvbdemux->dmx, &port->hw_frontend); 880 dvbdemux->dmx.remove_frontend(&dvbdemux->dmx, &port->mem_frontend); 881 dvb_dmxdev_release(&port->dmxdev); 882err_del_dvb_dmx: 883 dvb_dmx_release(&port->demux); 884err_del_dvb_register_adapter: 885 dvb_unregister_adapter(&port->dvb_adapter); 886 return ret; 887} 888 889static void smi_dvb_exit(struct smi_port *port) 890{ 891 struct dvb_demux *dvbdemux = &port->demux; 892 893 dvb_net_release(&port->dvbnet); 894 895 dvbdemux->dmx.close(&dvbdemux->dmx); 896 dvbdemux->dmx.remove_frontend(&dvbdemux->dmx, &port->hw_frontend); 897 dvbdemux->dmx.remove_frontend(&dvbdemux->dmx, &port->mem_frontend); 898 dvb_dmxdev_release(&port->dmxdev); 899 dvb_dmx_release(&port->demux); 900 901 dvb_unregister_adapter(&port->dvb_adapter); 902} 903 904static int smi_port_attach(struct smi_dev *dev, 905 struct smi_port *port, int index) 906{ 907 int ret, dmachs; 908 909 port->dev = dev; 910 port->idx = index; 911 port->fe_type = (index == 0) ? dev->info->fe_0 : dev->info->fe_1; 912 dmachs = (index == 0) ? dev->info->ts_0 : dev->info->ts_1; 913 /* port init.*/ 914 ret = smi_port_init(port, dmachs); 915 if (ret < 0) 916 return ret; 917 /* dvb init.*/ 918 ret = smi_dvb_init(port); 919 if (ret < 0) 920 goto err_del_port_init; 921 /* fe init.*/ 922 ret = smi_fe_init(port); 923 if (ret < 0) 924 goto err_del_dvb_init; 925 return 0; 926err_del_dvb_init: 927 smi_dvb_exit(port); 928err_del_port_init: 929 smi_port_exit(port); 930 return ret; 931} 932 933static void smi_port_detach(struct smi_port *port) 934{ 935 smi_fe_exit(port); 936 smi_dvb_exit(port); 937 smi_port_exit(port); 938} 939 940static int smi_probe(struct pci_dev *pdev, const struct pci_device_id *id) 941{ 942 struct smi_dev *dev; 943 int ret = -ENOMEM; 944 945 if (pci_enable_device(pdev) < 0) 946 return -ENODEV; 947 948 dev = kzalloc(sizeof(struct smi_dev), GFP_KERNEL); 949 if (!dev) { 950 ret = -ENOMEM; 951 goto err_pci_disable_device; 952 } 953 954 dev->pci_dev = pdev; 955 pci_set_drvdata(pdev, dev); 956 dev->info = (struct smi_cfg_info *) id->driver_data; 957 dev_info(&dev->pci_dev->dev, 958 "card detected: %s\n", dev->info->name); 959 960 dev->nr = dev->info->type; 961 dev->lmmio = ioremap(pci_resource_start(dev->pci_dev, 0), 962 pci_resource_len(dev->pci_dev, 0)); 963 if (!dev->lmmio) { 964 ret = -ENOMEM; 965 goto err_kfree; 966 } 967 968 /* should we set to 32bit DMA? */ 969 ret = pci_set_dma_mask(pdev, DMA_BIT_MASK(32)); 970 if (ret < 0) 971 goto err_pci_iounmap; 972 973 pci_set_master(pdev); 974 975 ret = smi_hw_init(dev); 976 if (ret < 0) 977 goto err_pci_iounmap; 978 979 ret = smi_i2c_init(dev); 980 if (ret < 0) 981 goto err_pci_iounmap; 982 983 if (dev->info->ts_0) { 984 ret = smi_port_attach(dev, &dev->ts_port[0], 0); 985 if (ret < 0) 986 goto err_del_i2c_adaptor; 987 } 988 989 if (dev->info->ts_1) { 990 ret = smi_port_attach(dev, &dev->ts_port[1], 1); 991 if (ret < 0) 992 goto err_del_port0_attach; 993 } 994 995#ifdef CONFIG_PCI_MSI /* to do msi interrupt.???*/ 996 if (pci_msi_enabled()) 997 ret = pci_enable_msi(dev->pci_dev); 998 if (ret) 999 dev_info(&dev->pci_dev->dev, "MSI not available.\n"); 1000#endif 1001 1002 ret = request_irq(dev->pci_dev->irq, smi_irq_handler, 1003 IRQF_SHARED, "SMI_PCIE", dev); 1004 if (ret < 0) 1005 goto err_del_port1_attach; 1006 1007 return 0; 1008 1009err_del_port1_attach: 1010 if (dev->info->ts_1) 1011 smi_port_detach(&dev->ts_port[1]); 1012err_del_port0_attach: 1013 if (dev->info->ts_0) 1014 smi_port_detach(&dev->ts_port[0]); 1015err_del_i2c_adaptor: 1016 smi_i2c_exit(dev); 1017err_pci_iounmap: 1018 iounmap(dev->lmmio); 1019err_kfree: 1020 pci_set_drvdata(pdev, NULL); 1021 kfree(dev); 1022err_pci_disable_device: 1023 pci_disable_device(pdev); 1024 return ret; 1025} 1026 1027static void smi_remove(struct pci_dev *pdev) 1028{ 1029 struct smi_dev *dev = pci_get_drvdata(pdev); 1030 1031 smi_write(MSI_INT_ENA_CLR, ALL_INT); 1032 free_irq(dev->pci_dev->irq, dev); 1033#ifdef CONFIG_PCI_MSI 1034 pci_disable_msi(dev->pci_dev); 1035#endif 1036 if (dev->info->ts_1) 1037 smi_port_detach(&dev->ts_port[1]); 1038 if (dev->info->ts_0) 1039 smi_port_detach(&dev->ts_port[0]); 1040 1041 smi_i2c_exit(dev); 1042 iounmap(dev->lmmio); 1043 pci_set_drvdata(pdev, NULL); 1044 pci_disable_device(pdev); 1045 kfree(dev); 1046} 1047 1048/* DVBSky cards */ 1049static struct smi_cfg_info dvbsky_s950_cfg = { 1050 .type = SMI_DVBSKY_S950, 1051 .name = "DVBSky S950 V3", 1052 .ts_0 = SMI_TS_NULL, 1053 .ts_1 = SMI_TS_DMA_BOTH, 1054 .fe_0 = DVBSKY_FE_NULL, 1055 .fe_1 = DVBSKY_FE_M88DS3103, 1056}; 1057 1058static struct smi_cfg_info dvbsky_s952_cfg = { 1059 .type = SMI_DVBSKY_S952, 1060 .name = "DVBSky S952 V3", 1061 .ts_0 = SMI_TS_DMA_BOTH, 1062 .ts_1 = SMI_TS_DMA_BOTH, 1063 .fe_0 = DVBSKY_FE_M88RS6000, 1064 .fe_1 = DVBSKY_FE_M88RS6000, 1065}; 1066 1067static struct smi_cfg_info dvbsky_t9580_cfg = { 1068 .type = SMI_DVBSKY_T9580, 1069 .name = "DVBSky T9580 V3", 1070 .ts_0 = SMI_TS_DMA_BOTH, 1071 .ts_1 = SMI_TS_DMA_BOTH, 1072 .fe_0 = DVBSKY_FE_SIT2, 1073 .fe_1 = DVBSKY_FE_M88DS3103, 1074}; 1075 1076/* PCI IDs */ 1077#define SMI_ID(_subvend, _subdev, _driverdata) { \ 1078 .vendor = SMI_VID, .device = SMI_PID, \ 1079 .subvendor = _subvend, .subdevice = _subdev, \ 1080 .driver_data = (unsigned long)&_driverdata } 1081 1082static const struct pci_device_id smi_id_table[] = { 1083 SMI_ID(0x4254, 0x0550, dvbsky_s950_cfg), 1084 SMI_ID(0x4254, 0x0552, dvbsky_s952_cfg), 1085 SMI_ID(0x4254, 0x5580, dvbsky_t9580_cfg), 1086 {0} 1087}; 1088MODULE_DEVICE_TABLE(pci, smi_id_table); 1089 1090static struct pci_driver smipcie_driver = { 1091 .name = "SMI PCIe driver", 1092 .id_table = smi_id_table, 1093 .probe = smi_probe, 1094 .remove = smi_remove, 1095}; 1096 1097module_pci_driver(smipcie_driver); 1098 1099MODULE_AUTHOR("Max nibble <nibble.max@gmail.com>"); 1100MODULE_DESCRIPTION("SMI PCIe driver"); 1101MODULE_LICENSE("GPL"); 1102