1/*
2 *  cx18 init/start/stop/exit stream functions
3 *
4 *  Derived from ivtv-streams.c
5 *
6 *  Copyright (C) 2007  Hans Verkuil <hverkuil@xs4all.nl>
7 *  Copyright (C) 2008  Andy Walls <awalls@md.metrocast.net>
8 *
9 *  This program is free software; you can redistribute it and/or modify
10 *  it under the terms of the GNU General Public License as published by
11 *  the Free Software Foundation; either version 2 of the License, or
12 *  (at your option) any later version.
13 *
14 *  This program is distributed in the hope that it will be useful,
15 *  but WITHOUT ANY WARRANTY; without even the implied warranty of
16 *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
17 *  GNU General Public License for more details.
18 *
19 *  You should have received a copy of the GNU General Public License
20 *  along with this program; if not, write to the Free Software
21 *  Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA
22 *  02111-1307  USA
23 */
24
25#include "cx18-driver.h"
26#include "cx18-io.h"
27#include "cx18-fileops.h"
28#include "cx18-mailbox.h"
29#include "cx18-i2c.h"
30#include "cx18-queue.h"
31#include "cx18-ioctl.h"
32#include "cx18-streams.h"
33#include "cx18-cards.h"
34#include "cx18-scb.h"
35#include "cx18-dvb.h"
36
37#define CX18_DSP0_INTERRUPT_MASK     	0xd0004C
38
39static struct v4l2_file_operations cx18_v4l2_enc_fops = {
40	.owner = THIS_MODULE,
41	.read = cx18_v4l2_read,
42	.open = cx18_v4l2_open,
43	.unlocked_ioctl = video_ioctl2,
44	.release = cx18_v4l2_close,
45	.poll = cx18_v4l2_enc_poll,
46	.mmap = cx18_v4l2_mmap,
47};
48
49/* offset from 0 to register ts v4l2 minors on */
50#define CX18_V4L2_ENC_TS_OFFSET   16
51/* offset from 0 to register pcm v4l2 minors on */
52#define CX18_V4L2_ENC_PCM_OFFSET  24
53/* offset from 0 to register yuv v4l2 minors on */
54#define CX18_V4L2_ENC_YUV_OFFSET  32
55
56static struct {
57	const char *name;
58	int vfl_type;
59	int num_offset;
60	int dma;
61	u32 caps;
62} cx18_stream_info[] = {
63	{	/* CX18_ENC_STREAM_TYPE_MPG */
64		"encoder MPEG",
65		VFL_TYPE_GRABBER, 0,
66		PCI_DMA_FROMDEVICE,
67		V4L2_CAP_VIDEO_CAPTURE | V4L2_CAP_READWRITE |
68		V4L2_CAP_AUDIO | V4L2_CAP_TUNER
69	},
70	{	/* CX18_ENC_STREAM_TYPE_TS */
71		"TS",
72		VFL_TYPE_GRABBER, -1,
73		PCI_DMA_FROMDEVICE,
74	},
75	{	/* CX18_ENC_STREAM_TYPE_YUV */
76		"encoder YUV",
77		VFL_TYPE_GRABBER, CX18_V4L2_ENC_YUV_OFFSET,
78		PCI_DMA_FROMDEVICE,
79		V4L2_CAP_VIDEO_CAPTURE | V4L2_CAP_READWRITE |
80		V4L2_CAP_STREAMING | V4L2_CAP_AUDIO | V4L2_CAP_TUNER
81	},
82	{	/* CX18_ENC_STREAM_TYPE_VBI */
83		"encoder VBI",
84		VFL_TYPE_VBI, 0,
85		PCI_DMA_FROMDEVICE,
86		V4L2_CAP_VBI_CAPTURE | V4L2_CAP_SLICED_VBI_CAPTURE |
87		V4L2_CAP_READWRITE | V4L2_CAP_TUNER
88	},
89	{	/* CX18_ENC_STREAM_TYPE_PCM */
90		"encoder PCM audio",
91		VFL_TYPE_GRABBER, CX18_V4L2_ENC_PCM_OFFSET,
92		PCI_DMA_FROMDEVICE,
93		V4L2_CAP_TUNER | V4L2_CAP_AUDIO | V4L2_CAP_READWRITE,
94	},
95	{	/* CX18_ENC_STREAM_TYPE_IDX */
96		"encoder IDX",
97		VFL_TYPE_GRABBER, -1,
98		PCI_DMA_FROMDEVICE,
99	},
100	{	/* CX18_ENC_STREAM_TYPE_RAD */
101		"encoder radio",
102		VFL_TYPE_RADIO, 0,
103		PCI_DMA_NONE,
104		V4L2_CAP_RADIO | V4L2_CAP_TUNER
105	},
106};
107
108
109static void cx18_dma_free(struct videobuf_queue *q,
110	struct cx18_stream *s, struct cx18_videobuf_buffer *buf)
111{
112	videobuf_waiton(q, &buf->vb, 0, 0);
113	videobuf_vmalloc_free(&buf->vb);
114	buf->vb.state = VIDEOBUF_NEEDS_INIT;
115}
116
117static int cx18_prepare_buffer(struct videobuf_queue *q,
118	struct cx18_stream *s,
119	struct cx18_videobuf_buffer *buf,
120	u32 pixelformat,
121	unsigned int width, unsigned int height,
122	enum v4l2_field field)
123{
124        struct cx18 *cx = s->cx;
125	int rc = 0;
126
127	/* check settings */
128	buf->bytes_used = 0;
129
130	if ((width  < 48) || (height < 32))
131		return -EINVAL;
132
133	buf->vb.size = (width * height * 2);
134	if ((buf->vb.baddr != 0) && (buf->vb.bsize < buf->vb.size))
135		return -EINVAL;
136
137	/* alloc + fill struct (if changed) */
138	if (buf->vb.width != width || buf->vb.height != height ||
139	    buf->vb.field != field || s->pixelformat != pixelformat ||
140	    buf->tvnorm != cx->std) {
141
142		buf->vb.width  = width;
143		buf->vb.height = height;
144		buf->vb.field  = field;
145		buf->tvnorm    = cx->std;
146		s->pixelformat = pixelformat;
147
148		/* HM12 YUV size is (Y=(h*720) + UV=(h*(720/2)))
149		   UYUV YUV size is (Y=(h*720) + UV=(h*(720))) */
150		if (s->pixelformat == V4L2_PIX_FMT_HM12)
151			s->vb_bytes_per_frame = height * 720 * 3 / 2;
152		else
153			s->vb_bytes_per_frame = height * 720 * 2;
154		cx18_dma_free(q, s, buf);
155	}
156
157	if ((buf->vb.baddr != 0) && (buf->vb.bsize < buf->vb.size))
158		return -EINVAL;
159
160	if (buf->vb.field == 0)
161		buf->vb.field = V4L2_FIELD_INTERLACED;
162
163	if (VIDEOBUF_NEEDS_INIT == buf->vb.state) {
164		buf->vb.width  = width;
165		buf->vb.height = height;
166		buf->vb.field  = field;
167		buf->tvnorm    = cx->std;
168		s->pixelformat = pixelformat;
169
170		/* HM12 YUV size is (Y=(h*720) + UV=(h*(720/2)))
171		   UYUV YUV size is (Y=(h*720) + UV=(h*(720))) */
172		if (s->pixelformat == V4L2_PIX_FMT_HM12)
173			s->vb_bytes_per_frame = height * 720 * 3 / 2;
174		else
175			s->vb_bytes_per_frame = height * 720 * 2;
176		rc = videobuf_iolock(q, &buf->vb, NULL);
177		if (rc != 0)
178			goto fail;
179	}
180	buf->vb.state = VIDEOBUF_PREPARED;
181	return 0;
182
183fail:
184	cx18_dma_free(q, s, buf);
185	return rc;
186
187}
188
189/* VB_MIN_BUFSIZE is lcm(1440 * 480, 1440 * 576)
190   1440 is a single line of 4:2:2 YUV at 720 luma samples wide
191*/
192#define VB_MIN_BUFFERS 32
193#define VB_MIN_BUFSIZE 4147200
194
195static int buffer_setup(struct videobuf_queue *q,
196	unsigned int *count, unsigned int *size)
197{
198	struct cx18_stream *s = q->priv_data;
199	struct cx18 *cx = s->cx;
200
201	*size = 2 * cx->cxhdl.width * cx->cxhdl.height;
202	if (*count == 0)
203		*count = VB_MIN_BUFFERS;
204
205	while (*size * *count > VB_MIN_BUFFERS * VB_MIN_BUFSIZE)
206		(*count)--;
207
208	q->field = V4L2_FIELD_INTERLACED;
209	q->last = V4L2_FIELD_INTERLACED;
210
211	return 0;
212}
213
214static int buffer_prepare(struct videobuf_queue *q,
215	struct videobuf_buffer *vb,
216	enum v4l2_field field)
217{
218	struct cx18_videobuf_buffer *buf =
219		container_of(vb, struct cx18_videobuf_buffer, vb);
220	struct cx18_stream *s = q->priv_data;
221	struct cx18 *cx = s->cx;
222
223	return cx18_prepare_buffer(q, s, buf, s->pixelformat,
224		cx->cxhdl.width, cx->cxhdl.height, field);
225}
226
227static void buffer_release(struct videobuf_queue *q,
228	struct videobuf_buffer *vb)
229{
230	struct cx18_videobuf_buffer *buf =
231		container_of(vb, struct cx18_videobuf_buffer, vb);
232	struct cx18_stream *s = q->priv_data;
233
234	cx18_dma_free(q, s, buf);
235}
236
237static void buffer_queue(struct videobuf_queue *q, struct videobuf_buffer *vb)
238{
239	struct cx18_videobuf_buffer *buf =
240		container_of(vb, struct cx18_videobuf_buffer, vb);
241	struct cx18_stream *s = q->priv_data;
242
243	buf->vb.state = VIDEOBUF_QUEUED;
244
245	list_add_tail(&buf->vb.queue, &s->vb_capture);
246}
247
248static struct videobuf_queue_ops cx18_videobuf_qops = {
249	.buf_setup    = buffer_setup,
250	.buf_prepare  = buffer_prepare,
251	.buf_queue    = buffer_queue,
252	.buf_release  = buffer_release,
253};
254
255static void cx18_stream_init(struct cx18 *cx, int type)
256{
257	struct cx18_stream *s = &cx->streams[type];
258
259	memset(s, 0, sizeof(*s));
260
261	/* initialize cx18_stream fields */
262	s->dvb = NULL;
263	s->cx = cx;
264	s->type = type;
265	s->name = cx18_stream_info[type].name;
266	s->handle = CX18_INVALID_TASK_HANDLE;
267
268	s->dma = cx18_stream_info[type].dma;
269	s->v4l2_dev_caps = cx18_stream_info[type].caps;
270	s->buffers = cx->stream_buffers[type];
271	s->buf_size = cx->stream_buf_size[type];
272	INIT_LIST_HEAD(&s->buf_pool);
273	s->bufs_per_mdl = 1;
274	s->mdl_size = s->buf_size * s->bufs_per_mdl;
275
276	init_waitqueue_head(&s->waitq);
277	s->id = -1;
278	spin_lock_init(&s->q_free.lock);
279	cx18_queue_init(&s->q_free);
280	spin_lock_init(&s->q_busy.lock);
281	cx18_queue_init(&s->q_busy);
282	spin_lock_init(&s->q_full.lock);
283	cx18_queue_init(&s->q_full);
284	spin_lock_init(&s->q_idle.lock);
285	cx18_queue_init(&s->q_idle);
286
287	INIT_WORK(&s->out_work_order, cx18_out_work_handler);
288
289	INIT_LIST_HEAD(&s->vb_capture);
290	s->vb_timeout.function = cx18_vb_timeout;
291	s->vb_timeout.data = (unsigned long)s;
292	init_timer(&s->vb_timeout);
293	spin_lock_init(&s->vb_lock);
294	if (type == CX18_ENC_STREAM_TYPE_YUV) {
295		spin_lock_init(&s->vbuf_q_lock);
296
297		s->vb_type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
298		videobuf_queue_vmalloc_init(&s->vbuf_q, &cx18_videobuf_qops,
299			&cx->pci_dev->dev, &s->vbuf_q_lock,
300			V4L2_BUF_TYPE_VIDEO_CAPTURE,
301			V4L2_FIELD_INTERLACED,
302			sizeof(struct cx18_videobuf_buffer),
303			s, &cx->serialize_lock);
304
305		/* Assume the previous pixel default */
306		s->pixelformat = V4L2_PIX_FMT_HM12;
307		s->vb_bytes_per_frame = cx->cxhdl.height * 720 * 3 / 2;
308		s->vb_bytes_per_line = 720;
309	}
310}
311
312static int cx18_prep_dev(struct cx18 *cx, int type)
313{
314	struct cx18_stream *s = &cx->streams[type];
315	u32 cap = cx->v4l2_cap;
316	int num_offset = cx18_stream_info[type].num_offset;
317	int num = cx->instance + cx18_first_minor + num_offset;
318
319	/*
320	 * These five fields are always initialized.
321	 * For analog capture related streams, if video_dev.v4l2_dev == NULL then the
322	 * stream is not in use.
323	 * For the TS stream, if dvb == NULL then the stream is not in use.
324	 * In those cases no other fields but these four can be used.
325	 */
326	s->video_dev.v4l2_dev = NULL;
327	s->dvb = NULL;
328	s->cx = cx;
329	s->type = type;
330	s->name = cx18_stream_info[type].name;
331
332	/* Check whether the radio is supported */
333	if (type == CX18_ENC_STREAM_TYPE_RAD && !(cap & V4L2_CAP_RADIO))
334		return 0;
335
336	/* Check whether VBI is supported */
337	if (type == CX18_ENC_STREAM_TYPE_VBI &&
338	    !(cap & (V4L2_CAP_VBI_CAPTURE | V4L2_CAP_SLICED_VBI_CAPTURE)))
339		return 0;
340
341	/* User explicitly selected 0 buffers for these streams, so don't
342	   create them. */
343	if (cx18_stream_info[type].dma != PCI_DMA_NONE &&
344	    cx->stream_buffers[type] == 0) {
345		CX18_INFO("Disabled %s device\n", cx18_stream_info[type].name);
346		return 0;
347	}
348
349	cx18_stream_init(cx, type);
350
351	/* Allocate the cx18_dvb struct only for the TS on cards with DTV */
352	if (type == CX18_ENC_STREAM_TYPE_TS) {
353		if (cx->card->hw_all & CX18_HW_DVB) {
354			s->dvb = kzalloc(sizeof(struct cx18_dvb), GFP_KERNEL);
355			if (s->dvb == NULL) {
356				CX18_ERR("Couldn't allocate cx18_dvb structure"
357					 " for %s\n", s->name);
358				return -ENOMEM;
359			}
360		} else {
361			/* Don't need buffers for the TS, if there is no DVB */
362			s->buffers = 0;
363		}
364	}
365
366	if (num_offset == -1)
367		return 0;
368
369	/* initialize the v4l2 video device structure */
370	snprintf(s->video_dev.name, sizeof(s->video_dev.name), "%s %s",
371		 cx->v4l2_dev.name, s->name);
372
373	s->video_dev.num = num;
374	s->video_dev.v4l2_dev = &cx->v4l2_dev;
375	s->video_dev.fops = &cx18_v4l2_enc_fops;
376	s->video_dev.release = video_device_release_empty;
377	if (cx->card->video_inputs->video_type == CX18_CARD_INPUT_VID_TUNER)
378		s->video_dev.tvnorms = cx->tuner_std;
379	else
380		s->video_dev.tvnorms = V4L2_STD_ALL;
381	s->video_dev.lock = &cx->serialize_lock;
382	cx18_set_funcs(&s->video_dev);
383	return 0;
384}
385
386/* Initialize v4l2 variables and register v4l2 devices */
387int cx18_streams_setup(struct cx18 *cx)
388{
389	int type, ret;
390
391	/* Setup V4L2 Devices */
392	for (type = 0; type < CX18_MAX_STREAMS; type++) {
393		/* Prepare device */
394		ret = cx18_prep_dev(cx, type);
395		if (ret < 0)
396			break;
397
398		/* Allocate Stream */
399		ret = cx18_stream_alloc(&cx->streams[type]);
400		if (ret < 0)
401			break;
402	}
403	if (type == CX18_MAX_STREAMS)
404		return 0;
405
406	/* One or more streams could not be initialized. Clean 'em all up. */
407	cx18_streams_cleanup(cx, 0);
408	return ret;
409}
410
411static int cx18_reg_dev(struct cx18 *cx, int type)
412{
413	struct cx18_stream *s = &cx->streams[type];
414	int vfl_type = cx18_stream_info[type].vfl_type;
415	const char *name;
416	int num, ret;
417
418	if (type == CX18_ENC_STREAM_TYPE_TS && s->dvb != NULL) {
419		ret = cx18_dvb_register(s);
420		if (ret < 0) {
421			CX18_ERR("DVB failed to register\n");
422			return ret;
423		}
424	}
425
426	if (s->video_dev.v4l2_dev == NULL)
427		return 0;
428
429	num = s->video_dev.num;
430	/* card number + user defined offset + device offset */
431	if (type != CX18_ENC_STREAM_TYPE_MPG) {
432		struct cx18_stream *s_mpg = &cx->streams[CX18_ENC_STREAM_TYPE_MPG];
433
434		if (s_mpg->video_dev.v4l2_dev)
435			num = s_mpg->video_dev.num
436			    + cx18_stream_info[type].num_offset;
437	}
438	video_set_drvdata(&s->video_dev, s);
439
440	/* Register device. First try the desired minor, then any free one. */
441	ret = video_register_device_no_warn(&s->video_dev, vfl_type, num);
442	if (ret < 0) {
443		CX18_ERR("Couldn't register v4l2 device for %s (device node number %d)\n",
444			s->name, num);
445		s->video_dev.v4l2_dev = NULL;
446		return ret;
447	}
448
449	name = video_device_node_name(&s->video_dev);
450
451	switch (vfl_type) {
452	case VFL_TYPE_GRABBER:
453		CX18_INFO("Registered device %s for %s (%d x %d.%02d kB)\n",
454			  name, s->name, cx->stream_buffers[type],
455			  cx->stream_buf_size[type] / 1024,
456			  (cx->stream_buf_size[type] * 100 / 1024) % 100);
457		break;
458
459	case VFL_TYPE_RADIO:
460		CX18_INFO("Registered device %s for %s\n", name, s->name);
461		break;
462
463	case VFL_TYPE_VBI:
464		if (cx->stream_buffers[type])
465			CX18_INFO("Registered device %s for %s "
466				  "(%d x %d bytes)\n",
467				  name, s->name, cx->stream_buffers[type],
468				  cx->stream_buf_size[type]);
469		else
470			CX18_INFO("Registered device %s for %s\n",
471				name, s->name);
472		break;
473	}
474
475	return 0;
476}
477
478/* Register v4l2 devices */
479int cx18_streams_register(struct cx18 *cx)
480{
481	int type;
482	int err;
483	int ret = 0;
484
485	/* Register V4L2 devices */
486	for (type = 0; type < CX18_MAX_STREAMS; type++) {
487		err = cx18_reg_dev(cx, type);
488		if (err && ret == 0)
489			ret = err;
490	}
491
492	if (ret == 0)
493		return 0;
494
495	/* One or more streams could not be initialized. Clean 'em all up. */
496	cx18_streams_cleanup(cx, 1);
497	return ret;
498}
499
500/* Unregister v4l2 devices */
501void cx18_streams_cleanup(struct cx18 *cx, int unregister)
502{
503	struct video_device *vdev;
504	int type;
505
506	/* Teardown all streams */
507	for (type = 0; type < CX18_MAX_STREAMS; type++) {
508
509		/* The TS has a cx18_dvb structure, not a video_device */
510		if (type == CX18_ENC_STREAM_TYPE_TS) {
511			if (cx->streams[type].dvb != NULL) {
512				if (unregister)
513					cx18_dvb_unregister(&cx->streams[type]);
514				kfree(cx->streams[type].dvb);
515				cx->streams[type].dvb = NULL;
516				cx18_stream_free(&cx->streams[type]);
517			}
518			continue;
519		}
520
521		/* No struct video_device, but can have buffers allocated */
522		if (type == CX18_ENC_STREAM_TYPE_IDX) {
523			/* If the module params didn't inhibit IDX ... */
524			if (cx->stream_buffers[type] != 0) {
525				cx->stream_buffers[type] = 0;
526				/*
527				 * Before calling cx18_stream_free(),
528				 * check if the IDX stream was actually set up.
529				 * Needed, since the cx18_probe() error path
530				 * exits through here as well as normal clean up
531				 */
532				if (cx->streams[type].buffers != 0)
533					cx18_stream_free(&cx->streams[type]);
534			}
535			continue;
536		}
537
538		/* If struct video_device exists, can have buffers allocated */
539		vdev = &cx->streams[type].video_dev;
540
541		if (vdev->v4l2_dev == NULL)
542			continue;
543
544		if (type == CX18_ENC_STREAM_TYPE_YUV)
545			videobuf_mmap_free(&cx->streams[type].vbuf_q);
546
547		cx18_stream_free(&cx->streams[type]);
548
549		video_unregister_device(vdev);
550	}
551}
552
553static void cx18_vbi_setup(struct cx18_stream *s)
554{
555	struct cx18 *cx = s->cx;
556	int raw = cx18_raw_vbi(cx);
557	u32 data[CX2341X_MBOX_MAX_DATA];
558	int lines;
559
560	if (cx->is_60hz) {
561		cx->vbi.count = 12;
562		cx->vbi.start[0] = 10;
563		cx->vbi.start[1] = 273;
564	} else {        /* PAL/SECAM */
565		cx->vbi.count = 18;
566		cx->vbi.start[0] = 6;
567		cx->vbi.start[1] = 318;
568	}
569
570	/* setup VBI registers */
571	if (raw)
572		v4l2_subdev_call(cx->sd_av, vbi, s_raw_fmt, &cx->vbi.in.fmt.vbi);
573	else
574		v4l2_subdev_call(cx->sd_av, vbi, s_sliced_fmt, &cx->vbi.in.fmt.sliced);
575
576	/*
577	 * Send the CX18_CPU_SET_RAW_VBI_PARAM API command to setup Encoder Raw
578	 * VBI when the first analog capture channel starts, as once it starts
579	 * (e.g. MPEG), we can't effect any change in the Encoder Raw VBI setup
580	 * (i.e. for the VBI capture channels).  We also send it for each
581	 * analog capture channel anyway just to make sure we get the proper
582	 * behavior
583	 */
584	if (raw) {
585		lines = cx->vbi.count * 2;
586	} else {
587		/*
588		 * For 525/60 systems, according to the VIP 2 & BT.656 std:
589		 * The EAV RP code's Field bit toggles on line 4, a few lines
590		 * after the Vertcal Blank bit has already toggled.
591		 * Tell the encoder to capture 21-4+1=18 lines per field,
592		 * since we want lines 10 through 21.
593		 *
594		 * For 625/50 systems, according to the VIP 2 & BT.656 std:
595		 * The EAV RP code's Field bit toggles on line 1, a few lines
596		 * after the Vertcal Blank bit has already toggled.
597		 * (We've actually set the digitizer so that the Field bit
598		 * toggles on line 2.) Tell the encoder to capture 23-2+1=22
599		 * lines per field, since we want lines 6 through 23.
600		 */
601		lines = cx->is_60hz ? (21 - 4 + 1) * 2 : (23 - 2 + 1) * 2;
602	}
603
604	data[0] = s->handle;
605	/* Lines per field */
606	data[1] = (lines / 2) | ((lines / 2) << 16);
607	/* bytes per line */
608	data[2] = (raw ? vbi_active_samples
609		       : (cx->is_60hz ? vbi_hblank_samples_60Hz
610				      : vbi_hblank_samples_50Hz));
611	/* Every X number of frames a VBI interrupt arrives
612	   (frames as in 25 or 30 fps) */
613	data[3] = 1;
614	/*
615	 * Set the SAV/EAV RP codes to look for as start/stop points
616	 * when in VIP-1.1 mode
617	 */
618	if (raw) {
619		/*
620		 * Start codes for beginning of "active" line in vertical blank
621		 * 0x20 (               VerticalBlank                )
622		 * 0x60 (     EvenField VerticalBlank                )
623		 */
624		data[4] = 0x20602060;
625		/*
626		 * End codes for end of "active" raw lines and regular lines
627		 * 0x30 (               VerticalBlank HorizontalBlank)
628		 * 0x70 (     EvenField VerticalBlank HorizontalBlank)
629		 * 0x90 (Task                         HorizontalBlank)
630		 * 0xd0 (Task EvenField               HorizontalBlank)
631		 */
632		data[5] = 0x307090d0;
633	} else {
634		/*
635		 * End codes for active video, we want data in the hblank region
636		 * 0xb0 (Task         0 VerticalBlank HorizontalBlank)
637		 * 0xf0 (Task EvenField VerticalBlank HorizontalBlank)
638		 *
639		 * Since the V bit is only allowed to toggle in the EAV RP code,
640		 * just before the first active region line, these two
641		 * are problematic:
642		 * 0x90 (Task                         HorizontalBlank)
643		 * 0xd0 (Task EvenField               HorizontalBlank)
644		 *
645		 * We have set the digitzer such that we don't have to worry
646		 * about these problem codes.
647		 */
648		data[4] = 0xB0F0B0F0;
649		/*
650		 * Start codes for beginning of active line in vertical blank
651		 * 0xa0 (Task           VerticalBlank                )
652		 * 0xe0 (Task EvenField VerticalBlank                )
653		 */
654		data[5] = 0xA0E0A0E0;
655	}
656
657	CX18_DEBUG_INFO("Setup VBI h: %d lines %x bpl %d fr %d %x %x\n",
658			data[0], data[1], data[2], data[3], data[4], data[5]);
659
660	cx18_api(cx, CX18_CPU_SET_RAW_VBI_PARAM, 6, data);
661}
662
663void cx18_stream_rotate_idx_mdls(struct cx18 *cx)
664{
665	struct cx18_stream *s = &cx->streams[CX18_ENC_STREAM_TYPE_IDX];
666	struct cx18_mdl *mdl;
667
668	if (!cx18_stream_enabled(s))
669		return;
670
671	/* Return if the firmware is not running low on MDLs */
672	if ((atomic_read(&s->q_free.depth) + atomic_read(&s->q_busy.depth)) >=
673					    CX18_ENC_STREAM_TYPE_IDX_FW_MDL_MIN)
674		return;
675
676	/* Return if there are no MDLs to rotate back to the firmware */
677	if (atomic_read(&s->q_full.depth) < 2)
678		return;
679
680	/*
681	 * Take the oldest IDX MDL still holding data, and discard its index
682	 * entries by scheduling the MDL to go back to the firmware
683	 */
684	mdl = cx18_dequeue(s, &s->q_full);
685	if (mdl != NULL)
686		cx18_enqueue(s, mdl, &s->q_free);
687}
688
689static
690struct cx18_queue *_cx18_stream_put_mdl_fw(struct cx18_stream *s,
691					   struct cx18_mdl *mdl)
692{
693	struct cx18 *cx = s->cx;
694	struct cx18_queue *q;
695
696	/* Don't give it to the firmware, if we're not running a capture */
697	if (s->handle == CX18_INVALID_TASK_HANDLE ||
698	    test_bit(CX18_F_S_STOPPING, &s->s_flags) ||
699	    !test_bit(CX18_F_S_STREAMING, &s->s_flags))
700		return cx18_enqueue(s, mdl, &s->q_free);
701
702	q = cx18_enqueue(s, mdl, &s->q_busy);
703	if (q != &s->q_busy)
704		return q; /* The firmware has the max MDLs it can handle */
705
706	cx18_mdl_sync_for_device(s, mdl);
707	cx18_vapi(cx, CX18_CPU_DE_SET_MDL, 5, s->handle,
708		  (void __iomem *) &cx->scb->cpu_mdl[mdl->id] - cx->enc_mem,
709		  s->bufs_per_mdl, mdl->id, s->mdl_size);
710	return q;
711}
712
713static
714void _cx18_stream_load_fw_queue(struct cx18_stream *s)
715{
716	struct cx18_queue *q;
717	struct cx18_mdl *mdl;
718
719	if (atomic_read(&s->q_free.depth) == 0 ||
720	    atomic_read(&s->q_busy.depth) >= CX18_MAX_FW_MDLS_PER_STREAM)
721		return;
722
723	/* Move from q_free to q_busy notifying the firmware, until the limit */
724	do {
725		mdl = cx18_dequeue(s, &s->q_free);
726		if (mdl == NULL)
727			break;
728		q = _cx18_stream_put_mdl_fw(s, mdl);
729	} while (atomic_read(&s->q_busy.depth) < CX18_MAX_FW_MDLS_PER_STREAM
730		 && q == &s->q_busy);
731}
732
733void cx18_out_work_handler(struct work_struct *work)
734{
735	struct cx18_stream *s =
736			 container_of(work, struct cx18_stream, out_work_order);
737
738	_cx18_stream_load_fw_queue(s);
739}
740
741static void cx18_stream_configure_mdls(struct cx18_stream *s)
742{
743	cx18_unload_queues(s);
744
745	switch (s->type) {
746	case CX18_ENC_STREAM_TYPE_YUV:
747		/*
748		 * Height should be a multiple of 32 lines.
749		 * Set the MDL size to the exact size needed for one frame.
750		 * Use enough buffers per MDL to cover the MDL size
751		 */
752		if (s->pixelformat == V4L2_PIX_FMT_HM12)
753			s->mdl_size = 720 * s->cx->cxhdl.height * 3 / 2;
754		else
755			s->mdl_size = 720 * s->cx->cxhdl.height * 2;
756		s->bufs_per_mdl = s->mdl_size / s->buf_size;
757		if (s->mdl_size % s->buf_size)
758			s->bufs_per_mdl++;
759		break;
760	case CX18_ENC_STREAM_TYPE_VBI:
761		s->bufs_per_mdl = 1;
762		if  (cx18_raw_vbi(s->cx)) {
763			s->mdl_size = (s->cx->is_60hz ? 12 : 18)
764						       * 2 * vbi_active_samples;
765		} else {
766			/*
767			 * See comment in cx18_vbi_setup() below about the
768			 * extra lines we capture in sliced VBI mode due to
769			 * the lines on which EAV RP codes toggle.
770			*/
771			s->mdl_size = s->cx->is_60hz
772				   ? (21 - 4 + 1) * 2 * vbi_hblank_samples_60Hz
773				   : (23 - 2 + 1) * 2 * vbi_hblank_samples_50Hz;
774		}
775		break;
776	default:
777		s->bufs_per_mdl = 1;
778		s->mdl_size = s->buf_size * s->bufs_per_mdl;
779		break;
780	}
781
782	cx18_load_queues(s);
783}
784
785int cx18_start_v4l2_encode_stream(struct cx18_stream *s)
786{
787	u32 data[MAX_MB_ARGUMENTS];
788	struct cx18 *cx = s->cx;
789	int captype = 0;
790	struct cx18_stream *s_idx;
791
792	if (!cx18_stream_enabled(s))
793		return -EINVAL;
794
795	CX18_DEBUG_INFO("Start encoder stream %s\n", s->name);
796
797	switch (s->type) {
798	case CX18_ENC_STREAM_TYPE_MPG:
799		captype = CAPTURE_CHANNEL_TYPE_MPEG;
800		cx->mpg_data_received = cx->vbi_data_inserted = 0;
801		cx->dualwatch_jiffies = jiffies;
802		cx->dualwatch_stereo_mode = v4l2_ctrl_g_ctrl(cx->cxhdl.audio_mode);
803		cx->search_pack_header = 0;
804		break;
805
806	case CX18_ENC_STREAM_TYPE_IDX:
807		captype = CAPTURE_CHANNEL_TYPE_INDEX;
808		break;
809	case CX18_ENC_STREAM_TYPE_TS:
810		captype = CAPTURE_CHANNEL_TYPE_TS;
811		break;
812	case CX18_ENC_STREAM_TYPE_YUV:
813		captype = CAPTURE_CHANNEL_TYPE_YUV;
814		break;
815	case CX18_ENC_STREAM_TYPE_PCM:
816		captype = CAPTURE_CHANNEL_TYPE_PCM;
817		break;
818	case CX18_ENC_STREAM_TYPE_VBI:
819#ifdef CX18_ENCODER_PARSES_SLICED
820		captype = cx18_raw_vbi(cx) ?
821		     CAPTURE_CHANNEL_TYPE_VBI : CAPTURE_CHANNEL_TYPE_SLICED_VBI;
822#else
823		/*
824		 * Currently we set things up so that Sliced VBI from the
825		 * digitizer is handled as Raw VBI by the encoder
826		 */
827		captype = CAPTURE_CHANNEL_TYPE_VBI;
828#endif
829		cx->vbi.frame = 0;
830		cx->vbi.inserted_frame = 0;
831		memset(cx->vbi.sliced_mpeg_size,
832			0, sizeof(cx->vbi.sliced_mpeg_size));
833		break;
834	default:
835		return -EINVAL;
836	}
837
838	/* Clear Streamoff flags in case left from last capture */
839	clear_bit(CX18_F_S_STREAMOFF, &s->s_flags);
840
841	cx18_vapi_result(cx, data, CX18_CREATE_TASK, 1, CPU_CMD_MASK_CAPTURE);
842	s->handle = data[0];
843	cx18_vapi(cx, CX18_CPU_SET_CHANNEL_TYPE, 2, s->handle, captype);
844
845	/*
846	 * For everything but CAPTURE_CHANNEL_TYPE_TS, play it safe and
847	 * set up all the parameters, as it is not obvious which parameters the
848	 * firmware shares across capture channel types and which it does not.
849	 *
850	 * Some of the cx18_vapi() calls below apply to only certain capture
851	 * channel types.  We're hoping there's no harm in calling most of them
852	 * anyway, as long as the values are all consistent.  Setting some
853	 * shared parameters will have no effect once an analog capture channel
854	 * has started streaming.
855	 */
856	if (captype != CAPTURE_CHANNEL_TYPE_TS) {
857		cx18_vapi(cx, CX18_CPU_SET_VER_CROP_LINE, 2, s->handle, 0);
858		cx18_vapi(cx, CX18_CPU_SET_MISC_PARAMETERS, 3, s->handle, 3, 1);
859		cx18_vapi(cx, CX18_CPU_SET_MISC_PARAMETERS, 3, s->handle, 8, 0);
860		cx18_vapi(cx, CX18_CPU_SET_MISC_PARAMETERS, 3, s->handle, 4, 1);
861
862		/*
863		 * Audio related reset according to
864		 * Documentation/video4linux/cx2341x/fw-encoder-api.txt
865		 */
866		if (atomic_read(&cx->ana_capturing) == 0)
867			cx18_vapi(cx, CX18_CPU_SET_MISC_PARAMETERS, 2,
868				  s->handle, 12);
869
870		/*
871		 * Number of lines for Field 1 & Field 2 according to
872		 * Documentation/video4linux/cx2341x/fw-encoder-api.txt
873		 * Field 1 is 312 for 625 line systems in BT.656
874		 * Field 2 is 313 for 625 line systems in BT.656
875		 */
876		cx18_vapi(cx, CX18_CPU_SET_CAPTURE_LINE_NO, 3,
877			  s->handle, 312, 313);
878
879		if (cx->v4l2_cap & V4L2_CAP_VBI_CAPTURE)
880			cx18_vbi_setup(s);
881
882		/*
883		 * Select to receive I, P, and B frame index entries, if the
884		 * index stream is enabled.  Otherwise disable index entry
885		 * generation.
886		 */
887		s_idx = &cx->streams[CX18_ENC_STREAM_TYPE_IDX];
888		cx18_vapi_result(cx, data, CX18_CPU_SET_INDEXTABLE, 2,
889				 s->handle, cx18_stream_enabled(s_idx) ? 7 : 0);
890
891		/* Call out to the common CX2341x API setup for user controls */
892		cx->cxhdl.priv = s;
893		cx2341x_handler_setup(&cx->cxhdl);
894
895		/*
896		 * When starting a capture and we're set for radio,
897		 * ensure the video is muted, despite the user control.
898		 */
899		if (!cx->cxhdl.video_mute &&
900		    test_bit(CX18_F_I_RADIO_USER, &cx->i_flags))
901			cx18_vapi(cx, CX18_CPU_SET_VIDEO_MUTE, 2, s->handle,
902			  (v4l2_ctrl_g_ctrl(cx->cxhdl.video_mute_yuv) << 8) | 1);
903
904		/* Enable the Video Format Converter for UYVY 4:2:2 support,
905		 * rather than the default HM12 Macroblovk 4:2:0 support.
906		 */
907		if (captype == CAPTURE_CHANNEL_TYPE_YUV) {
908			if (s->pixelformat == V4L2_PIX_FMT_UYVY)
909				cx18_vapi(cx, CX18_CPU_SET_VFC_PARAM, 2,
910					s->handle, 1);
911			else
912				/* If in doubt, default to HM12 */
913				cx18_vapi(cx, CX18_CPU_SET_VFC_PARAM, 2,
914					s->handle, 0);
915		}
916	}
917
918	if (atomic_read(&cx->tot_capturing) == 0) {
919		cx2341x_handler_set_busy(&cx->cxhdl, 1);
920		clear_bit(CX18_F_I_EOS, &cx->i_flags);
921		cx18_write_reg(cx, 7, CX18_DSP0_INTERRUPT_MASK);
922	}
923
924	cx18_vapi(cx, CX18_CPU_DE_SET_MDL_ACK, 3, s->handle,
925		(void __iomem *)&cx->scb->cpu_mdl_ack[s->type][0] - cx->enc_mem,
926		(void __iomem *)&cx->scb->cpu_mdl_ack[s->type][1] - cx->enc_mem);
927
928	/* Init all the cpu_mdls for this stream */
929	cx18_stream_configure_mdls(s);
930	_cx18_stream_load_fw_queue(s);
931
932	/* begin_capture */
933	if (cx18_vapi(cx, CX18_CPU_CAPTURE_START, 1, s->handle)) {
934		CX18_DEBUG_WARN("Error starting capture!\n");
935		/* Ensure we're really not capturing before releasing MDLs */
936		set_bit(CX18_F_S_STOPPING, &s->s_flags);
937		if (s->type == CX18_ENC_STREAM_TYPE_MPG)
938			cx18_vapi(cx, CX18_CPU_CAPTURE_STOP, 2, s->handle, 1);
939		else
940			cx18_vapi(cx, CX18_CPU_CAPTURE_STOP, 1, s->handle);
941		clear_bit(CX18_F_S_STREAMING, &s->s_flags);
942		/* FIXME - CX18_F_S_STREAMOFF as well? */
943		cx18_vapi(cx, CX18_CPU_DE_RELEASE_MDL, 1, s->handle);
944		cx18_vapi(cx, CX18_DESTROY_TASK, 1, s->handle);
945		s->handle = CX18_INVALID_TASK_HANDLE;
946		clear_bit(CX18_F_S_STOPPING, &s->s_flags);
947		if (atomic_read(&cx->tot_capturing) == 0) {
948			set_bit(CX18_F_I_EOS, &cx->i_flags);
949			cx18_write_reg(cx, 5, CX18_DSP0_INTERRUPT_MASK);
950		}
951		return -EINVAL;
952	}
953
954	/* you're live! sit back and await interrupts :) */
955	if (captype != CAPTURE_CHANNEL_TYPE_TS)
956		atomic_inc(&cx->ana_capturing);
957	atomic_inc(&cx->tot_capturing);
958	return 0;
959}
960EXPORT_SYMBOL(cx18_start_v4l2_encode_stream);
961
962void cx18_stop_all_captures(struct cx18 *cx)
963{
964	int i;
965
966	for (i = CX18_MAX_STREAMS - 1; i >= 0; i--) {
967		struct cx18_stream *s = &cx->streams[i];
968
969		if (!cx18_stream_enabled(s))
970			continue;
971		if (test_bit(CX18_F_S_STREAMING, &s->s_flags))
972			cx18_stop_v4l2_encode_stream(s, 0);
973	}
974}
975
976int cx18_stop_v4l2_encode_stream(struct cx18_stream *s, int gop_end)
977{
978	struct cx18 *cx = s->cx;
979
980	if (!cx18_stream_enabled(s))
981		return -EINVAL;
982
983	/* This function assumes that you are allowed to stop the capture
984	   and that we are actually capturing */
985
986	CX18_DEBUG_INFO("Stop Capture\n");
987
988	if (atomic_read(&cx->tot_capturing) == 0)
989		return 0;
990
991	set_bit(CX18_F_S_STOPPING, &s->s_flags);
992	if (s->type == CX18_ENC_STREAM_TYPE_MPG)
993		cx18_vapi(cx, CX18_CPU_CAPTURE_STOP, 2, s->handle, !gop_end);
994	else
995		cx18_vapi(cx, CX18_CPU_CAPTURE_STOP, 1, s->handle);
996
997	if (s->type == CX18_ENC_STREAM_TYPE_MPG && gop_end) {
998		CX18_INFO("ignoring gop_end: not (yet?) supported by the firmware\n");
999	}
1000
1001	if (s->type != CX18_ENC_STREAM_TYPE_TS)
1002		atomic_dec(&cx->ana_capturing);
1003	atomic_dec(&cx->tot_capturing);
1004
1005	/* Clear capture and no-read bits */
1006	clear_bit(CX18_F_S_STREAMING, &s->s_flags);
1007
1008	/* Tell the CX23418 it can't use our buffers anymore */
1009	cx18_vapi(cx, CX18_CPU_DE_RELEASE_MDL, 1, s->handle);
1010
1011	cx18_vapi(cx, CX18_DESTROY_TASK, 1, s->handle);
1012	s->handle = CX18_INVALID_TASK_HANDLE;
1013	clear_bit(CX18_F_S_STOPPING, &s->s_flags);
1014
1015	if (atomic_read(&cx->tot_capturing) > 0)
1016		return 0;
1017
1018	cx2341x_handler_set_busy(&cx->cxhdl, 0);
1019	cx18_write_reg(cx, 5, CX18_DSP0_INTERRUPT_MASK);
1020	wake_up(&s->waitq);
1021
1022	return 0;
1023}
1024EXPORT_SYMBOL(cx18_stop_v4l2_encode_stream);
1025
1026u32 cx18_find_handle(struct cx18 *cx)
1027{
1028	int i;
1029
1030	/* find first available handle to be used for global settings */
1031	for (i = 0; i < CX18_MAX_STREAMS; i++) {
1032		struct cx18_stream *s = &cx->streams[i];
1033
1034		if (s->video_dev.v4l2_dev && (s->handle != CX18_INVALID_TASK_HANDLE))
1035			return s->handle;
1036	}
1037	return CX18_INVALID_TASK_HANDLE;
1038}
1039
1040struct cx18_stream *cx18_handle_to_stream(struct cx18 *cx, u32 handle)
1041{
1042	int i;
1043	struct cx18_stream *s;
1044
1045	if (handle == CX18_INVALID_TASK_HANDLE)
1046		return NULL;
1047
1048	for (i = 0; i < CX18_MAX_STREAMS; i++) {
1049		s = &cx->streams[i];
1050		if (s->handle != handle)
1051			continue;
1052		if (cx18_stream_enabled(s))
1053			return s;
1054	}
1055	return NULL;
1056}
1057