1/* 2 * cx18 functions for DVB support 3 * 4 * Copyright (c) 2008 Steven Toth <stoth@linuxtv.org> 5 * Copyright (C) 2008 Andy Walls <awalls@md.metrocast.net> 6 * 7 * This program is free software; you can redistribute it and/or modify 8 * it under the terms of the GNU General Public License as published by 9 * the Free Software Foundation; either version 2 of the License, or 10 * (at your option) any later version. 11 * 12 * This program is distributed in the hope that it will be useful, 13 * but WITHOUT ANY WARRANTY; without even the implied warranty of 14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 15 * 16 * GNU General Public License for more details. 17 * 18 * You should have received a copy of the GNU General Public License 19 * along with this program; if not, write to the Free Software 20 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. 21 */ 22 23#include "cx18-version.h" 24#include "cx18-dvb.h" 25#include "cx18-io.h" 26#include "cx18-queue.h" 27#include "cx18-streams.h" 28#include "cx18-cards.h" 29#include "cx18-gpio.h" 30#include "s5h1409.h" 31#include "mxl5005s.h" 32#include "s5h1411.h" 33#include "tda18271.h" 34#include "zl10353.h" 35 36#include <linux/firmware.h> 37#include "mt352.h" 38#include "mt352_priv.h" 39#include "tuner-xc2028.h" 40 41DVB_DEFINE_MOD_OPT_ADAPTER_NR(adapter_nr); 42 43#define FWFILE "dvb-cx18-mpc718-mt352.fw" 44 45#define CX18_REG_DMUX_NUM_PORT_0_CONTROL 0xd5a000 46#define CX18_CLOCK_ENABLE2 0xc71024 47#define CX18_DMUX_CLK_MASK 0x0080 48 49/* 50 * CX18_CARD_HVR_1600_ESMT 51 * CX18_CARD_HVR_1600_SAMSUNG 52 */ 53 54static struct mxl5005s_config hauppauge_hvr1600_tuner = { 55 .i2c_address = 0xC6 >> 1, 56 .if_freq = IF_FREQ_5380000HZ, 57 .xtal_freq = CRYSTAL_FREQ_16000000HZ, 58 .agc_mode = MXL_SINGLE_AGC, 59 .tracking_filter = MXL_TF_C_H, 60 .rssi_enable = MXL_RSSI_ENABLE, 61 .cap_select = MXL_CAP_SEL_ENABLE, 62 .div_out = MXL_DIV_OUT_4, 63 .clock_out = MXL_CLOCK_OUT_DISABLE, 64 .output_load = MXL5005S_IF_OUTPUT_LOAD_200_OHM, 65 .top = MXL5005S_TOP_25P2, 66 .mod_mode = MXL_DIGITAL_MODE, 67 .if_mode = MXL_ZERO_IF, 68 .qam_gain = 0x02, 69 .AgcMasterByte = 0x00, 70}; 71 72static struct s5h1409_config hauppauge_hvr1600_config = { 73 .demod_address = 0x32 >> 1, 74 .output_mode = S5H1409_SERIAL_OUTPUT, 75 .gpio = S5H1409_GPIO_ON, 76 .qam_if = 44000, 77 .inversion = S5H1409_INVERSION_OFF, 78 .status_mode = S5H1409_DEMODLOCKING, 79 .mpeg_timing = S5H1409_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK, 80 .hvr1600_opt = S5H1409_HVR1600_OPTIMIZE 81}; 82 83/* 84 * CX18_CARD_HVR_1600_S5H1411 85 */ 86static struct s5h1411_config hcw_s5h1411_config = { 87 .output_mode = S5H1411_SERIAL_OUTPUT, 88 .gpio = S5H1411_GPIO_OFF, 89 .vsb_if = S5H1411_IF_44000, 90 .qam_if = S5H1411_IF_4000, 91 .inversion = S5H1411_INVERSION_ON, 92 .status_mode = S5H1411_DEMODLOCKING, 93 .mpeg_timing = S5H1411_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK, 94}; 95 96static struct tda18271_std_map hauppauge_tda18271_std_map = { 97 .atsc_6 = { .if_freq = 5380, .agc_mode = 3, .std = 3, 98 .if_lvl = 6, .rfagc_top = 0x37 }, 99 .qam_6 = { .if_freq = 4000, .agc_mode = 3, .std = 0, 100 .if_lvl = 6, .rfagc_top = 0x37 }, 101}; 102 103static struct tda18271_config hauppauge_tda18271_config = { 104 .std_map = &hauppauge_tda18271_std_map, 105 .gate = TDA18271_GATE_DIGITAL, 106 .output_opt = TDA18271_OUTPUT_LT_OFF, 107}; 108 109/* 110 * CX18_CARD_LEADTEK_DVR3100H 111 */ 112/* Information/confirmation of proper config values provided by Terry Wu */ 113static struct zl10353_config leadtek_dvr3100h_demod = { 114 .demod_address = 0x1e >> 1, /* Datasheet suggested straps */ 115 .if2 = 45600, /* 4.560 MHz IF from the XC3028 */ 116 .parallel_ts = 1, /* Not a serial TS */ 117 .no_tuner = 1, /* XC3028 is not behind the gate */ 118 .disable_i2c_gate_ctrl = 1, /* Disable the I2C gate */ 119}; 120 121/* 122 * CX18_CARD_YUAN_MPC718 123 */ 124/* 125 * Due to 126 * 127 * 1. an absence of information on how to prgram the MT352 128 * 2. the Linux mt352 module pushing MT352 initialzation off onto us here 129 * 130 * We have to use an init sequence that *you* must extract from the Windows 131 * driver (yuanrap.sys) and which we load as a firmware. 132 * 133 * If someone can provide me with a Zarlink MT352 (Intel CE6352?) Design Manual 134 * with chip programming details, then I can remove this annoyance. 135 */ 136static int yuan_mpc718_mt352_reqfw(struct cx18_stream *stream, 137 const struct firmware **fw) 138{ 139 struct cx18 *cx = stream->cx; 140 const char *fn = FWFILE; 141 int ret; 142 143 ret = request_firmware(fw, fn, &cx->pci_dev->dev); 144 if (ret) 145 CX18_ERR("Unable to open firmware file %s\n", fn); 146 else { 147 size_t sz = (*fw)->size; 148 if (sz < 2 || sz > 64 || (sz % 2) != 0) { 149 CX18_ERR("Firmware %s has a bad size: %lu bytes\n", 150 fn, (unsigned long) sz); 151 ret = -EILSEQ; 152 release_firmware(*fw); 153 *fw = NULL; 154 } 155 } 156 157 if (ret) { 158 CX18_ERR("The MPC718 board variant with the MT352 DVB-T" 159 "demodualtor will not work without it\n"); 160 CX18_ERR("Run 'linux/Documentation/dvb/get_dvb_firmware " 161 "mpc718' if you need the firmware\n"); 162 } 163 return ret; 164} 165 166static int yuan_mpc718_mt352_init(struct dvb_frontend *fe) 167{ 168 struct cx18_dvb *dvb = container_of(fe->dvb, 169 struct cx18_dvb, dvb_adapter); 170 struct cx18_stream *stream = dvb->stream; 171 const struct firmware *fw = NULL; 172 int ret; 173 int i; 174 u8 buf[3]; 175 176 ret = yuan_mpc718_mt352_reqfw(stream, &fw); 177 if (ret) 178 return ret; 179 180 /* Loop through all the register-value pairs in the firmware file */ 181 for (i = 0; i < fw->size; i += 2) { 182 buf[0] = fw->data[i]; 183 /* Intercept a few registers we want to set ourselves */ 184 switch (buf[0]) { 185 case TRL_NOMINAL_RATE_0: 186 /* Set our custom OFDM bandwidth in the case below */ 187 break; 188 case TRL_NOMINAL_RATE_1: 189 /* 6 MHz: 64/7 * 6/8 / 20.48 * 2^16 = 0x55b6.db6 */ 190 /* 7 MHz: 64/7 * 7/8 / 20.48 * 2^16 = 0x6400 */ 191 /* 8 MHz: 64/7 * 8/8 / 20.48 * 2^16 = 0x7249.249 */ 192 buf[1] = 0x72; 193 buf[2] = 0x49; 194 mt352_write(fe, buf, 3); 195 break; 196 case INPUT_FREQ_0: 197 /* Set our custom IF in the case below */ 198 break; 199 case INPUT_FREQ_1: 200 /* 4.56 MHz IF: (20.48 - 4.56)/20.48 * 2^14 = 0x31c0 */ 201 buf[1] = 0x31; 202 buf[2] = 0xc0; 203 mt352_write(fe, buf, 3); 204 break; 205 default: 206 /* Pass through the register-value pair from the fw */ 207 buf[1] = fw->data[i+1]; 208 mt352_write(fe, buf, 2); 209 break; 210 } 211 } 212 213 buf[0] = (u8) TUNER_GO; 214 buf[1] = 0x01; /* Go */ 215 mt352_write(fe, buf, 2); 216 release_firmware(fw); 217 return 0; 218} 219 220static struct mt352_config yuan_mpc718_mt352_demod = { 221 .demod_address = 0x1e >> 1, 222 .adc_clock = 20480, /* 20.480 MHz */ 223 .if2 = 4560, /* 4.560 MHz */ 224 .no_tuner = 1, /* XC3028 is not behind the gate */ 225 .demod_init = yuan_mpc718_mt352_init, 226}; 227 228static struct zl10353_config yuan_mpc718_zl10353_demod = { 229 .demod_address = 0x1e >> 1, /* Datasheet suggested straps */ 230 .if2 = 45600, /* 4.560 MHz IF from the XC3028 */ 231 .parallel_ts = 1, /* Not a serial TS */ 232 .no_tuner = 1, /* XC3028 is not behind the gate */ 233 .disable_i2c_gate_ctrl = 1, /* Disable the I2C gate */ 234}; 235 236static struct zl10353_config gotview_dvd3_zl10353_demod = { 237 .demod_address = 0x1e >> 1, /* Datasheet suggested straps */ 238 .if2 = 45600, /* 4.560 MHz IF from the XC3028 */ 239 .parallel_ts = 1, /* Not a serial TS */ 240 .no_tuner = 1, /* XC3028 is not behind the gate */ 241 .disable_i2c_gate_ctrl = 1, /* Disable the I2C gate */ 242}; 243 244static int dvb_register(struct cx18_stream *stream); 245 246/* Kernel DVB framework calls this when the feed needs to start. 247 * The CX18 framework should enable the transport DMA handling 248 * and queue processing. 249 */ 250static int cx18_dvb_start_feed(struct dvb_demux_feed *feed) 251{ 252 struct dvb_demux *demux = feed->demux; 253 struct cx18_stream *stream = (struct cx18_stream *) demux->priv; 254 struct cx18 *cx; 255 int ret; 256 u32 v; 257 258 if (!stream) 259 return -EINVAL; 260 261 cx = stream->cx; 262 CX18_DEBUG_INFO("Start feed: pid = 0x%x index = %d\n", 263 feed->pid, feed->index); 264 265 mutex_lock(&cx->serialize_lock); 266 ret = cx18_init_on_first_open(cx); 267 mutex_unlock(&cx->serialize_lock); 268 if (ret) { 269 CX18_ERR("Failed to initialize firmware starting DVB feed\n"); 270 return ret; 271 } 272 ret = -EINVAL; 273 274 switch (cx->card->type) { 275 case CX18_CARD_HVR_1600_ESMT: 276 case CX18_CARD_HVR_1600_SAMSUNG: 277 case CX18_CARD_HVR_1600_S5H1411: 278 v = cx18_read_reg(cx, CX18_REG_DMUX_NUM_PORT_0_CONTROL); 279 v |= 0x00400000; /* Serial Mode */ 280 v |= 0x00002000; /* Data Length - Byte */ 281 v |= 0x00010000; /* Error - Polarity */ 282 v |= 0x00020000; /* Error - Passthru */ 283 v |= 0x000c0000; /* Error - Ignore */ 284 cx18_write_reg(cx, v, CX18_REG_DMUX_NUM_PORT_0_CONTROL); 285 break; 286 287 case CX18_CARD_LEADTEK_DVR3100H: 288 case CX18_CARD_YUAN_MPC718: 289 case CX18_CARD_GOTVIEW_PCI_DVD3: 290 default: 291 /* Assumption - Parallel transport - Signalling 292 * undefined or default. 293 */ 294 break; 295 } 296 297 if (!demux->dmx.frontend) 298 return -EINVAL; 299 300 mutex_lock(&stream->dvb->feedlock); 301 if (stream->dvb->feeding++ == 0) { 302 CX18_DEBUG_INFO("Starting Transport DMA\n"); 303 mutex_lock(&cx->serialize_lock); 304 set_bit(CX18_F_S_STREAMING, &stream->s_flags); 305 ret = cx18_start_v4l2_encode_stream(stream); 306 if (ret < 0) { 307 CX18_DEBUG_INFO("Failed to start Transport DMA\n"); 308 stream->dvb->feeding--; 309 if (stream->dvb->feeding == 0) 310 clear_bit(CX18_F_S_STREAMING, &stream->s_flags); 311 } 312 mutex_unlock(&cx->serialize_lock); 313 } else 314 ret = 0; 315 mutex_unlock(&stream->dvb->feedlock); 316 317 return ret; 318} 319 320/* Kernel DVB framework calls this when the feed needs to stop. */ 321static int cx18_dvb_stop_feed(struct dvb_demux_feed *feed) 322{ 323 struct dvb_demux *demux = feed->demux; 324 struct cx18_stream *stream = (struct cx18_stream *)demux->priv; 325 struct cx18 *cx; 326 int ret = -EINVAL; 327 328 if (stream) { 329 cx = stream->cx; 330 CX18_DEBUG_INFO("Stop feed: pid = 0x%x index = %d\n", 331 feed->pid, feed->index); 332 333 mutex_lock(&stream->dvb->feedlock); 334 if (--stream->dvb->feeding == 0) { 335 CX18_DEBUG_INFO("Stopping Transport DMA\n"); 336 mutex_lock(&cx->serialize_lock); 337 ret = cx18_stop_v4l2_encode_stream(stream, 0); 338 mutex_unlock(&cx->serialize_lock); 339 } else 340 ret = 0; 341 mutex_unlock(&stream->dvb->feedlock); 342 } 343 344 return ret; 345} 346 347int cx18_dvb_register(struct cx18_stream *stream) 348{ 349 struct cx18 *cx = stream->cx; 350 struct cx18_dvb *dvb = stream->dvb; 351 struct dvb_adapter *dvb_adapter; 352 struct dvb_demux *dvbdemux; 353 struct dmx_demux *dmx; 354 int ret; 355 356 if (!dvb) 357 return -EINVAL; 358 359 dvb->enabled = 0; 360 dvb->stream = stream; 361 362 ret = dvb_register_adapter(&dvb->dvb_adapter, 363 CX18_DRIVER_NAME, 364 THIS_MODULE, &cx->pci_dev->dev, adapter_nr); 365 if (ret < 0) 366 goto err_out; 367 368 dvb_adapter = &dvb->dvb_adapter; 369 370 dvbdemux = &dvb->demux; 371 372 dvbdemux->priv = (void *)stream; 373 374 dvbdemux->filternum = 256; 375 dvbdemux->feednum = 256; 376 dvbdemux->start_feed = cx18_dvb_start_feed; 377 dvbdemux->stop_feed = cx18_dvb_stop_feed; 378 dvbdemux->dmx.capabilities = (DMX_TS_FILTERING | 379 DMX_SECTION_FILTERING | DMX_MEMORY_BASED_FILTERING); 380 ret = dvb_dmx_init(dvbdemux); 381 if (ret < 0) 382 goto err_dvb_unregister_adapter; 383 384 dmx = &dvbdemux->dmx; 385 386 dvb->hw_frontend.source = DMX_FRONTEND_0; 387 dvb->mem_frontend.source = DMX_MEMORY_FE; 388 dvb->dmxdev.filternum = 256; 389 dvb->dmxdev.demux = dmx; 390 391 ret = dvb_dmxdev_init(&dvb->dmxdev, dvb_adapter); 392 if (ret < 0) 393 goto err_dvb_dmx_release; 394 395 ret = dmx->add_frontend(dmx, &dvb->hw_frontend); 396 if (ret < 0) 397 goto err_dvb_dmxdev_release; 398 399 ret = dmx->add_frontend(dmx, &dvb->mem_frontend); 400 if (ret < 0) 401 goto err_remove_hw_frontend; 402 403 ret = dmx->connect_frontend(dmx, &dvb->hw_frontend); 404 if (ret < 0) 405 goto err_remove_mem_frontend; 406 407 ret = dvb_register(stream); 408 if (ret < 0) 409 goto err_disconnect_frontend; 410 411 dvb_net_init(dvb_adapter, &dvb->dvbnet, dmx); 412 413 CX18_INFO("DVB Frontend registered\n"); 414 CX18_INFO("Registered DVB adapter%d for %s (%d x %d.%02d kB)\n", 415 stream->dvb->dvb_adapter.num, stream->name, 416 stream->buffers, stream->buf_size/1024, 417 (stream->buf_size * 100 / 1024) % 100); 418 419 mutex_init(&dvb->feedlock); 420 dvb->enabled = 1; 421 return ret; 422 423err_disconnect_frontend: 424 dmx->disconnect_frontend(dmx); 425err_remove_mem_frontend: 426 dmx->remove_frontend(dmx, &dvb->mem_frontend); 427err_remove_hw_frontend: 428 dmx->remove_frontend(dmx, &dvb->hw_frontend); 429err_dvb_dmxdev_release: 430 dvb_dmxdev_release(&dvb->dmxdev); 431err_dvb_dmx_release: 432 dvb_dmx_release(dvbdemux); 433err_dvb_unregister_adapter: 434 dvb_unregister_adapter(dvb_adapter); 435err_out: 436 return ret; 437} 438 439void cx18_dvb_unregister(struct cx18_stream *stream) 440{ 441 struct cx18 *cx = stream->cx; 442 struct cx18_dvb *dvb = stream->dvb; 443 struct dvb_adapter *dvb_adapter; 444 struct dvb_demux *dvbdemux; 445 struct dmx_demux *dmx; 446 447 CX18_INFO("unregister DVB\n"); 448 449 if (dvb == NULL || !dvb->enabled) 450 return; 451 452 dvb_adapter = &dvb->dvb_adapter; 453 dvbdemux = &dvb->demux; 454 dmx = &dvbdemux->dmx; 455 456 dmx->close(dmx); 457 dvb_net_release(&dvb->dvbnet); 458 dmx->remove_frontend(dmx, &dvb->mem_frontend); 459 dmx->remove_frontend(dmx, &dvb->hw_frontend); 460 dvb_dmxdev_release(&dvb->dmxdev); 461 dvb_dmx_release(dvbdemux); 462 dvb_unregister_frontend(dvb->fe); 463 dvb_frontend_detach(dvb->fe); 464 dvb_unregister_adapter(dvb_adapter); 465} 466 467/* All the DVB attach calls go here, this function get's modified 468 * for each new card. cx18_dvb_start_feed() will also need changes. 469 */ 470static int dvb_register(struct cx18_stream *stream) 471{ 472 struct cx18_dvb *dvb = stream->dvb; 473 struct cx18 *cx = stream->cx; 474 int ret = 0; 475 476 switch (cx->card->type) { 477 case CX18_CARD_HVR_1600_ESMT: 478 case CX18_CARD_HVR_1600_SAMSUNG: 479 dvb->fe = dvb_attach(s5h1409_attach, 480 &hauppauge_hvr1600_config, 481 &cx->i2c_adap[0]); 482 if (dvb->fe != NULL) { 483 dvb_attach(mxl5005s_attach, dvb->fe, 484 &cx->i2c_adap[0], 485 &hauppauge_hvr1600_tuner); 486 ret = 0; 487 } 488 break; 489 case CX18_CARD_HVR_1600_S5H1411: 490 dvb->fe = dvb_attach(s5h1411_attach, 491 &hcw_s5h1411_config, 492 &cx->i2c_adap[0]); 493 if (dvb->fe != NULL) 494 dvb_attach(tda18271_attach, dvb->fe, 495 0x60, &cx->i2c_adap[0], 496 &hauppauge_tda18271_config); 497 break; 498 case CX18_CARD_LEADTEK_DVR3100H: 499 dvb->fe = dvb_attach(zl10353_attach, 500 &leadtek_dvr3100h_demod, 501 &cx->i2c_adap[1]); 502 if (dvb->fe != NULL) { 503 struct dvb_frontend *fe; 504 struct xc2028_config cfg = { 505 .i2c_adap = &cx->i2c_adap[1], 506 .i2c_addr = 0xc2 >> 1, 507 .ctrl = NULL, 508 }; 509 static struct xc2028_ctrl ctrl = { 510 .fname = XC2028_DEFAULT_FIRMWARE, 511 .max_len = 64, 512 .demod = XC3028_FE_ZARLINK456, 513 .type = XC2028_AUTO, 514 }; 515 516 fe = dvb_attach(xc2028_attach, dvb->fe, &cfg); 517 if (fe != NULL && fe->ops.tuner_ops.set_config != NULL) 518 fe->ops.tuner_ops.set_config(fe, &ctrl); 519 } 520 break; 521 case CX18_CARD_YUAN_MPC718: 522 /* 523 * TODO 524 * Apparently, these cards also could instead have a 525 * DiBcom demod supported by one of the db7000 drivers 526 */ 527 dvb->fe = dvb_attach(mt352_attach, 528 &yuan_mpc718_mt352_demod, 529 &cx->i2c_adap[1]); 530 if (dvb->fe == NULL) 531 dvb->fe = dvb_attach(zl10353_attach, 532 &yuan_mpc718_zl10353_demod, 533 &cx->i2c_adap[1]); 534 if (dvb->fe != NULL) { 535 struct dvb_frontend *fe; 536 struct xc2028_config cfg = { 537 .i2c_adap = &cx->i2c_adap[1], 538 .i2c_addr = 0xc2 >> 1, 539 .ctrl = NULL, 540 }; 541 static struct xc2028_ctrl ctrl = { 542 .fname = XC2028_DEFAULT_FIRMWARE, 543 .max_len = 64, 544 .demod = XC3028_FE_ZARLINK456, 545 .type = XC2028_AUTO, 546 }; 547 548 fe = dvb_attach(xc2028_attach, dvb->fe, &cfg); 549 if (fe != NULL && fe->ops.tuner_ops.set_config != NULL) 550 fe->ops.tuner_ops.set_config(fe, &ctrl); 551 } 552 break; 553 case CX18_CARD_GOTVIEW_PCI_DVD3: 554 dvb->fe = dvb_attach(zl10353_attach, 555 &gotview_dvd3_zl10353_demod, 556 &cx->i2c_adap[1]); 557 if (dvb->fe != NULL) { 558 struct dvb_frontend *fe; 559 struct xc2028_config cfg = { 560 .i2c_adap = &cx->i2c_adap[1], 561 .i2c_addr = 0xc2 >> 1, 562 .ctrl = NULL, 563 }; 564 static struct xc2028_ctrl ctrl = { 565 .fname = XC2028_DEFAULT_FIRMWARE, 566 .max_len = 64, 567 .demod = XC3028_FE_ZARLINK456, 568 .type = XC2028_AUTO, 569 }; 570 571 fe = dvb_attach(xc2028_attach, dvb->fe, &cfg); 572 if (fe != NULL && fe->ops.tuner_ops.set_config != NULL) 573 fe->ops.tuner_ops.set_config(fe, &ctrl); 574 } 575 break; 576 default: 577 /* No Digital Tv Support */ 578 break; 579 } 580 581 if (dvb->fe == NULL) { 582 CX18_ERR("frontend initialization failed\n"); 583 return -1; 584 } 585 586 dvb->fe->callback = cx18_reset_tuner_gpio; 587 588 ret = dvb_register_frontend(&dvb->dvb_adapter, dvb->fe); 589 if (ret < 0) { 590 if (dvb->fe->ops.release) 591 dvb->fe->ops.release(dvb->fe); 592 return ret; 593 } 594 595 /* 596 * The firmware seems to enable the TS DMUX clock 597 * under various circumstances. However, since we know we 598 * might use it, let's just turn it on ourselves here. 599 */ 600 cx18_write_reg_expect(cx, 601 (CX18_DMUX_CLK_MASK << 16) | CX18_DMUX_CLK_MASK, 602 CX18_CLOCK_ENABLE2, 603 CX18_DMUX_CLK_MASK, 604 (CX18_DMUX_CLK_MASK << 16) | CX18_DMUX_CLK_MASK); 605 606 return ret; 607} 608 609MODULE_FIRMWARE(FWFILE); 610