1/* 2 * Winbond W6692 specific defines 3 * 4 * Author Karsten Keil <keil@isdn4linux.de> 5 * based on the w6692 I4L driver from Petr Novak <petr.novak@i.cz> 6 * 7 * Copyright 2009 by Karsten Keil <keil@isdn4linux.de> 8 * 9 * This program is free software; you can redistribute it and/or modify 10 * it under the terms of the GNU General Public License version 2 as 11 * published by the Free Software Foundation. 12 * 13 * This program is distributed in the hope that it will be useful, 14 * but WITHOUT ANY WARRANTY; without even the implied warranty of 15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 16 * GNU General Public License for more details. 17 * 18 * You should have received a copy of the GNU General Public License 19 * along with this program; if not, write to the Free Software 20 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. 21 * 22 */ 23 24/* Specifications of W6692 registers */ 25 26#define W_D_RFIFO 0x00 /* R */ 27#define W_D_XFIFO 0x04 /* W */ 28#define W_D_CMDR 0x08 /* W */ 29#define W_D_MODE 0x0c /* R/W */ 30#define W_D_TIMR 0x10 /* R/W */ 31#define W_ISTA 0x14 /* R_clr */ 32#define W_IMASK 0x18 /* R/W */ 33#define W_D_EXIR 0x1c /* R_clr */ 34#define W_D_EXIM 0x20 /* R/W */ 35#define W_D_STAR 0x24 /* R */ 36#define W_D_RSTA 0x28 /* R */ 37#define W_D_SAM 0x2c /* R/W */ 38#define W_D_SAP1 0x30 /* R/W */ 39#define W_D_SAP2 0x34 /* R/W */ 40#define W_D_TAM 0x38 /* R/W */ 41#define W_D_TEI1 0x3c /* R/W */ 42#define W_D_TEI2 0x40 /* R/W */ 43#define W_D_RBCH 0x44 /* R */ 44#define W_D_RBCL 0x48 /* R */ 45#define W_TIMR2 0x4c /* W */ 46#define W_L1_RC 0x50 /* R/W */ 47#define W_D_CTL 0x54 /* R/W */ 48#define W_CIR 0x58 /* R */ 49#define W_CIX 0x5c /* W */ 50#define W_SQR 0x60 /* R */ 51#define W_SQX 0x64 /* W */ 52#define W_PCTL 0x68 /* R/W */ 53#define W_MOR 0x6c /* R */ 54#define W_MOX 0x70 /* R/W */ 55#define W_MOSR 0x74 /* R_clr */ 56#define W_MOCR 0x78 /* R/W */ 57#define W_GCR 0x7c /* R/W */ 58 59#define W_B_RFIFO 0x80 /* R */ 60#define W_B_XFIFO 0x84 /* W */ 61#define W_B_CMDR 0x88 /* W */ 62#define W_B_MODE 0x8c /* R/W */ 63#define W_B_EXIR 0x90 /* R_clr */ 64#define W_B_EXIM 0x94 /* R/W */ 65#define W_B_STAR 0x98 /* R */ 66#define W_B_ADM1 0x9c /* R/W */ 67#define W_B_ADM2 0xa0 /* R/W */ 68#define W_B_ADR1 0xa4 /* R/W */ 69#define W_B_ADR2 0xa8 /* R/W */ 70#define W_B_RBCL 0xac /* R */ 71#define W_B_RBCH 0xb0 /* R */ 72 73#define W_XADDR 0xf4 /* R/W */ 74#define W_XDATA 0xf8 /* R/W */ 75#define W_EPCTL 0xfc /* W */ 76 77/* W6692 register bits */ 78 79#define W_D_CMDR_XRST 0x01 80#define W_D_CMDR_XME 0x02 81#define W_D_CMDR_XMS 0x08 82#define W_D_CMDR_STT 0x10 83#define W_D_CMDR_RRST 0x40 84#define W_D_CMDR_RACK 0x80 85 86#define W_D_MODE_RLP 0x01 87#define W_D_MODE_DLP 0x02 88#define W_D_MODE_MFD 0x04 89#define W_D_MODE_TEE 0x08 90#define W_D_MODE_TMS 0x10 91#define W_D_MODE_RACT 0x40 92#define W_D_MODE_MMS 0x80 93 94#define W_INT_B2_EXI 0x01 95#define W_INT_B1_EXI 0x02 96#define W_INT_D_EXI 0x04 97#define W_INT_XINT0 0x08 98#define W_INT_XINT1 0x10 99#define W_INT_D_XFR 0x20 100#define W_INT_D_RME 0x40 101#define W_INT_D_RMR 0x80 102 103#define W_D_EXI_WEXP 0x01 104#define W_D_EXI_TEXP 0x02 105#define W_D_EXI_ISC 0x04 106#define W_D_EXI_MOC 0x08 107#define W_D_EXI_TIN2 0x10 108#define W_D_EXI_XCOL 0x20 109#define W_D_EXI_XDUN 0x40 110#define W_D_EXI_RDOV 0x80 111 112#define W_D_STAR_DRDY 0x10 113#define W_D_STAR_XBZ 0x20 114#define W_D_STAR_XDOW 0x80 115 116#define W_D_RSTA_RMB 0x10 117#define W_D_RSTA_CRCE 0x20 118#define W_D_RSTA_RDOV 0x40 119 120#define W_D_CTL_SRST 0x20 121 122#define W_CIR_SCC 0x80 123#define W_CIR_ICC 0x40 124#define W_CIR_COD_MASK 0x0f 125 126#define W_PCTL_PCX 0x01 127#define W_PCTL_XMODE 0x02 128#define W_PCTL_OE0 0x04 129#define W_PCTL_OE1 0x08 130#define W_PCTL_OE2 0x10 131#define W_PCTL_OE3 0x20 132#define W_PCTL_OE4 0x40 133#define W_PCTL_OE5 0x80 134 135#define W_B_CMDR_XRST 0x01 136#define W_B_CMDR_XME 0x02 137#define W_B_CMDR_XMS 0x04 138#define W_B_CMDR_RACT 0x20 139#define W_B_CMDR_RRST 0x40 140#define W_B_CMDR_RACK 0x80 141 142#define W_B_MODE_FTS0 0x01 143#define W_B_MODE_FTS1 0x02 144#define W_B_MODE_SW56 0x04 145#define W_B_MODE_BSW0 0x08 146#define W_B_MODE_BSW1 0x10 147#define W_B_MODE_EPCM 0x20 148#define W_B_MODE_ITF 0x40 149#define W_B_MODE_MMS 0x80 150 151#define W_B_EXI_XDUN 0x01 152#define W_B_EXI_XFR 0x02 153#define W_B_EXI_RDOV 0x10 154#define W_B_EXI_RME 0x20 155#define W_B_EXI_RMR 0x40 156 157#define W_B_STAR_XBZ 0x01 158#define W_B_STAR_XDOW 0x04 159#define W_B_STAR_RMB 0x10 160#define W_B_STAR_CRCE 0x20 161#define W_B_STAR_RDOV 0x40 162 163#define W_B_RBCH_LOV 0x20 164 165/* W6692 Layer1 commands */ 166 167#define W_L1CMD_ECK 0x00 168#define W_L1CMD_RST 0x01 169#define W_L1CMD_SCP 0x04 170#define W_L1CMD_SSP 0x02 171#define W_L1CMD_AR8 0x08 172#define W_L1CMD_AR10 0x09 173#define W_L1CMD_EAL 0x0a 174#define W_L1CMD_DRC 0x0f 175 176/* W6692 Layer1 indications */ 177 178#define W_L1IND_CE 0x07 179#define W_L1IND_DRD 0x00 180#define W_L1IND_LD 0x04 181#define W_L1IND_ARD 0x08 182#define W_L1IND_TI 0x0a 183#define W_L1IND_ATI 0x0b 184#define W_L1IND_AI8 0x0c 185#define W_L1IND_AI10 0x0d 186#define W_L1IND_CD 0x0f 187 188/* FIFO thresholds */ 189#define W_D_FIFO_THRESH 64 190#define W_B_FIFO_THRESH 64 191