1/*
2 * mISDNisar.c   ISAR (Siemens PSB 7110) specific functions
3 *
4 * Author Karsten Keil (keil@isdn4linux.de)
5 *
6 * Copyright 2009  by Karsten Keil <keil@isdn4linux.de>
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
20 *
21 */
22
23/* define this to enable static debug messages, if you kernel supports
24 * dynamic debugging, you should use debugfs for this
25 */
26/* #define DEBUG */
27
28#include <linux/gfp.h>
29#include <linux/delay.h>
30#include <linux/vmalloc.h>
31#include <linux/mISDNhw.h>
32#include <linux/module.h>
33#include "isar.h"
34
35#define ISAR_REV	"2.1"
36
37MODULE_AUTHOR("Karsten Keil");
38MODULE_LICENSE("GPL v2");
39MODULE_VERSION(ISAR_REV);
40
41#define DEBUG_HW_FIRMWARE_FIFO	0x10000
42
43static const u8 faxmodulation_s[] = "3,24,48,72,73,74,96,97,98,121,122,145,146";
44static const u8 faxmodulation[] = {3, 24, 48, 72, 73, 74, 96, 97, 98, 121,
45				   122, 145, 146};
46#define FAXMODCNT 13
47
48static void isar_setup(struct isar_hw *);
49
50static inline int
51waitforHIA(struct isar_hw *isar, int timeout)
52{
53	int t = timeout;
54	u8 val = isar->read_reg(isar->hw, ISAR_HIA);
55
56	while ((val & 1) && t) {
57		udelay(1);
58		t--;
59		val = isar->read_reg(isar->hw, ISAR_HIA);
60	}
61	pr_debug("%s: HIA after %dus\n", isar->name, timeout - t);
62	return timeout;
63}
64
65/*
66 * send msg to ISAR mailbox
67 * if msg is NULL use isar->buf
68 */
69static int
70send_mbox(struct isar_hw *isar, u8 his, u8 creg, u8 len, u8 *msg)
71{
72	if (!waitforHIA(isar, 1000))
73		return 0;
74	pr_debug("send_mbox(%02x,%02x,%d)\n", his, creg, len);
75	isar->write_reg(isar->hw, ISAR_CTRL_H, creg);
76	isar->write_reg(isar->hw, ISAR_CTRL_L, len);
77	isar->write_reg(isar->hw, ISAR_WADR, 0);
78	if (!msg)
79		msg = isar->buf;
80	if (msg && len) {
81		isar->write_fifo(isar->hw, ISAR_MBOX, msg, len);
82		if (isar->ch[0].bch.debug & DEBUG_HW_BFIFO) {
83			int l = 0;
84
85			while (l < (int)len) {
86				hex_dump_to_buffer(msg + l, len - l, 32, 1,
87						   isar->log, 256, 1);
88				pr_debug("%s: %s %02x: %s\n", isar->name,
89					 __func__, l, isar->log);
90				l += 32;
91			}
92		}
93	}
94	isar->write_reg(isar->hw, ISAR_HIS, his);
95	waitforHIA(isar, 1000);
96	return 1;
97}
98
99/*
100 * receive message from ISAR mailbox
101 * if msg is NULL use isar->buf
102 */
103static void
104rcv_mbox(struct isar_hw *isar, u8 *msg)
105{
106	if (!msg)
107		msg = isar->buf;
108	isar->write_reg(isar->hw, ISAR_RADR, 0);
109	if (msg && isar->clsb) {
110		isar->read_fifo(isar->hw, ISAR_MBOX, msg, isar->clsb);
111		if (isar->ch[0].bch.debug & DEBUG_HW_BFIFO) {
112			int l = 0;
113
114			while (l < (int)isar->clsb) {
115				hex_dump_to_buffer(msg + l, isar->clsb - l, 32,
116						   1, isar->log, 256, 1);
117				pr_debug("%s: %s %02x: %s\n", isar->name,
118					 __func__, l, isar->log);
119				l += 32;
120			}
121		}
122	}
123	isar->write_reg(isar->hw, ISAR_IIA, 0);
124}
125
126static inline void
127get_irq_infos(struct isar_hw *isar)
128{
129	isar->iis = isar->read_reg(isar->hw, ISAR_IIS);
130	isar->cmsb = isar->read_reg(isar->hw, ISAR_CTRL_H);
131	isar->clsb = isar->read_reg(isar->hw, ISAR_CTRL_L);
132	pr_debug("%s: rcv_mbox(%02x,%02x,%d)\n", isar->name,
133		 isar->iis, isar->cmsb, isar->clsb);
134}
135
136/*
137 * poll answer message from ISAR mailbox
138 * should be used only with ISAR IRQs disabled before DSP was started
139 *
140 */
141static int
142poll_mbox(struct isar_hw *isar, int maxdelay)
143{
144	int t = maxdelay;
145	u8 irq;
146
147	irq = isar->read_reg(isar->hw, ISAR_IRQBIT);
148	while (t && !(irq & ISAR_IRQSTA)) {
149		udelay(1);
150		t--;
151	}
152	if (t)	{
153		get_irq_infos(isar);
154		rcv_mbox(isar, NULL);
155	}
156	pr_debug("%s: pulled %d bytes after %d us\n",
157		 isar->name, isar->clsb, maxdelay - t);
158	return t;
159}
160
161static int
162ISARVersion(struct isar_hw *isar)
163{
164	int ver;
165
166	/* disable ISAR IRQ */
167	isar->write_reg(isar->hw, ISAR_IRQBIT, 0);
168	isar->buf[0] = ISAR_MSG_HWVER;
169	isar->buf[1] = 0;
170	isar->buf[2] = 1;
171	if (!send_mbox(isar, ISAR_HIS_VNR, 0, 3, NULL))
172		return -1;
173	if (!poll_mbox(isar, 1000))
174		return -2;
175	if (isar->iis == ISAR_IIS_VNR) {
176		if (isar->clsb == 1) {
177			ver = isar->buf[0] & 0xf;
178			return ver;
179		}
180		return -3;
181	}
182	return -4;
183}
184
185static int
186load_firmware(struct isar_hw *isar, const u8 *buf, int size)
187{
188	u32	saved_debug = isar->ch[0].bch.debug;
189	int	ret, cnt;
190	u8	nom, noc;
191	u16	left, val, *sp = (u16 *)buf;
192	u8	*mp;
193	u_long	flags;
194
195	struct {
196		u16 sadr;
197		u16 len;
198		u16 d_key;
199	} blk_head;
200
201	if (1 != isar->version) {
202		pr_err("%s: ISAR wrong version %d firmware download aborted\n",
203		       isar->name, isar->version);
204		return -EINVAL;
205	}
206	if (!(saved_debug & DEBUG_HW_FIRMWARE_FIFO))
207		isar->ch[0].bch.debug &= ~DEBUG_HW_BFIFO;
208	pr_debug("%s: load firmware %d words (%d bytes)\n",
209		 isar->name, size / 2, size);
210	cnt = 0;
211	size /= 2;
212	/* disable ISAR IRQ */
213	spin_lock_irqsave(isar->hwlock, flags);
214	isar->write_reg(isar->hw, ISAR_IRQBIT, 0);
215	spin_unlock_irqrestore(isar->hwlock, flags);
216	while (cnt < size) {
217		blk_head.sadr = le16_to_cpu(*sp++);
218		blk_head.len = le16_to_cpu(*sp++);
219		blk_head.d_key = le16_to_cpu(*sp++);
220		cnt += 3;
221		pr_debug("ISAR firmware block (%#x,%d,%#x)\n",
222			 blk_head.sadr, blk_head.len, blk_head.d_key & 0xff);
223		left = blk_head.len;
224		if (cnt + left > size) {
225			pr_info("%s: firmware error have %d need %d words\n",
226				isar->name, size, cnt + left);
227			ret = -EINVAL;
228			goto reterrflg;
229		}
230		spin_lock_irqsave(isar->hwlock, flags);
231		if (!send_mbox(isar, ISAR_HIS_DKEY, blk_head.d_key & 0xff,
232			       0, NULL)) {
233			pr_info("ISAR send_mbox dkey failed\n");
234			ret = -ETIME;
235			goto reterror;
236		}
237		if (!poll_mbox(isar, 1000)) {
238			pr_warning("ISAR poll_mbox dkey failed\n");
239			ret = -ETIME;
240			goto reterror;
241		}
242		spin_unlock_irqrestore(isar->hwlock, flags);
243		if ((isar->iis != ISAR_IIS_DKEY) || isar->cmsb || isar->clsb) {
244			pr_info("ISAR wrong dkey response (%x,%x,%x)\n",
245				isar->iis, isar->cmsb, isar->clsb);
246			ret = 1;
247			goto reterrflg;
248		}
249		while (left > 0) {
250			if (left > 126)
251				noc = 126;
252			else
253				noc = left;
254			nom = (2 * noc) + 3;
255			mp  = isar->buf;
256			/* the ISAR is big endian */
257			*mp++ = blk_head.sadr >> 8;
258			*mp++ = blk_head.sadr & 0xFF;
259			left -= noc;
260			cnt += noc;
261			*mp++ = noc;
262			pr_debug("%s: load %3d words at %04x\n", isar->name,
263				 noc, blk_head.sadr);
264			blk_head.sadr += noc;
265			while (noc) {
266				val = le16_to_cpu(*sp++);
267				*mp++ = val >> 8;
268				*mp++ = val & 0xFF;
269				noc--;
270			}
271			spin_lock_irqsave(isar->hwlock, flags);
272			if (!send_mbox(isar, ISAR_HIS_FIRM, 0, nom, NULL)) {
273				pr_info("ISAR send_mbox prog failed\n");
274				ret = -ETIME;
275				goto reterror;
276			}
277			if (!poll_mbox(isar, 1000)) {
278				pr_info("ISAR poll_mbox prog failed\n");
279				ret = -ETIME;
280				goto reterror;
281			}
282			spin_unlock_irqrestore(isar->hwlock, flags);
283			if ((isar->iis != ISAR_IIS_FIRM) ||
284			    isar->cmsb || isar->clsb) {
285				pr_info("ISAR wrong prog response (%x,%x,%x)\n",
286					isar->iis, isar->cmsb, isar->clsb);
287				ret = -EIO;
288				goto reterrflg;
289			}
290		}
291		pr_debug("%s: ISAR firmware block %d words loaded\n",
292			 isar->name, blk_head.len);
293	}
294	isar->ch[0].bch.debug = saved_debug;
295	/* 10ms delay */
296	cnt = 10;
297	while (cnt--)
298		mdelay(1);
299	isar->buf[0] = 0xff;
300	isar->buf[1] = 0xfe;
301	isar->bstat = 0;
302	spin_lock_irqsave(isar->hwlock, flags);
303	if (!send_mbox(isar, ISAR_HIS_STDSP, 0, 2, NULL)) {
304		pr_info("ISAR send_mbox start dsp failed\n");
305		ret = -ETIME;
306		goto reterror;
307	}
308	if (!poll_mbox(isar, 1000)) {
309		pr_info("ISAR poll_mbox start dsp failed\n");
310		ret = -ETIME;
311		goto reterror;
312	}
313	if ((isar->iis != ISAR_IIS_STDSP) || isar->cmsb || isar->clsb) {
314		pr_info("ISAR wrong start dsp response (%x,%x,%x)\n",
315			isar->iis, isar->cmsb, isar->clsb);
316		ret = -EIO;
317		goto reterror;
318	} else
319		pr_debug("%s: ISAR start dsp success\n", isar->name);
320
321	/* NORMAL mode entered */
322	/* Enable IRQs of ISAR */
323	isar->write_reg(isar->hw, ISAR_IRQBIT, ISAR_IRQSTA);
324	spin_unlock_irqrestore(isar->hwlock, flags);
325	cnt = 1000; /* max 1s */
326	while ((!isar->bstat) && cnt) {
327		mdelay(1);
328		cnt--;
329	}
330	if (!cnt) {
331		pr_info("ISAR no general status event received\n");
332		ret = -ETIME;
333		goto reterrflg;
334	} else
335		pr_debug("%s: ISAR general status event %x\n",
336			 isar->name, isar->bstat);
337	/* 10ms delay */
338	cnt = 10;
339	while (cnt--)
340		mdelay(1);
341	isar->iis = 0;
342	spin_lock_irqsave(isar->hwlock, flags);
343	if (!send_mbox(isar, ISAR_HIS_DIAG, ISAR_CTRL_STST, 0, NULL)) {
344		pr_info("ISAR send_mbox self tst failed\n");
345		ret = -ETIME;
346		goto reterror;
347	}
348	spin_unlock_irqrestore(isar->hwlock, flags);
349	cnt = 10000; /* max 100 ms */
350	while ((isar->iis != ISAR_IIS_DIAG) && cnt) {
351		udelay(10);
352		cnt--;
353	}
354	mdelay(1);
355	if (!cnt) {
356		pr_info("ISAR no self tst response\n");
357		ret = -ETIME;
358		goto reterrflg;
359	}
360	if ((isar->cmsb == ISAR_CTRL_STST) && (isar->clsb == 1)
361	    && (isar->buf[0] == 0))
362		pr_debug("%s: ISAR selftest OK\n", isar->name);
363	else {
364		pr_info("ISAR selftest not OK %x/%x/%x\n",
365			isar->cmsb, isar->clsb, isar->buf[0]);
366		ret = -EIO;
367		goto reterrflg;
368	}
369	spin_lock_irqsave(isar->hwlock, flags);
370	isar->iis = 0;
371	if (!send_mbox(isar, ISAR_HIS_DIAG, ISAR_CTRL_SWVER, 0, NULL)) {
372		pr_info("ISAR RQST SVN failed\n");
373		ret = -ETIME;
374		goto reterror;
375	}
376	spin_unlock_irqrestore(isar->hwlock, flags);
377	cnt = 30000; /* max 300 ms */
378	while ((isar->iis != ISAR_IIS_DIAG) && cnt) {
379		udelay(10);
380		cnt--;
381	}
382	mdelay(1);
383	if (!cnt) {
384		pr_info("ISAR no SVN response\n");
385		ret = -ETIME;
386		goto reterrflg;
387	} else {
388		if ((isar->cmsb == ISAR_CTRL_SWVER) && (isar->clsb == 1)) {
389			pr_notice("%s: ISAR software version %#x\n",
390				  isar->name, isar->buf[0]);
391		} else {
392			pr_info("%s: ISAR wrong swver response (%x,%x)"
393				" cnt(%d)\n", isar->name, isar->cmsb,
394				isar->clsb, cnt);
395			ret = -EIO;
396			goto reterrflg;
397		}
398	}
399	spin_lock_irqsave(isar->hwlock, flags);
400	isar_setup(isar);
401	spin_unlock_irqrestore(isar->hwlock, flags);
402	ret = 0;
403reterrflg:
404	spin_lock_irqsave(isar->hwlock, flags);
405reterror:
406	isar->ch[0].bch.debug = saved_debug;
407	if (ret)
408		/* disable ISAR IRQ */
409		isar->write_reg(isar->hw, ISAR_IRQBIT, 0);
410	spin_unlock_irqrestore(isar->hwlock, flags);
411	return ret;
412}
413
414static inline void
415deliver_status(struct isar_ch *ch, int status)
416{
417	pr_debug("%s: HL->LL FAXIND %x\n", ch->is->name, status);
418	_queue_data(&ch->bch.ch, PH_CONTROL_IND, status, 0, NULL, GFP_ATOMIC);
419}
420
421static inline void
422isar_rcv_frame(struct isar_ch *ch)
423{
424	u8	*ptr;
425	int	maxlen;
426
427	if (!ch->is->clsb) {
428		pr_debug("%s; ISAR zero len frame\n", ch->is->name);
429		ch->is->write_reg(ch->is->hw, ISAR_IIA, 0);
430		return;
431	}
432	if (test_bit(FLG_RX_OFF, &ch->bch.Flags)) {
433		ch->bch.dropcnt += ch->is->clsb;
434		ch->is->write_reg(ch->is->hw, ISAR_IIA, 0);
435		return;
436	}
437	switch (ch->bch.state) {
438	case ISDN_P_NONE:
439		pr_debug("%s: ISAR protocol 0 spurious IIS_RDATA %x/%x/%x\n",
440			 ch->is->name, ch->is->iis, ch->is->cmsb, ch->is->clsb);
441		ch->is->write_reg(ch->is->hw, ISAR_IIA, 0);
442		break;
443	case ISDN_P_B_RAW:
444	case ISDN_P_B_L2DTMF:
445	case ISDN_P_B_MODEM_ASYNC:
446		maxlen = bchannel_get_rxbuf(&ch->bch, ch->is->clsb);
447		if (maxlen < 0) {
448			pr_warning("%s.B%d: No bufferspace for %d bytes\n",
449				   ch->is->name, ch->bch.nr, ch->is->clsb);
450			ch->is->write_reg(ch->is->hw, ISAR_IIA, 0);
451			break;
452		}
453		rcv_mbox(ch->is, skb_put(ch->bch.rx_skb, ch->is->clsb));
454		recv_Bchannel(&ch->bch, 0, false);
455		break;
456	case ISDN_P_B_HDLC:
457		maxlen = bchannel_get_rxbuf(&ch->bch, ch->is->clsb);
458		if (maxlen < 0) {
459			pr_warning("%s.B%d: No bufferspace for %d bytes\n",
460				   ch->is->name, ch->bch.nr, ch->is->clsb);
461			ch->is->write_reg(ch->is->hw, ISAR_IIA, 0);
462			break;
463		}
464		if (ch->is->cmsb & HDLC_ERROR) {
465			pr_debug("%s: ISAR frame error %x len %d\n",
466				 ch->is->name, ch->is->cmsb, ch->is->clsb);
467#ifdef ERROR_STATISTIC
468			if (ch->is->cmsb & HDLC_ERR_RER)
469				ch->bch.err_inv++;
470			if (ch->is->cmsb & HDLC_ERR_CER)
471				ch->bch.err_crc++;
472#endif
473			skb_trim(ch->bch.rx_skb, 0);
474			ch->is->write_reg(ch->is->hw, ISAR_IIA, 0);
475			break;
476		}
477		if (ch->is->cmsb & HDLC_FSD)
478			skb_trim(ch->bch.rx_skb, 0);
479		ptr = skb_put(ch->bch.rx_skb, ch->is->clsb);
480		rcv_mbox(ch->is, ptr);
481		if (ch->is->cmsb & HDLC_FED) {
482			if (ch->bch.rx_skb->len < 3) { /* last 2 are the FCS */
483				pr_debug("%s: ISAR frame to short %d\n",
484					 ch->is->name, ch->bch.rx_skb->len);
485				skb_trim(ch->bch.rx_skb, 0);
486				break;
487			}
488			skb_trim(ch->bch.rx_skb, ch->bch.rx_skb->len - 2);
489			recv_Bchannel(&ch->bch, 0, false);
490		}
491		break;
492	case ISDN_P_B_T30_FAX:
493		if (ch->state != STFAX_ACTIV) {
494			pr_debug("%s: isar_rcv_frame: not ACTIV\n",
495				 ch->is->name);
496			ch->is->write_reg(ch->is->hw, ISAR_IIA, 0);
497			if (ch->bch.rx_skb)
498				skb_trim(ch->bch.rx_skb, 0);
499			break;
500		}
501		if (!ch->bch.rx_skb) {
502			ch->bch.rx_skb = mI_alloc_skb(ch->bch.maxlen,
503						      GFP_ATOMIC);
504			if (unlikely(!ch->bch.rx_skb)) {
505				pr_info("%s: B receive out of memory\n",
506					__func__);
507				ch->is->write_reg(ch->is->hw, ISAR_IIA, 0);
508				break;
509			}
510		}
511		if (ch->cmd == PCTRL_CMD_FRM) {
512			rcv_mbox(ch->is, skb_put(ch->bch.rx_skb, ch->is->clsb));
513			pr_debug("%s: isar_rcv_frame: %d\n",
514				 ch->is->name, ch->bch.rx_skb->len);
515			if (ch->is->cmsb & SART_NMD) { /* ABORT */
516				pr_debug("%s: isar_rcv_frame: no more data\n",
517					 ch->is->name);
518				ch->is->write_reg(ch->is->hw, ISAR_IIA, 0);
519				send_mbox(ch->is, SET_DPS(ch->dpath) |
520					  ISAR_HIS_PUMPCTRL, PCTRL_CMD_ESC,
521					  0, NULL);
522				ch->state = STFAX_ESCAPE;
523				/* set_skb_flag(skb, DF_NOMOREDATA); */
524			}
525			recv_Bchannel(&ch->bch, 0, false);
526			if (ch->is->cmsb & SART_NMD)
527				deliver_status(ch, HW_MOD_NOCARR);
528			break;
529		}
530		if (ch->cmd != PCTRL_CMD_FRH) {
531			pr_debug("%s: isar_rcv_frame: unknown fax mode %x\n",
532				 ch->is->name, ch->cmd);
533			ch->is->write_reg(ch->is->hw, ISAR_IIA, 0);
534			if (ch->bch.rx_skb)
535				skb_trim(ch->bch.rx_skb, 0);
536			break;
537		}
538		/* PCTRL_CMD_FRH */
539		if ((ch->bch.rx_skb->len + ch->is->clsb) >
540		    (ch->bch.maxlen + 2)) {
541			pr_info("%s: %s incoming packet too large\n",
542				ch->is->name, __func__);
543			ch->is->write_reg(ch->is->hw, ISAR_IIA, 0);
544			skb_trim(ch->bch.rx_skb, 0);
545			break;
546		}  else if (ch->is->cmsb & HDLC_ERROR) {
547			pr_info("%s: ISAR frame error %x len %d\n",
548				ch->is->name, ch->is->cmsb, ch->is->clsb);
549			skb_trim(ch->bch.rx_skb, 0);
550			ch->is->write_reg(ch->is->hw, ISAR_IIA, 0);
551			break;
552		}
553		if (ch->is->cmsb & HDLC_FSD)
554			skb_trim(ch->bch.rx_skb, 0);
555		ptr = skb_put(ch->bch.rx_skb, ch->is->clsb);
556		rcv_mbox(ch->is, ptr);
557		if (ch->is->cmsb & HDLC_FED) {
558			if (ch->bch.rx_skb->len < 3) { /* last 2 are the FCS */
559				pr_info("%s: ISAR frame to short %d\n",
560					ch->is->name, ch->bch.rx_skb->len);
561				skb_trim(ch->bch.rx_skb, 0);
562				break;
563			}
564			skb_trim(ch->bch.rx_skb, ch->bch.rx_skb->len - 2);
565			recv_Bchannel(&ch->bch, 0, false);
566		}
567		if (ch->is->cmsb & SART_NMD) { /* ABORT */
568			pr_debug("%s: isar_rcv_frame: no more data\n",
569				 ch->is->name);
570			ch->is->write_reg(ch->is->hw, ISAR_IIA, 0);
571			if (ch->bch.rx_skb)
572				skb_trim(ch->bch.rx_skb, 0);
573			send_mbox(ch->is, SET_DPS(ch->dpath) |
574				  ISAR_HIS_PUMPCTRL, PCTRL_CMD_ESC, 0, NULL);
575			ch->state = STFAX_ESCAPE;
576			deliver_status(ch, HW_MOD_NOCARR);
577		}
578		break;
579	default:
580		pr_info("isar_rcv_frame protocol (%x)error\n", ch->bch.state);
581		ch->is->write_reg(ch->is->hw, ISAR_IIA, 0);
582		break;
583	}
584}
585
586static void
587isar_fill_fifo(struct isar_ch *ch)
588{
589	int count;
590	u8 msb;
591	u8 *ptr;
592
593	pr_debug("%s: ch%d  tx_skb %d tx_idx %d\n", ch->is->name, ch->bch.nr,
594		 ch->bch.tx_skb ? ch->bch.tx_skb->len : -1, ch->bch.tx_idx);
595	if (!(ch->is->bstat &
596	      (ch->dpath == 1 ? BSTAT_RDM1 : BSTAT_RDM2)))
597		return;
598	if (!ch->bch.tx_skb) {
599		if (!test_bit(FLG_TX_EMPTY, &ch->bch.Flags) ||
600		    (ch->bch.state != ISDN_P_B_RAW))
601			return;
602		count = ch->mml;
603		/* use the card buffer */
604		memset(ch->is->buf, ch->bch.fill[0], count);
605		send_mbox(ch->is, SET_DPS(ch->dpath) | ISAR_HIS_SDATA,
606			  0, count, ch->is->buf);
607		return;
608	}
609	count = ch->bch.tx_skb->len - ch->bch.tx_idx;
610	if (count <= 0)
611		return;
612	if (count > ch->mml) {
613		msb = 0;
614		count = ch->mml;
615	} else {
616		msb = HDLC_FED;
617	}
618	ptr = ch->bch.tx_skb->data + ch->bch.tx_idx;
619	if (!ch->bch.tx_idx) {
620		pr_debug("%s: frame start\n", ch->is->name);
621		if ((ch->bch.state == ISDN_P_B_T30_FAX) &&
622		    (ch->cmd == PCTRL_CMD_FTH)) {
623			if (count > 1) {
624				if ((ptr[0] == 0xff) && (ptr[1] == 0x13)) {
625					/* last frame */
626					test_and_set_bit(FLG_LASTDATA,
627							 &ch->bch.Flags);
628					pr_debug("%s: set LASTDATA\n",
629						 ch->is->name);
630					if (msb == HDLC_FED)
631						test_and_set_bit(FLG_DLEETX,
632								 &ch->bch.Flags);
633				}
634			}
635		}
636		msb |= HDLC_FST;
637	}
638	ch->bch.tx_idx += count;
639	switch (ch->bch.state) {
640	case ISDN_P_NONE:
641		pr_info("%s: wrong protocol 0\n", __func__);
642		break;
643	case ISDN_P_B_RAW:
644	case ISDN_P_B_L2DTMF:
645	case ISDN_P_B_MODEM_ASYNC:
646		send_mbox(ch->is, SET_DPS(ch->dpath) | ISAR_HIS_SDATA,
647			  0, count, ptr);
648		break;
649	case ISDN_P_B_HDLC:
650		send_mbox(ch->is, SET_DPS(ch->dpath) | ISAR_HIS_SDATA,
651			  msb, count, ptr);
652		break;
653	case ISDN_P_B_T30_FAX:
654		if (ch->state != STFAX_ACTIV)
655			pr_debug("%s: not ACTIV\n", ch->is->name);
656		else if (ch->cmd == PCTRL_CMD_FTH)
657			send_mbox(ch->is, SET_DPS(ch->dpath) | ISAR_HIS_SDATA,
658				  msb, count, ptr);
659		else if (ch->cmd == PCTRL_CMD_FTM)
660			send_mbox(ch->is, SET_DPS(ch->dpath) | ISAR_HIS_SDATA,
661				  0, count, ptr);
662		else
663			pr_debug("%s: not FTH/FTM\n", ch->is->name);
664		break;
665	default:
666		pr_info("%s: protocol(%x) error\n",
667			__func__, ch->bch.state);
668		break;
669	}
670}
671
672static inline struct isar_ch *
673sel_bch_isar(struct isar_hw *isar, u8 dpath)
674{
675	struct isar_ch	*base = &isar->ch[0];
676
677	if ((!dpath) || (dpath > 2))
678		return NULL;
679	if (base->dpath == dpath)
680		return base;
681	base++;
682	if (base->dpath == dpath)
683		return base;
684	return NULL;
685}
686
687static void
688send_next(struct isar_ch *ch)
689{
690	pr_debug("%s: %s ch%d tx_skb %d tx_idx %d\n", ch->is->name, __func__,
691		 ch->bch.nr, ch->bch.tx_skb ? ch->bch.tx_skb->len : -1,
692		 ch->bch.tx_idx);
693	if (ch->bch.state == ISDN_P_B_T30_FAX) {
694		if (ch->cmd == PCTRL_CMD_FTH) {
695			if (test_bit(FLG_LASTDATA, &ch->bch.Flags)) {
696				pr_debug("set NMD_DATA\n");
697				test_and_set_bit(FLG_NMD_DATA, &ch->bch.Flags);
698			}
699		} else if (ch->cmd == PCTRL_CMD_FTM) {
700			if (test_bit(FLG_DLEETX, &ch->bch.Flags)) {
701				test_and_set_bit(FLG_LASTDATA, &ch->bch.Flags);
702				test_and_set_bit(FLG_NMD_DATA, &ch->bch.Flags);
703			}
704		}
705	}
706	if (ch->bch.tx_skb)
707		dev_kfree_skb(ch->bch.tx_skb);
708	if (get_next_bframe(&ch->bch)) {
709		isar_fill_fifo(ch);
710		test_and_clear_bit(FLG_TX_EMPTY, &ch->bch.Flags);
711	} else if (test_bit(FLG_TX_EMPTY, &ch->bch.Flags)) {
712		isar_fill_fifo(ch);
713	} else {
714		if (test_and_clear_bit(FLG_DLEETX, &ch->bch.Flags)) {
715			if (test_and_clear_bit(FLG_LASTDATA,
716					       &ch->bch.Flags)) {
717				if (test_and_clear_bit(FLG_NMD_DATA,
718						       &ch->bch.Flags)) {
719					u8 zd = 0;
720					send_mbox(ch->is, SET_DPS(ch->dpath) |
721						  ISAR_HIS_SDATA, 0x01, 1, &zd);
722				}
723				test_and_set_bit(FLG_LL_OK, &ch->bch.Flags);
724			} else {
725				deliver_status(ch, HW_MOD_CONNECT);
726			}
727		} else if (test_bit(FLG_FILLEMPTY, &ch->bch.Flags)) {
728			test_and_set_bit(FLG_TX_EMPTY, &ch->bch.Flags);
729		}
730	}
731}
732
733static void
734check_send(struct isar_hw *isar, u8 rdm)
735{
736	struct isar_ch	*ch;
737
738	pr_debug("%s: rdm %x\n", isar->name, rdm);
739	if (rdm & BSTAT_RDM1) {
740		ch = sel_bch_isar(isar, 1);
741		if (ch && test_bit(FLG_ACTIVE, &ch->bch.Flags)) {
742			if (ch->bch.tx_skb && (ch->bch.tx_skb->len >
743					       ch->bch.tx_idx))
744				isar_fill_fifo(ch);
745			else
746				send_next(ch);
747		}
748	}
749	if (rdm & BSTAT_RDM2) {
750		ch = sel_bch_isar(isar, 2);
751		if (ch && test_bit(FLG_ACTIVE, &ch->bch.Flags)) {
752			if (ch->bch.tx_skb && (ch->bch.tx_skb->len >
753					       ch->bch.tx_idx))
754				isar_fill_fifo(ch);
755			else
756				send_next(ch);
757		}
758	}
759}
760
761const char *dmril[] = {"NO SPEED", "1200/75", "NODEF2", "75/1200", "NODEF4",
762		       "300", "600", "1200", "2400", "4800", "7200",
763		       "9600nt", "9600t", "12000", "14400", "WRONG"};
764const char *dmrim[] = {"NO MOD", "NO DEF", "V32/V32b", "V22", "V21",
765		       "Bell103", "V23", "Bell202", "V17", "V29", "V27ter"};
766
767static void
768isar_pump_status_rsp(struct isar_ch *ch) {
769	u8 ril = ch->is->buf[0];
770	u8 rim;
771
772	if (!test_and_clear_bit(ISAR_RATE_REQ, &ch->is->Flags))
773		return;
774	if (ril > 14) {
775		pr_info("%s: wrong pstrsp ril=%d\n", ch->is->name, ril);
776		ril = 15;
777	}
778	switch (ch->is->buf[1]) {
779	case 0:
780		rim = 0;
781		break;
782	case 0x20:
783		rim = 2;
784		break;
785	case 0x40:
786		rim = 3;
787		break;
788	case 0x41:
789		rim = 4;
790		break;
791	case 0x51:
792		rim = 5;
793		break;
794	case 0x61:
795		rim = 6;
796		break;
797	case 0x71:
798		rim = 7;
799		break;
800	case 0x82:
801		rim = 8;
802		break;
803	case 0x92:
804		rim = 9;
805		break;
806	case 0xa2:
807		rim = 10;
808		break;
809	default:
810		rim = 1;
811		break;
812	}
813	sprintf(ch->conmsg, "%s %s", dmril[ril], dmrim[rim]);
814	pr_debug("%s: pump strsp %s\n", ch->is->name, ch->conmsg);
815}
816
817static void
818isar_pump_statev_modem(struct isar_ch *ch, u8 devt) {
819	u8 dps = SET_DPS(ch->dpath);
820
821	switch (devt) {
822	case PSEV_10MS_TIMER:
823		pr_debug("%s: pump stev TIMER\n", ch->is->name);
824		break;
825	case PSEV_CON_ON:
826		pr_debug("%s: pump stev CONNECT\n", ch->is->name);
827		deliver_status(ch, HW_MOD_CONNECT);
828		break;
829	case PSEV_CON_OFF:
830		pr_debug("%s: pump stev NO CONNECT\n", ch->is->name);
831		send_mbox(ch->is, dps | ISAR_HIS_PSTREQ, 0, 0, NULL);
832		deliver_status(ch, HW_MOD_NOCARR);
833		break;
834	case PSEV_V24_OFF:
835		pr_debug("%s: pump stev V24 OFF\n", ch->is->name);
836		break;
837	case PSEV_CTS_ON:
838		pr_debug("%s: pump stev CTS ON\n", ch->is->name);
839		break;
840	case PSEV_CTS_OFF:
841		pr_debug("%s pump stev CTS OFF\n", ch->is->name);
842		break;
843	case PSEV_DCD_ON:
844		pr_debug("%s: pump stev CARRIER ON\n", ch->is->name);
845		test_and_set_bit(ISAR_RATE_REQ, &ch->is->Flags);
846		send_mbox(ch->is, dps | ISAR_HIS_PSTREQ, 0, 0, NULL);
847		break;
848	case PSEV_DCD_OFF:
849		pr_debug("%s: pump stev CARRIER OFF\n", ch->is->name);
850		break;
851	case PSEV_DSR_ON:
852		pr_debug("%s: pump stev DSR ON\n", ch->is->name);
853		break;
854	case PSEV_DSR_OFF:
855		pr_debug("%s: pump stev DSR_OFF\n", ch->is->name);
856		break;
857	case PSEV_REM_RET:
858		pr_debug("%s: pump stev REMOTE RETRAIN\n", ch->is->name);
859		break;
860	case PSEV_REM_REN:
861		pr_debug("%s: pump stev REMOTE RENEGOTIATE\n", ch->is->name);
862		break;
863	case PSEV_GSTN_CLR:
864		pr_debug("%s: pump stev GSTN CLEAR\n", ch->is->name);
865		break;
866	default:
867		pr_info("u%s: unknown pump stev %x\n", ch->is->name, devt);
868		break;
869	}
870}
871
872static void
873isar_pump_statev_fax(struct isar_ch *ch, u8 devt) {
874	u8 dps = SET_DPS(ch->dpath);
875	u8 p1;
876
877	switch (devt) {
878	case PSEV_10MS_TIMER:
879		pr_debug("%s: pump stev TIMER\n", ch->is->name);
880		break;
881	case PSEV_RSP_READY:
882		pr_debug("%s: pump stev RSP_READY\n", ch->is->name);
883		ch->state = STFAX_READY;
884		deliver_status(ch, HW_MOD_READY);
885#ifdef AUTOCON
886		if (test_bit(BC_FLG_ORIG, &ch->bch.Flags))
887			isar_pump_cmd(bch, HW_MOD_FRH, 3);
888		else
889			isar_pump_cmd(bch, HW_MOD_FTH, 3);
890#endif
891		break;
892	case PSEV_LINE_TX_H:
893		if (ch->state == STFAX_LINE) {
894			pr_debug("%s: pump stev LINE_TX_H\n", ch->is->name);
895			ch->state = STFAX_CONT;
896			send_mbox(ch->is, dps | ISAR_HIS_PUMPCTRL,
897				  PCTRL_CMD_CONT, 0, NULL);
898		} else {
899			pr_debug("%s: pump stev LINE_TX_H wrong st %x\n",
900				 ch->is->name, ch->state);
901		}
902		break;
903	case PSEV_LINE_RX_H:
904		if (ch->state == STFAX_LINE) {
905			pr_debug("%s: pump stev LINE_RX_H\n", ch->is->name);
906			ch->state = STFAX_CONT;
907			send_mbox(ch->is, dps | ISAR_HIS_PUMPCTRL,
908				  PCTRL_CMD_CONT, 0, NULL);
909		} else {
910			pr_debug("%s: pump stev LINE_RX_H wrong st %x\n",
911				 ch->is->name, ch->state);
912		}
913		break;
914	case PSEV_LINE_TX_B:
915		if (ch->state == STFAX_LINE) {
916			pr_debug("%s: pump stev LINE_TX_B\n", ch->is->name);
917			ch->state = STFAX_CONT;
918			send_mbox(ch->is, dps | ISAR_HIS_PUMPCTRL,
919				  PCTRL_CMD_CONT, 0, NULL);
920		} else {
921			pr_debug("%s: pump stev LINE_TX_B wrong st %x\n",
922				 ch->is->name, ch->state);
923		}
924		break;
925	case PSEV_LINE_RX_B:
926		if (ch->state == STFAX_LINE) {
927			pr_debug("%s: pump stev LINE_RX_B\n", ch->is->name);
928			ch->state = STFAX_CONT;
929			send_mbox(ch->is, dps | ISAR_HIS_PUMPCTRL,
930				  PCTRL_CMD_CONT, 0, NULL);
931		} else {
932			pr_debug("%s: pump stev LINE_RX_B wrong st %x\n",
933				 ch->is->name, ch->state);
934		}
935		break;
936	case PSEV_RSP_CONN:
937		if (ch->state == STFAX_CONT) {
938			pr_debug("%s: pump stev RSP_CONN\n", ch->is->name);
939			ch->state = STFAX_ACTIV;
940			test_and_set_bit(ISAR_RATE_REQ, &ch->is->Flags);
941			send_mbox(ch->is, dps | ISAR_HIS_PSTREQ, 0, 0, NULL);
942			if (ch->cmd == PCTRL_CMD_FTH) {
943				int delay = (ch->mod == 3) ? 1000 : 200;
944				/* 1s (200 ms) Flags before data */
945				if (test_and_set_bit(FLG_FTI_RUN,
946						     &ch->bch.Flags))
947					del_timer(&ch->ftimer);
948				ch->ftimer.expires =
949					jiffies + ((delay * HZ) / 1000);
950				test_and_set_bit(FLG_LL_CONN,
951						 &ch->bch.Flags);
952				add_timer(&ch->ftimer);
953			} else {
954				deliver_status(ch, HW_MOD_CONNECT);
955			}
956		} else {
957			pr_debug("%s: pump stev RSP_CONN wrong st %x\n",
958				 ch->is->name, ch->state);
959		}
960		break;
961	case PSEV_FLAGS_DET:
962		pr_debug("%s: pump stev FLAGS_DET\n", ch->is->name);
963		break;
964	case PSEV_RSP_DISC:
965		pr_debug("%s: pump stev RSP_DISC state(%d)\n",
966			 ch->is->name, ch->state);
967		if (ch->state == STFAX_ESCAPE) {
968			p1 = 5;
969			switch (ch->newcmd) {
970			case 0:
971				ch->state = STFAX_READY;
972				break;
973			case PCTRL_CMD_FTM:
974				p1 = 2;
975			case PCTRL_CMD_FTH:
976				send_mbox(ch->is, dps | ISAR_HIS_PUMPCTRL,
977					  PCTRL_CMD_SILON, 1, &p1);
978				ch->state = STFAX_SILDET;
979				break;
980			case PCTRL_CMD_FRH:
981			case PCTRL_CMD_FRM:
982				ch->mod = ch->newmod;
983				p1 = ch->newmod;
984				ch->newmod = 0;
985				ch->cmd = ch->newcmd;
986				ch->newcmd = 0;
987				send_mbox(ch->is, dps | ISAR_HIS_PUMPCTRL,
988					  ch->cmd, 1, &p1);
989				ch->state = STFAX_LINE;
990				ch->try_mod = 3;
991				break;
992			default:
993				pr_debug("%s: RSP_DISC unknown newcmd %x\n",
994					 ch->is->name, ch->newcmd);
995				break;
996			}
997		} else if (ch->state == STFAX_ACTIV) {
998			if (test_and_clear_bit(FLG_LL_OK, &ch->bch.Flags))
999				deliver_status(ch, HW_MOD_OK);
1000			else if (ch->cmd == PCTRL_CMD_FRM)
1001				deliver_status(ch, HW_MOD_NOCARR);
1002			else
1003				deliver_status(ch, HW_MOD_FCERROR);
1004			ch->state = STFAX_READY;
1005		} else if (ch->state != STFAX_SILDET) {
1006			/* ignore in STFAX_SILDET */
1007			ch->state = STFAX_READY;
1008			deliver_status(ch, HW_MOD_FCERROR);
1009		}
1010		break;
1011	case PSEV_RSP_SILDET:
1012		pr_debug("%s: pump stev RSP_SILDET\n", ch->is->name);
1013		if (ch->state == STFAX_SILDET) {
1014			ch->mod = ch->newmod;
1015			p1 = ch->newmod;
1016			ch->newmod = 0;
1017			ch->cmd = ch->newcmd;
1018			ch->newcmd = 0;
1019			send_mbox(ch->is, dps | ISAR_HIS_PUMPCTRL,
1020				  ch->cmd, 1, &p1);
1021			ch->state = STFAX_LINE;
1022			ch->try_mod = 3;
1023		}
1024		break;
1025	case PSEV_RSP_SILOFF:
1026		pr_debug("%s: pump stev RSP_SILOFF\n", ch->is->name);
1027		break;
1028	case PSEV_RSP_FCERR:
1029		if (ch->state == STFAX_LINE) {
1030			pr_debug("%s: pump stev RSP_FCERR try %d\n",
1031				 ch->is->name, ch->try_mod);
1032			if (ch->try_mod--) {
1033				send_mbox(ch->is, dps | ISAR_HIS_PUMPCTRL,
1034					  ch->cmd, 1, &ch->mod);
1035				break;
1036			}
1037		}
1038		pr_debug("%s: pump stev RSP_FCERR\n", ch->is->name);
1039		ch->state = STFAX_ESCAPE;
1040		send_mbox(ch->is, dps | ISAR_HIS_PUMPCTRL, PCTRL_CMD_ESC,
1041			  0, NULL);
1042		deliver_status(ch, HW_MOD_FCERROR);
1043		break;
1044	default:
1045		break;
1046	}
1047}
1048
1049void
1050mISDNisar_irq(struct isar_hw *isar)
1051{
1052	struct isar_ch *ch;
1053
1054	get_irq_infos(isar);
1055	switch (isar->iis & ISAR_IIS_MSCMSD) {
1056	case ISAR_IIS_RDATA:
1057		ch = sel_bch_isar(isar, isar->iis >> 6);
1058		if (ch)
1059			isar_rcv_frame(ch);
1060		else {
1061			pr_debug("%s: ISAR spurious IIS_RDATA %x/%x/%x\n",
1062				 isar->name, isar->iis, isar->cmsb,
1063				 isar->clsb);
1064			isar->write_reg(isar->hw, ISAR_IIA, 0);
1065		}
1066		break;
1067	case ISAR_IIS_GSTEV:
1068		isar->write_reg(isar->hw, ISAR_IIA, 0);
1069		isar->bstat |= isar->cmsb;
1070		check_send(isar, isar->cmsb);
1071		break;
1072	case ISAR_IIS_BSTEV:
1073#ifdef ERROR_STATISTIC
1074		ch = sel_bch_isar(isar, isar->iis >> 6);
1075		if (ch) {
1076			if (isar->cmsb == BSTEV_TBO)
1077				ch->bch.err_tx++;
1078			if (isar->cmsb == BSTEV_RBO)
1079				ch->bch.err_rdo++;
1080		}
1081#endif
1082		pr_debug("%s: Buffer STEV dpath%d msb(%x)\n",
1083			 isar->name, isar->iis >> 6, isar->cmsb);
1084		isar->write_reg(isar->hw, ISAR_IIA, 0);
1085		break;
1086	case ISAR_IIS_PSTEV:
1087		ch = sel_bch_isar(isar, isar->iis >> 6);
1088		if (ch) {
1089			rcv_mbox(isar, NULL);
1090			if (ch->bch.state == ISDN_P_B_MODEM_ASYNC)
1091				isar_pump_statev_modem(ch, isar->cmsb);
1092			else if (ch->bch.state == ISDN_P_B_T30_FAX)
1093				isar_pump_statev_fax(ch, isar->cmsb);
1094			else if (ch->bch.state == ISDN_P_B_RAW) {
1095				int	tt;
1096				tt = isar->cmsb | 0x30;
1097				if (tt == 0x3e)
1098					tt = '*';
1099				else if (tt == 0x3f)
1100					tt = '#';
1101				else if (tt > '9')
1102					tt += 7;
1103				tt |= DTMF_TONE_VAL;
1104				_queue_data(&ch->bch.ch, PH_CONTROL_IND,
1105					    MISDN_ID_ANY, sizeof(tt), &tt,
1106					    GFP_ATOMIC);
1107			} else
1108				pr_debug("%s: ISAR IIS_PSTEV pm %d sta %x\n",
1109					 isar->name, ch->bch.state,
1110					 isar->cmsb);
1111		} else {
1112			pr_debug("%s: ISAR spurious IIS_PSTEV %x/%x/%x\n",
1113				 isar->name, isar->iis, isar->cmsb,
1114				 isar->clsb);
1115			isar->write_reg(isar->hw, ISAR_IIA, 0);
1116		}
1117		break;
1118	case ISAR_IIS_PSTRSP:
1119		ch = sel_bch_isar(isar, isar->iis >> 6);
1120		if (ch) {
1121			rcv_mbox(isar, NULL);
1122			isar_pump_status_rsp(ch);
1123		} else {
1124			pr_debug("%s: ISAR spurious IIS_PSTRSP %x/%x/%x\n",
1125				 isar->name, isar->iis, isar->cmsb,
1126				 isar->clsb);
1127			isar->write_reg(isar->hw, ISAR_IIA, 0);
1128		}
1129		break;
1130	case ISAR_IIS_DIAG:
1131	case ISAR_IIS_BSTRSP:
1132	case ISAR_IIS_IOM2RSP:
1133		rcv_mbox(isar, NULL);
1134		break;
1135	case ISAR_IIS_INVMSG:
1136		rcv_mbox(isar, NULL);
1137		pr_debug("%s: invalid msg his:%x\n", isar->name, isar->cmsb);
1138		break;
1139	default:
1140		rcv_mbox(isar, NULL);
1141		pr_debug("%s: unhandled msg iis(%x) ctrl(%x/%x)\n",
1142			 isar->name, isar->iis, isar->cmsb, isar->clsb);
1143		break;
1144	}
1145}
1146EXPORT_SYMBOL(mISDNisar_irq);
1147
1148static void
1149ftimer_handler(unsigned long data)
1150{
1151	struct isar_ch *ch = (struct isar_ch *)data;
1152
1153	pr_debug("%s: ftimer flags %lx\n", ch->is->name, ch->bch.Flags);
1154	test_and_clear_bit(FLG_FTI_RUN, &ch->bch.Flags);
1155	if (test_and_clear_bit(FLG_LL_CONN, &ch->bch.Flags))
1156		deliver_status(ch, HW_MOD_CONNECT);
1157}
1158
1159static void
1160setup_pump(struct isar_ch *ch) {
1161	u8 dps = SET_DPS(ch->dpath);
1162	u8 ctrl, param[6];
1163
1164	switch (ch->bch.state) {
1165	case ISDN_P_NONE:
1166	case ISDN_P_B_RAW:
1167	case ISDN_P_B_HDLC:
1168		send_mbox(ch->is, dps | ISAR_HIS_PUMPCFG, PMOD_BYPASS, 0, NULL);
1169		break;
1170	case ISDN_P_B_L2DTMF:
1171		if (test_bit(FLG_DTMFSEND, &ch->bch.Flags)) {
1172			param[0] = 5; /* TOA 5 db */
1173			send_mbox(ch->is, dps | ISAR_HIS_PUMPCFG,
1174				  PMOD_DTMF_TRANS, 1, param);
1175		} else {
1176			param[0] = 40; /* REL -46 dbm */
1177			send_mbox(ch->is, dps | ISAR_HIS_PUMPCFG,
1178				  PMOD_DTMF, 1, param);
1179		}
1180	case ISDN_P_B_MODEM_ASYNC:
1181		ctrl = PMOD_DATAMODEM;
1182		if (test_bit(FLG_ORIGIN, &ch->bch.Flags)) {
1183			ctrl |= PCTRL_ORIG;
1184			param[5] = PV32P6_CTN;
1185		} else {
1186			param[5] = PV32P6_ATN;
1187		}
1188		param[0] = 6; /* 6 db */
1189		param[1] = PV32P2_V23R | PV32P2_V22A | PV32P2_V22B |
1190			PV32P2_V22C | PV32P2_V21 | PV32P2_BEL;
1191		param[2] = PV32P3_AMOD | PV32P3_V32B | PV32P3_V23B;
1192		param[3] = PV32P4_UT144;
1193		param[4] = PV32P5_UT144;
1194		send_mbox(ch->is, dps | ISAR_HIS_PUMPCFG, ctrl, 6, param);
1195		break;
1196	case ISDN_P_B_T30_FAX:
1197		ctrl = PMOD_FAX;
1198		if (test_bit(FLG_ORIGIN, &ch->bch.Flags)) {
1199			ctrl |= PCTRL_ORIG;
1200			param[1] = PFAXP2_CTN;
1201		} else {
1202			param[1] = PFAXP2_ATN;
1203		}
1204		param[0] = 6; /* 6 db */
1205		send_mbox(ch->is, dps | ISAR_HIS_PUMPCFG, ctrl, 2, param);
1206		ch->state = STFAX_NULL;
1207		ch->newcmd = 0;
1208		ch->newmod = 0;
1209		test_and_set_bit(FLG_FTI_RUN, &ch->bch.Flags);
1210		break;
1211	}
1212	udelay(1000);
1213	send_mbox(ch->is, dps | ISAR_HIS_PSTREQ, 0, 0, NULL);
1214	udelay(1000);
1215}
1216
1217static void
1218setup_sart(struct isar_ch *ch) {
1219	u8 dps = SET_DPS(ch->dpath);
1220	u8 ctrl, param[2] = {0, 0};
1221
1222	switch (ch->bch.state) {
1223	case ISDN_P_NONE:
1224		send_mbox(ch->is, dps | ISAR_HIS_SARTCFG, SMODE_DISABLE,
1225			  0, NULL);
1226		break;
1227	case ISDN_P_B_RAW:
1228	case ISDN_P_B_L2DTMF:
1229		send_mbox(ch->is, dps | ISAR_HIS_SARTCFG, SMODE_BINARY,
1230			  2, param);
1231		break;
1232	case ISDN_P_B_HDLC:
1233	case ISDN_P_B_T30_FAX:
1234		send_mbox(ch->is, dps | ISAR_HIS_SARTCFG, SMODE_HDLC,
1235			  1, param);
1236		break;
1237	case ISDN_P_B_MODEM_ASYNC:
1238		ctrl = SMODE_V14 | SCTRL_HDMC_BOTH;
1239		param[0] = S_P1_CHS_8;
1240		param[1] = S_P2_BFT_DEF;
1241		send_mbox(ch->is, dps | ISAR_HIS_SARTCFG, ctrl, 2, param);
1242		break;
1243	}
1244	udelay(1000);
1245	send_mbox(ch->is, dps | ISAR_HIS_BSTREQ, 0, 0, NULL);
1246	udelay(1000);
1247}
1248
1249static void
1250setup_iom2(struct isar_ch *ch) {
1251	u8 dps = SET_DPS(ch->dpath);
1252	u8 cmsb = IOM_CTRL_ENA, msg[5] = {IOM_P1_TXD, 0, 0, 0, 0};
1253
1254	if (ch->bch.nr == 2) {
1255		msg[1] = 1;
1256		msg[3] = 1;
1257	}
1258	switch (ch->bch.state) {
1259	case ISDN_P_NONE:
1260		cmsb = 0;
1261		/* dummy slot */
1262		msg[1] = ch->dpath + 2;
1263		msg[3] = ch->dpath + 2;
1264		break;
1265	case ISDN_P_B_RAW:
1266	case ISDN_P_B_HDLC:
1267		break;
1268	case ISDN_P_B_MODEM_ASYNC:
1269	case ISDN_P_B_T30_FAX:
1270		cmsb |= IOM_CTRL_RCV;
1271	case ISDN_P_B_L2DTMF:
1272		if (test_bit(FLG_DTMFSEND, &ch->bch.Flags))
1273			cmsb |= IOM_CTRL_RCV;
1274		cmsb |= IOM_CTRL_ALAW;
1275		break;
1276	}
1277	send_mbox(ch->is, dps | ISAR_HIS_IOM2CFG, cmsb, 5, msg);
1278	udelay(1000);
1279	send_mbox(ch->is, dps | ISAR_HIS_IOM2REQ, 0, 0, NULL);
1280	udelay(1000);
1281}
1282
1283static int
1284modeisar(struct isar_ch *ch, u32 bprotocol)
1285{
1286	/* Here we are selecting the best datapath for requested protocol */
1287	if (ch->bch.state == ISDN_P_NONE) { /* New Setup */
1288		switch (bprotocol) {
1289		case ISDN_P_NONE: /* init */
1290			if (!ch->dpath)
1291				/* no init for dpath 0 */
1292				return 0;
1293			test_and_clear_bit(FLG_HDLC, &ch->bch.Flags);
1294			test_and_clear_bit(FLG_TRANSPARENT, &ch->bch.Flags);
1295			break;
1296		case ISDN_P_B_RAW:
1297		case ISDN_P_B_HDLC:
1298			/* best is datapath 2 */
1299			if (!test_and_set_bit(ISAR_DP2_USE, &ch->is->Flags))
1300				ch->dpath = 2;
1301			else if (!test_and_set_bit(ISAR_DP1_USE,
1302						   &ch->is->Flags))
1303				ch->dpath = 1;
1304			else {
1305				pr_info("modeisar both paths in use\n");
1306				return -EBUSY;
1307			}
1308			if (bprotocol == ISDN_P_B_HDLC)
1309				test_and_set_bit(FLG_HDLC, &ch->bch.Flags);
1310			else
1311				test_and_set_bit(FLG_TRANSPARENT,
1312						 &ch->bch.Flags);
1313			break;
1314		case ISDN_P_B_MODEM_ASYNC:
1315		case ISDN_P_B_T30_FAX:
1316		case ISDN_P_B_L2DTMF:
1317			/* only datapath 1 */
1318			if (!test_and_set_bit(ISAR_DP1_USE, &ch->is->Flags))
1319				ch->dpath = 1;
1320			else {
1321				pr_info("%s: ISAR modeisar analog functions"
1322					"only with DP1\n", ch->is->name);
1323				return -EBUSY;
1324			}
1325			break;
1326		default:
1327			pr_info("%s: protocol not known %x\n", ch->is->name,
1328				bprotocol);
1329			return -ENOPROTOOPT;
1330		}
1331	}
1332	pr_debug("%s: ISAR ch%d dp%d protocol %x->%x\n", ch->is->name,
1333		 ch->bch.nr, ch->dpath, ch->bch.state, bprotocol);
1334	ch->bch.state = bprotocol;
1335	setup_pump(ch);
1336	setup_iom2(ch);
1337	setup_sart(ch);
1338	if (ch->bch.state == ISDN_P_NONE) {
1339		/* Clear resources */
1340		if (ch->dpath == 1)
1341			test_and_clear_bit(ISAR_DP1_USE, &ch->is->Flags);
1342		else if (ch->dpath == 2)
1343			test_and_clear_bit(ISAR_DP2_USE, &ch->is->Flags);
1344		ch->dpath = 0;
1345		ch->is->ctrl(ch->is->hw, HW_DEACT_IND, ch->bch.nr);
1346	} else
1347		ch->is->ctrl(ch->is->hw, HW_ACTIVATE_IND, ch->bch.nr);
1348	return 0;
1349}
1350
1351static void
1352isar_pump_cmd(struct isar_ch *ch, u32 cmd, u8 para)
1353{
1354	u8 dps = SET_DPS(ch->dpath);
1355	u8 ctrl = 0, nom = 0, p1 = 0;
1356
1357	pr_debug("%s: isar_pump_cmd %x/%x state(%x)\n",
1358		 ch->is->name, cmd, para, ch->bch.state);
1359	switch (cmd) {
1360	case HW_MOD_FTM:
1361		if (ch->state == STFAX_READY) {
1362			p1 = para;
1363			ctrl = PCTRL_CMD_FTM;
1364			nom = 1;
1365			ch->state = STFAX_LINE;
1366			ch->cmd = ctrl;
1367			ch->mod = para;
1368			ch->newmod = 0;
1369			ch->newcmd = 0;
1370			ch->try_mod = 3;
1371		} else if ((ch->state == STFAX_ACTIV) &&
1372			   (ch->cmd == PCTRL_CMD_FTM) && (ch->mod == para))
1373			deliver_status(ch, HW_MOD_CONNECT);
1374		else {
1375			ch->newmod = para;
1376			ch->newcmd = PCTRL_CMD_FTM;
1377			nom = 0;
1378			ctrl = PCTRL_CMD_ESC;
1379			ch->state = STFAX_ESCAPE;
1380		}
1381		break;
1382	case HW_MOD_FTH:
1383		if (ch->state == STFAX_READY) {
1384			p1 = para;
1385			ctrl = PCTRL_CMD_FTH;
1386			nom = 1;
1387			ch->state = STFAX_LINE;
1388			ch->cmd = ctrl;
1389			ch->mod = para;
1390			ch->newmod = 0;
1391			ch->newcmd = 0;
1392			ch->try_mod = 3;
1393		} else if ((ch->state == STFAX_ACTIV) &&
1394			   (ch->cmd == PCTRL_CMD_FTH) && (ch->mod == para))
1395			deliver_status(ch, HW_MOD_CONNECT);
1396		else {
1397			ch->newmod = para;
1398			ch->newcmd = PCTRL_CMD_FTH;
1399			nom = 0;
1400			ctrl = PCTRL_CMD_ESC;
1401			ch->state = STFAX_ESCAPE;
1402		}
1403		break;
1404	case HW_MOD_FRM:
1405		if (ch->state == STFAX_READY) {
1406			p1 = para;
1407			ctrl = PCTRL_CMD_FRM;
1408			nom = 1;
1409			ch->state = STFAX_LINE;
1410			ch->cmd = ctrl;
1411			ch->mod = para;
1412			ch->newmod = 0;
1413			ch->newcmd = 0;
1414			ch->try_mod = 3;
1415		} else if ((ch->state == STFAX_ACTIV) &&
1416			   (ch->cmd == PCTRL_CMD_FRM) && (ch->mod == para))
1417			deliver_status(ch, HW_MOD_CONNECT);
1418		else {
1419			ch->newmod = para;
1420			ch->newcmd = PCTRL_CMD_FRM;
1421			nom = 0;
1422			ctrl = PCTRL_CMD_ESC;
1423			ch->state = STFAX_ESCAPE;
1424		}
1425		break;
1426	case HW_MOD_FRH:
1427		if (ch->state == STFAX_READY) {
1428			p1 = para;
1429			ctrl = PCTRL_CMD_FRH;
1430			nom = 1;
1431			ch->state = STFAX_LINE;
1432			ch->cmd = ctrl;
1433			ch->mod = para;
1434			ch->newmod = 0;
1435			ch->newcmd = 0;
1436			ch->try_mod = 3;
1437		} else if ((ch->state == STFAX_ACTIV) &&
1438			   (ch->cmd == PCTRL_CMD_FRH) && (ch->mod == para))
1439			deliver_status(ch, HW_MOD_CONNECT);
1440		else {
1441			ch->newmod = para;
1442			ch->newcmd = PCTRL_CMD_FRH;
1443			nom = 0;
1444			ctrl = PCTRL_CMD_ESC;
1445			ch->state = STFAX_ESCAPE;
1446		}
1447		break;
1448	case PCTRL_CMD_TDTMF:
1449		p1 = para;
1450		nom = 1;
1451		ctrl = PCTRL_CMD_TDTMF;
1452		break;
1453	}
1454	if (ctrl)
1455		send_mbox(ch->is, dps | ISAR_HIS_PUMPCTRL, ctrl, nom, &p1);
1456}
1457
1458static void
1459isar_setup(struct isar_hw *isar)
1460{
1461	u8 msg;
1462	int i;
1463
1464	/* Dpath 1, 2 */
1465	msg = 61;
1466	for (i = 0; i < 2; i++) {
1467		/* Buffer Config */
1468		send_mbox(isar, (i ? ISAR_HIS_DPS2 : ISAR_HIS_DPS1) |
1469			  ISAR_HIS_P12CFG, 4, 1, &msg);
1470		isar->ch[i].mml = msg;
1471		isar->ch[i].bch.state = 0;
1472		isar->ch[i].dpath = i + 1;
1473		modeisar(&isar->ch[i], ISDN_P_NONE);
1474	}
1475}
1476
1477static int
1478isar_l2l1(struct mISDNchannel *ch, struct sk_buff *skb)
1479{
1480	struct bchannel *bch = container_of(ch, struct bchannel, ch);
1481	struct isar_ch *ich = container_of(bch, struct isar_ch, bch);
1482	int ret = -EINVAL;
1483	struct mISDNhead *hh = mISDN_HEAD_P(skb);
1484	u32 id, *val;
1485	u_long flags;
1486
1487	switch (hh->prim) {
1488	case PH_DATA_REQ:
1489		spin_lock_irqsave(ich->is->hwlock, flags);
1490		ret = bchannel_senddata(bch, skb);
1491		if (ret > 0) { /* direct TX */
1492			ret = 0;
1493			isar_fill_fifo(ich);
1494		}
1495		spin_unlock_irqrestore(ich->is->hwlock, flags);
1496		return ret;
1497	case PH_ACTIVATE_REQ:
1498		spin_lock_irqsave(ich->is->hwlock, flags);
1499		if (!test_and_set_bit(FLG_ACTIVE, &bch->Flags))
1500			ret = modeisar(ich, ch->protocol);
1501		else
1502			ret = 0;
1503		spin_unlock_irqrestore(ich->is->hwlock, flags);
1504		if (!ret)
1505			_queue_data(ch, PH_ACTIVATE_IND, MISDN_ID_ANY, 0,
1506				    NULL, GFP_KERNEL);
1507		break;
1508	case PH_DEACTIVATE_REQ:
1509		spin_lock_irqsave(ich->is->hwlock, flags);
1510		mISDN_clear_bchannel(bch);
1511		modeisar(ich, ISDN_P_NONE);
1512		spin_unlock_irqrestore(ich->is->hwlock, flags);
1513		_queue_data(ch, PH_DEACTIVATE_IND, MISDN_ID_ANY, 0,
1514			    NULL, GFP_KERNEL);
1515		ret = 0;
1516		break;
1517	case PH_CONTROL_REQ:
1518		val = (u32 *)skb->data;
1519		pr_debug("%s: PH_CONTROL | REQUEST %x/%x\n", ich->is->name,
1520			 hh->id, *val);
1521		if ((hh->id == 0) && ((*val & ~DTMF_TONE_MASK) ==
1522				      DTMF_TONE_VAL)) {
1523			if (bch->state == ISDN_P_B_L2DTMF) {
1524				char tt = *val & DTMF_TONE_MASK;
1525
1526				if (tt == '*')
1527					tt = 0x1e;
1528				else if (tt == '#')
1529					tt = 0x1f;
1530				else if (tt > '9')
1531					tt -= 7;
1532				tt &= 0x1f;
1533				spin_lock_irqsave(ich->is->hwlock, flags);
1534				isar_pump_cmd(ich, PCTRL_CMD_TDTMF, tt);
1535				spin_unlock_irqrestore(ich->is->hwlock, flags);
1536			} else {
1537				pr_info("%s: DTMF send wrong protocol %x\n",
1538					__func__, bch->state);
1539				return -EINVAL;
1540			}
1541		} else if ((hh->id == HW_MOD_FRM) || (hh->id == HW_MOD_FRH) ||
1542			   (hh->id == HW_MOD_FTM) || (hh->id == HW_MOD_FTH)) {
1543			for (id = 0; id < FAXMODCNT; id++)
1544				if (faxmodulation[id] == *val)
1545					break;
1546			if ((FAXMODCNT > id) &&
1547			    test_bit(FLG_INITIALIZED, &bch->Flags)) {
1548				pr_debug("%s: isar: new mod\n", ich->is->name);
1549				isar_pump_cmd(ich, hh->id, *val);
1550				ret = 0;
1551			} else {
1552				pr_info("%s: wrong modulation\n",
1553					ich->is->name);
1554				ret = -EINVAL;
1555			}
1556		} else if (hh->id == HW_MOD_LASTDATA)
1557			test_and_set_bit(FLG_DLEETX, &bch->Flags);
1558		else {
1559			pr_info("%s: unknown PH_CONTROL_REQ %x\n",
1560				ich->is->name, hh->id);
1561			ret = -EINVAL;
1562		}
1563	default:
1564		pr_info("%s: %s unknown prim(%x,%x)\n",
1565			ich->is->name, __func__, hh->prim, hh->id);
1566		ret = -EINVAL;
1567	}
1568	if (!ret)
1569		dev_kfree_skb(skb);
1570	return ret;
1571}
1572
1573static int
1574channel_bctrl(struct bchannel *bch, struct mISDN_ctrl_req *cq)
1575{
1576	return mISDN_ctrl_bchannel(bch, cq);
1577}
1578
1579static int
1580isar_bctrl(struct mISDNchannel *ch, u32 cmd, void *arg)
1581{
1582	struct bchannel *bch = container_of(ch, struct bchannel, ch);
1583	struct isar_ch *ich = container_of(bch, struct isar_ch, bch);
1584	int ret = -EINVAL;
1585	u_long flags;
1586
1587	pr_debug("%s: %s cmd:%x %p\n", ich->is->name, __func__, cmd, arg);
1588	switch (cmd) {
1589	case CLOSE_CHANNEL:
1590		test_and_clear_bit(FLG_OPEN, &bch->Flags);
1591		cancel_work_sync(&bch->workq);
1592		spin_lock_irqsave(ich->is->hwlock, flags);
1593		mISDN_clear_bchannel(bch);
1594		modeisar(ich, ISDN_P_NONE);
1595		spin_unlock_irqrestore(ich->is->hwlock, flags);
1596		ch->protocol = ISDN_P_NONE;
1597		ch->peer = NULL;
1598		module_put(ich->is->owner);
1599		ret = 0;
1600		break;
1601	case CONTROL_CHANNEL:
1602		ret = channel_bctrl(bch, arg);
1603		break;
1604	default:
1605		pr_info("%s: %s unknown prim(%x)\n",
1606			ich->is->name, __func__, cmd);
1607	}
1608	return ret;
1609}
1610
1611static void
1612free_isar(struct isar_hw *isar)
1613{
1614	modeisar(&isar->ch[0], ISDN_P_NONE);
1615	modeisar(&isar->ch[1], ISDN_P_NONE);
1616	del_timer(&isar->ch[0].ftimer);
1617	del_timer(&isar->ch[1].ftimer);
1618	test_and_clear_bit(FLG_INITIALIZED, &isar->ch[0].bch.Flags);
1619	test_and_clear_bit(FLG_INITIALIZED, &isar->ch[1].bch.Flags);
1620}
1621
1622static int
1623init_isar(struct isar_hw *isar)
1624{
1625	int	cnt = 3;
1626
1627	while (cnt--) {
1628		isar->version = ISARVersion(isar);
1629		if (isar->ch[0].bch.debug & DEBUG_HW)
1630			pr_notice("%s: Testing version %d (%d time)\n",
1631				  isar->name, isar->version, 3 - cnt);
1632		if (isar->version == 1)
1633			break;
1634		isar->ctrl(isar->hw, HW_RESET_REQ, 0);
1635	}
1636	if (isar->version != 1)
1637		return -EINVAL;
1638	isar->ch[0].ftimer.function = &ftimer_handler;
1639	isar->ch[0].ftimer.data = (long)&isar->ch[0];
1640	init_timer(&isar->ch[0].ftimer);
1641	test_and_set_bit(FLG_INITIALIZED, &isar->ch[0].bch.Flags);
1642	isar->ch[1].ftimer.function = &ftimer_handler;
1643	isar->ch[1].ftimer.data = (long)&isar->ch[1];
1644	init_timer(&isar->ch[1].ftimer);
1645	test_and_set_bit(FLG_INITIALIZED, &isar->ch[1].bch.Flags);
1646	return 0;
1647}
1648
1649static int
1650isar_open(struct isar_hw *isar, struct channel_req *rq)
1651{
1652	struct bchannel		*bch;
1653
1654	if (rq->adr.channel == 0 || rq->adr.channel > 2)
1655		return -EINVAL;
1656	if (rq->protocol == ISDN_P_NONE)
1657		return -EINVAL;
1658	bch = &isar->ch[rq->adr.channel - 1].bch;
1659	if (test_and_set_bit(FLG_OPEN, &bch->Flags))
1660		return -EBUSY; /* b-channel can be only open once */
1661	bch->ch.protocol = rq->protocol;
1662	rq->ch = &bch->ch;
1663	return 0;
1664}
1665
1666u32
1667mISDNisar_init(struct isar_hw *isar, void *hw)
1668{
1669	u32 ret, i;
1670
1671	isar->hw = hw;
1672	for (i = 0; i < 2; i++) {
1673		isar->ch[i].bch.nr = i + 1;
1674		mISDN_initbchannel(&isar->ch[i].bch, MAX_DATA_MEM, 32);
1675		isar->ch[i].bch.ch.nr = i + 1;
1676		isar->ch[i].bch.ch.send = &isar_l2l1;
1677		isar->ch[i].bch.ch.ctrl = isar_bctrl;
1678		isar->ch[i].bch.hw = hw;
1679		isar->ch[i].is = isar;
1680	}
1681
1682	isar->init = &init_isar;
1683	isar->release = &free_isar;
1684	isar->firmware = &load_firmware;
1685	isar->open = &isar_open;
1686
1687	ret =	(1 << (ISDN_P_B_RAW & ISDN_P_B_MASK)) |
1688		(1 << (ISDN_P_B_HDLC & ISDN_P_B_MASK)) |
1689		(1 << (ISDN_P_B_L2DTMF & ISDN_P_B_MASK)) |
1690		(1 << (ISDN_P_B_MODEM_ASYNC & ISDN_P_B_MASK)) |
1691		(1 << (ISDN_P_B_T30_FAX & ISDN_P_B_MASK));
1692
1693	return ret;
1694}
1695EXPORT_SYMBOL(mISDNisar_init);
1696
1697static int __init isar_mod_init(void)
1698{
1699	pr_notice("mISDN: ISAR driver Rev. %s\n", ISAR_REV);
1700	return 0;
1701}
1702
1703static void __exit isar_mod_cleanup(void)
1704{
1705	pr_notice("mISDN: ISAR module unloaded\n");
1706}
1707module_init(isar_mod_init);
1708module_exit(isar_mod_cleanup);
1709