1/*
2 * Copyright (c) 2014 MediaTek Inc.
3 * Author: Joe.C <yingjoe.chen@mediatek.com>
4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License version 2 as
7 * published by the Free Software Foundation.
8 *
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
12 * GNU General Public License for more details.
13 */
14
15#include <linux/irq.h>
16#include <linux/irqdomain.h>
17#include <linux/of.h>
18#include <linux/of_irq.h>
19#include <linux/of_address.h>
20#include <linux/io.h>
21#include <linux/slab.h>
22#include <linux/spinlock.h>
23
24#include "irqchip.h"
25
26struct mtk_sysirq_chip_data {
27	spinlock_t lock;
28	void __iomem *intpol_base;
29};
30
31static int mtk_sysirq_set_type(struct irq_data *data, unsigned int type)
32{
33	irq_hw_number_t hwirq = data->hwirq;
34	struct mtk_sysirq_chip_data *chip_data = data->chip_data;
35	u32 offset, reg_index, value;
36	unsigned long flags;
37	int ret;
38
39	offset = hwirq & 0x1f;
40	reg_index = hwirq >> 5;
41
42	spin_lock_irqsave(&chip_data->lock, flags);
43	value = readl_relaxed(chip_data->intpol_base + reg_index * 4);
44	if (type == IRQ_TYPE_LEVEL_LOW || type == IRQ_TYPE_EDGE_FALLING) {
45		if (type == IRQ_TYPE_LEVEL_LOW)
46			type = IRQ_TYPE_LEVEL_HIGH;
47		else
48			type = IRQ_TYPE_EDGE_RISING;
49		value |= (1 << offset);
50	} else {
51		value &= ~(1 << offset);
52	}
53	writel(value, chip_data->intpol_base + reg_index * 4);
54
55	data = data->parent_data;
56	ret = data->chip->irq_set_type(data, type);
57	spin_unlock_irqrestore(&chip_data->lock, flags);
58	return ret;
59}
60
61static struct irq_chip mtk_sysirq_chip = {
62	.name			= "MT_SYSIRQ",
63	.irq_mask		= irq_chip_mask_parent,
64	.irq_unmask		= irq_chip_unmask_parent,
65	.irq_eoi		= irq_chip_eoi_parent,
66	.irq_set_type		= mtk_sysirq_set_type,
67	.irq_retrigger		= irq_chip_retrigger_hierarchy,
68	.irq_set_affinity	= irq_chip_set_affinity_parent,
69};
70
71static int mtk_sysirq_domain_xlate(struct irq_domain *d,
72				   struct device_node *controller,
73				   const u32 *intspec, unsigned int intsize,
74				   unsigned long *out_hwirq,
75				   unsigned int *out_type)
76{
77	if (intsize != 3)
78		return -EINVAL;
79
80	/* sysirq doesn't support PPI */
81	if (intspec[0])
82		return -EINVAL;
83
84	*out_hwirq = intspec[1];
85	*out_type = intspec[2] & IRQ_TYPE_SENSE_MASK;
86	return 0;
87}
88
89static int mtk_sysirq_domain_alloc(struct irq_domain *domain, unsigned int virq,
90				   unsigned int nr_irqs, void *arg)
91{
92	int i;
93	irq_hw_number_t hwirq;
94	struct of_phandle_args *irq_data = arg;
95	struct of_phandle_args gic_data = *irq_data;
96
97	if (irq_data->args_count != 3)
98		return -EINVAL;
99
100	/* sysirq doesn't support PPI */
101	if (irq_data->args[0])
102		return -EINVAL;
103
104	hwirq = irq_data->args[1];
105	for (i = 0; i < nr_irqs; i++)
106		irq_domain_set_hwirq_and_chip(domain, virq + i, hwirq + i,
107					      &mtk_sysirq_chip,
108					      domain->host_data);
109
110	gic_data.np = domain->parent->of_node;
111	return irq_domain_alloc_irqs_parent(domain, virq, nr_irqs, &gic_data);
112}
113
114static struct irq_domain_ops sysirq_domain_ops = {
115	.xlate = mtk_sysirq_domain_xlate,
116	.alloc = mtk_sysirq_domain_alloc,
117	.free = irq_domain_free_irqs_common,
118};
119
120static int __init mtk_sysirq_of_init(struct device_node *node,
121				     struct device_node *parent)
122{
123	struct irq_domain *domain, *domain_parent;
124	struct mtk_sysirq_chip_data *chip_data;
125	int ret, size, intpol_num;
126	struct resource res;
127
128	domain_parent = irq_find_host(parent);
129	if (!domain_parent) {
130		pr_err("mtk_sysirq: interrupt-parent not found\n");
131		return -EINVAL;
132	}
133
134	ret = of_address_to_resource(node, 0, &res);
135	if (ret)
136		return ret;
137
138	chip_data = kzalloc(sizeof(*chip_data), GFP_KERNEL);
139	if (!chip_data)
140		return -ENOMEM;
141
142	size = resource_size(&res);
143	intpol_num = size * 8;
144	chip_data->intpol_base = ioremap(res.start, size);
145	if (!chip_data->intpol_base) {
146		pr_err("mtk_sysirq: unable to map sysirq register\n");
147		ret = PTR_ERR(chip_data->intpol_base);
148		goto out_free;
149	}
150
151	domain = irq_domain_add_hierarchy(domain_parent, 0, intpol_num, node,
152					  &sysirq_domain_ops, chip_data);
153	if (!domain) {
154		ret = -ENOMEM;
155		goto out_unmap;
156	}
157	spin_lock_init(&chip_data->lock);
158
159	return 0;
160
161out_unmap:
162	iounmap(chip_data->intpol_base);
163out_free:
164	kfree(chip_data);
165	return ret;
166}
167IRQCHIP_DECLARE(mtk_sysirq, "mediatek,mt6577-sysirq", mtk_sysirq_of_init);
168