1/* 2 * Copyright 2013 Red Hat Inc. 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice shall be included in 12 * all copies or substantial portions of the Software. 13 * 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 20 * OTHER DEALINGS IN THE SOFTWARE. 21 * 22 * Authors: Ben Skeggs 23 */ 24#include "priv.h" 25 26#include <core/device.h> 27 28static int 29nv1a_ram_create(struct nvkm_object *parent, struct nvkm_object *engine, 30 struct nvkm_oclass *oclass, void *data, u32 size, 31 struct nvkm_object **pobject) 32{ 33 struct nvkm_fb *pfb = nvkm_fb(parent); 34 struct nvkm_ram *ram; 35 struct pci_dev *bridge; 36 u32 mem, mib; 37 int ret; 38 39 bridge = pci_get_bus_and_slot(0, PCI_DEVFN(0, 1)); 40 if (!bridge) { 41 nv_fatal(pfb, "no bridge device\n"); 42 return -ENODEV; 43 } 44 45 ret = nvkm_ram_create(parent, engine, oclass, &ram); 46 *pobject = nv_object(ram); 47 if (ret) 48 return ret; 49 50 if (nv_device(pfb)->chipset == 0x1a) { 51 pci_read_config_dword(bridge, 0x7c, &mem); 52 mib = ((mem >> 6) & 31) + 1; 53 } else { 54 pci_read_config_dword(bridge, 0x84, &mem); 55 mib = ((mem >> 4) & 127) + 1; 56 } 57 58 ram->type = NV_MEM_TYPE_STOLEN; 59 ram->size = mib * 1024 * 1024; 60 return 0; 61} 62 63struct nvkm_oclass 64nv1a_ram_oclass = { 65 .handle = 0, 66 .ofuncs = &(struct nvkm_ofuncs) { 67 .ctor = nv1a_ram_create, 68 .dtor = _nvkm_ram_dtor, 69 .init = _nvkm_ram_init, 70 .fini = _nvkm_ram_fini, 71 } 72}; 73