1/*
2 * Copyright 2012 Red Hat Inc.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
21 *
22 * Authors: Ben Skeggs
23 */
24#include <subdev/clk.h>
25#include "pll.h"
26
27#include <subdev/bios.h>
28#include <subdev/bios/pll.h>
29#include <subdev/devinit/nv04.h>
30
31struct nv04_clk_priv {
32	struct nvkm_clk base;
33};
34
35int
36nv04_clk_pll_calc(struct nvkm_clk *clock, struct nvbios_pll *info,
37		  int clk, struct nvkm_pll_vals *pv)
38{
39	int N1, M1, N2, M2, P;
40	int ret = nv04_pll_calc(nv_subdev(clock), info, clk, &N1, &M1, &N2, &M2, &P);
41	if (ret) {
42		pv->refclk = info->refclk;
43		pv->N1 = N1;
44		pv->M1 = M1;
45		pv->N2 = N2;
46		pv->M2 = M2;
47		pv->log2P = P;
48	}
49	return ret;
50}
51
52int
53nv04_clk_pll_prog(struct nvkm_clk *clk, u32 reg1, struct nvkm_pll_vals *pv)
54{
55	struct nvkm_devinit *devinit = nvkm_devinit(clk);
56	int cv = nvkm_bios(clk)->version.chip;
57
58	if (cv == 0x30 || cv == 0x31 || cv == 0x35 || cv == 0x36 ||
59	    cv >= 0x40) {
60		if (reg1 > 0x405c)
61			setPLL_double_highregs(devinit, reg1, pv);
62		else
63			setPLL_double_lowregs(devinit, reg1, pv);
64	} else
65		setPLL_single(devinit, reg1, pv);
66
67	return 0;
68}
69
70static struct nvkm_domain
71nv04_domain[] = {
72	{ nv_clk_src_max }
73};
74
75static int
76nv04_clk_ctor(struct nvkm_object *parent, struct nvkm_object *engine,
77	      struct nvkm_oclass *oclass, void *data, u32 size,
78	      struct nvkm_object **pobject)
79{
80	struct nv04_clk_priv *priv;
81	int ret;
82
83	ret = nvkm_clk_create(parent, engine, oclass, nv04_domain,
84			      NULL, 0, false, &priv);
85	*pobject = nv_object(priv);
86	if (ret)
87		return ret;
88
89	priv->base.pll_calc = nv04_clk_pll_calc;
90	priv->base.pll_prog = nv04_clk_pll_prog;
91	return 0;
92}
93
94struct nvkm_oclass
95nv04_clk_oclass = {
96	.handle = NV_SUBDEV(CLK, 0x04),
97	.ofuncs = &(struct nvkm_ofuncs) {
98		.ctor = nv04_clk_ctor,
99		.dtor = _nvkm_clk_dtor,
100		.init = _nvkm_clk_init,
101		.fini = _nvkm_clk_fini,
102	},
103};
104