1
2/*
3 * Copyright 2012 Red Hat
4 *
5 * This file is subject to the terms and conditions of the GNU General
6 * Public License version 2. See the file COPYING in the main
7 * directory of this archive for more details.
8 *
9 * Authors: Matthew Garrett
10 *          Dave Airlie
11 *
12 * Portions of this code derived from cirrusfb.c:
13 * drivers/video/cirrusfb.c - driver for Cirrus Logic chipsets
14 *
15 * Copyright 1999-2001 Jeff Garzik <jgarzik@pobox.com>
16 */
17#include <drm/drmP.h>
18#include <drm/drm_crtc_helper.h>
19#include <drm/drm_plane_helper.h>
20
21#include <video/cirrus.h>
22
23#include "cirrus_drv.h"
24
25#define CIRRUS_LUT_SIZE 256
26
27#define PALETTE_INDEX 0x8
28#define PALETTE_DATA 0x9
29
30/*
31 * This file contains setup code for the CRTC.
32 */
33
34static void cirrus_crtc_load_lut(struct drm_crtc *crtc)
35{
36	struct cirrus_crtc *cirrus_crtc = to_cirrus_crtc(crtc);
37	struct drm_device *dev = crtc->dev;
38	struct cirrus_device *cdev = dev->dev_private;
39	int i;
40
41	if (!crtc->enabled)
42		return;
43
44	for (i = 0; i < CIRRUS_LUT_SIZE; i++) {
45		/* VGA registers */
46		WREG8(PALETTE_INDEX, i);
47		WREG8(PALETTE_DATA, cirrus_crtc->lut_r[i]);
48		WREG8(PALETTE_DATA, cirrus_crtc->lut_g[i]);
49		WREG8(PALETTE_DATA, cirrus_crtc->lut_b[i]);
50	}
51}
52
53/*
54 * The DRM core requires DPMS functions, but they make little sense in our
55 * case and so are just stubs
56 */
57
58static void cirrus_crtc_dpms(struct drm_crtc *crtc, int mode)
59{
60	struct drm_device *dev = crtc->dev;
61	struct cirrus_device *cdev = dev->dev_private;
62	u8 sr01, gr0e;
63
64	switch (mode) {
65	case DRM_MODE_DPMS_ON:
66		sr01 = 0x00;
67		gr0e = 0x00;
68		break;
69	case DRM_MODE_DPMS_STANDBY:
70		sr01 = 0x20;
71		gr0e = 0x02;
72		break;
73	case DRM_MODE_DPMS_SUSPEND:
74		sr01 = 0x20;
75		gr0e = 0x04;
76		break;
77	case DRM_MODE_DPMS_OFF:
78		sr01 = 0x20;
79		gr0e = 0x06;
80		break;
81	default:
82		return;
83	}
84
85	WREG8(SEQ_INDEX, 0x1);
86	sr01 |= RREG8(SEQ_DATA) & ~0x20;
87	WREG_SEQ(0x1, sr01);
88
89	WREG8(GFX_INDEX, 0xe);
90	gr0e |= RREG8(GFX_DATA) & ~0x06;
91	WREG_GFX(0xe, gr0e);
92}
93
94/*
95 * The core passes the desired mode to the CRTC code to see whether any
96 * CRTC-specific modifications need to be made to it. We're in a position
97 * to just pass that straight through, so this does nothing
98 */
99static bool cirrus_crtc_mode_fixup(struct drm_crtc *crtc,
100				   const struct drm_display_mode *mode,
101				   struct drm_display_mode *adjusted_mode)
102{
103	return true;
104}
105
106static void cirrus_set_start_address(struct drm_crtc *crtc, unsigned offset)
107{
108	struct cirrus_device *cdev = crtc->dev->dev_private;
109	u32 addr;
110	u8 tmp;
111
112	addr = offset >> 2;
113	WREG_CRT(0x0c, (u8)((addr >> 8) & 0xff));
114	WREG_CRT(0x0d, (u8)(addr & 0xff));
115
116	WREG8(CRT_INDEX, 0x1b);
117	tmp = RREG8(CRT_DATA);
118	tmp &= 0xf2;
119	tmp |= (addr >> 16) & 0x01;
120	tmp |= (addr >> 15) & 0x0c;
121	WREG_CRT(0x1b, tmp);
122	WREG8(CRT_INDEX, 0x1d);
123	tmp = RREG8(CRT_DATA);
124	tmp &= 0x7f;
125	tmp |= (addr >> 12) & 0x80;
126	WREG_CRT(0x1d, tmp);
127}
128
129/* cirrus is different - we will force move buffers out of VRAM */
130static int cirrus_crtc_do_set_base(struct drm_crtc *crtc,
131				struct drm_framebuffer *fb,
132				int x, int y, int atomic)
133{
134	struct cirrus_device *cdev = crtc->dev->dev_private;
135	struct drm_gem_object *obj;
136	struct cirrus_framebuffer *cirrus_fb;
137	struct cirrus_bo *bo;
138	int ret;
139	u64 gpu_addr;
140
141	/* push the previous fb to system ram */
142	if (!atomic && fb) {
143		cirrus_fb = to_cirrus_framebuffer(fb);
144		obj = cirrus_fb->obj;
145		bo = gem_to_cirrus_bo(obj);
146		ret = cirrus_bo_reserve(bo, false);
147		if (ret)
148			return ret;
149		cirrus_bo_push_sysram(bo);
150		cirrus_bo_unreserve(bo);
151	}
152
153	cirrus_fb = to_cirrus_framebuffer(crtc->primary->fb);
154	obj = cirrus_fb->obj;
155	bo = gem_to_cirrus_bo(obj);
156
157	ret = cirrus_bo_reserve(bo, false);
158	if (ret)
159		return ret;
160
161	ret = cirrus_bo_pin(bo, TTM_PL_FLAG_VRAM, &gpu_addr);
162	if (ret) {
163		cirrus_bo_unreserve(bo);
164		return ret;
165	}
166
167	if (&cdev->mode_info.gfbdev->gfb == cirrus_fb) {
168		/* if pushing console in kmap it */
169		ret = ttm_bo_kmap(&bo->bo, 0, bo->bo.num_pages, &bo->kmap);
170		if (ret)
171			DRM_ERROR("failed to kmap fbcon\n");
172	}
173	cirrus_bo_unreserve(bo);
174
175	cirrus_set_start_address(crtc, (u32)gpu_addr);
176	return 0;
177}
178
179static int cirrus_crtc_mode_set_base(struct drm_crtc *crtc, int x, int y,
180			     struct drm_framebuffer *old_fb)
181{
182	return cirrus_crtc_do_set_base(crtc, old_fb, x, y, 0);
183}
184
185/*
186 * The meat of this driver. The core passes us a mode and we have to program
187 * it. The modesetting here is the bare minimum required to satisfy the qemu
188 * emulation of this hardware, and running this against a real device is
189 * likely to result in an inadequately programmed mode. We've already had
190 * the opportunity to modify the mode, so whatever we receive here should
191 * be something that can be correctly programmed and displayed
192 */
193static int cirrus_crtc_mode_set(struct drm_crtc *crtc,
194				struct drm_display_mode *mode,
195				struct drm_display_mode *adjusted_mode,
196				int x, int y, struct drm_framebuffer *old_fb)
197{
198	struct drm_device *dev = crtc->dev;
199	struct cirrus_device *cdev = dev->dev_private;
200	int hsyncstart, hsyncend, htotal, hdispend;
201	int vtotal, vdispend;
202	int tmp;
203	int sr07 = 0, hdr = 0;
204
205	htotal = mode->htotal / 8;
206	hsyncend = mode->hsync_end / 8;
207	hsyncstart = mode->hsync_start / 8;
208	hdispend = mode->hdisplay / 8;
209
210	vtotal = mode->vtotal;
211	vdispend = mode->vdisplay;
212
213	vdispend -= 1;
214	vtotal -= 2;
215
216	htotal -= 5;
217	hdispend -= 1;
218	hsyncstart += 1;
219	hsyncend += 1;
220
221	WREG_CRT(VGA_CRTC_V_SYNC_END, 0x20);
222	WREG_CRT(VGA_CRTC_H_TOTAL, htotal);
223	WREG_CRT(VGA_CRTC_H_DISP, hdispend);
224	WREG_CRT(VGA_CRTC_H_SYNC_START, hsyncstart);
225	WREG_CRT(VGA_CRTC_H_SYNC_END, hsyncend);
226	WREG_CRT(VGA_CRTC_V_TOTAL, vtotal & 0xff);
227	WREG_CRT(VGA_CRTC_V_DISP_END, vdispend & 0xff);
228
229	tmp = 0x40;
230	if ((vdispend + 1) & 512)
231		tmp |= 0x20;
232	WREG_CRT(VGA_CRTC_MAX_SCAN, tmp);
233
234	/*
235	 * Overflow bits for values that don't fit in the standard registers
236	 */
237	tmp = 16;
238	if (vtotal & 256)
239		tmp |= 1;
240	if (vdispend & 256)
241		tmp |= 2;
242	if ((vdispend + 1) & 256)
243		tmp |= 8;
244	if (vtotal & 512)
245		tmp |= 32;
246	if (vdispend & 512)
247		tmp |= 64;
248	WREG_CRT(VGA_CRTC_OVERFLOW, tmp);
249
250	tmp = 0;
251
252	/* More overflow bits */
253
254	if ((htotal + 5) & 64)
255		tmp |= 16;
256	if ((htotal + 5) & 128)
257		tmp |= 32;
258	if (vtotal & 256)
259		tmp |= 64;
260	if (vtotal & 512)
261		tmp |= 128;
262
263	WREG_CRT(CL_CRT1A, tmp);
264
265	/* Disable Hercules/CGA compatibility */
266	WREG_CRT(VGA_CRTC_MODE, 0x03);
267
268	WREG8(SEQ_INDEX, 0x7);
269	sr07 = RREG8(SEQ_DATA);
270	sr07 &= 0xe0;
271	hdr = 0;
272	switch (crtc->primary->fb->bits_per_pixel) {
273	case 8:
274		sr07 |= 0x11;
275		break;
276	case 16:
277		sr07 |= 0x17;
278		hdr = 0xc1;
279		break;
280	case 24:
281		sr07 |= 0x15;
282		hdr = 0xc5;
283		break;
284	case 32:
285		sr07 |= 0x19;
286		hdr = 0xc5;
287		break;
288	default:
289		return -1;
290	}
291
292	WREG_SEQ(0x7, sr07);
293
294	/* Program the pitch */
295	tmp = crtc->primary->fb->pitches[0] / 8;
296	WREG_CRT(VGA_CRTC_OFFSET, tmp);
297
298	/* Enable extended blanking and pitch bits, and enable full memory */
299	tmp = 0x22;
300	tmp |= (crtc->primary->fb->pitches[0] >> 7) & 0x10;
301	tmp |= (crtc->primary->fb->pitches[0] >> 6) & 0x40;
302	WREG_CRT(0x1b, tmp);
303
304	/* Enable high-colour modes */
305	WREG_GFX(VGA_GFX_MODE, 0x40);
306
307	/* And set graphics mode */
308	WREG_GFX(VGA_GFX_MISC, 0x01);
309
310	WREG_HDR(hdr);
311	cirrus_crtc_do_set_base(crtc, old_fb, x, y, 0);
312
313	/* Unblank (needed on S3 resume, vgabios doesn't do it then) */
314	outb(0x20, 0x3c0);
315	return 0;
316}
317
318/*
319 * This is called before a mode is programmed. A typical use might be to
320 * enable DPMS during the programming to avoid seeing intermediate stages,
321 * but that's not relevant to us
322 */
323static void cirrus_crtc_prepare(struct drm_crtc *crtc)
324{
325}
326
327/*
328 * This is called after a mode is programmed. It should reverse anything done
329 * by the prepare function
330 */
331static void cirrus_crtc_commit(struct drm_crtc *crtc)
332{
333}
334
335/*
336 * The core can pass us a set of gamma values to program. We actually only
337 * use this for 8-bit mode so can't perform smooth fades on deeper modes,
338 * but it's a requirement that we provide the function
339 */
340static void cirrus_crtc_gamma_set(struct drm_crtc *crtc, u16 *red, u16 *green,
341				  u16 *blue, uint32_t start, uint32_t size)
342{
343	struct cirrus_crtc *cirrus_crtc = to_cirrus_crtc(crtc);
344	int i;
345
346	if (size != CIRRUS_LUT_SIZE)
347		return;
348
349	for (i = 0; i < CIRRUS_LUT_SIZE; i++) {
350		cirrus_crtc->lut_r[i] = red[i];
351		cirrus_crtc->lut_g[i] = green[i];
352		cirrus_crtc->lut_b[i] = blue[i];
353	}
354	cirrus_crtc_load_lut(crtc);
355}
356
357/* Simple cleanup function */
358static void cirrus_crtc_destroy(struct drm_crtc *crtc)
359{
360	struct cirrus_crtc *cirrus_crtc = to_cirrus_crtc(crtc);
361
362	drm_crtc_cleanup(crtc);
363	kfree(cirrus_crtc);
364}
365
366/* These provide the minimum set of functions required to handle a CRTC */
367static const struct drm_crtc_funcs cirrus_crtc_funcs = {
368	.gamma_set = cirrus_crtc_gamma_set,
369	.set_config = drm_crtc_helper_set_config,
370	.destroy = cirrus_crtc_destroy,
371};
372
373static const struct drm_crtc_helper_funcs cirrus_helper_funcs = {
374	.dpms = cirrus_crtc_dpms,
375	.mode_fixup = cirrus_crtc_mode_fixup,
376	.mode_set = cirrus_crtc_mode_set,
377	.mode_set_base = cirrus_crtc_mode_set_base,
378	.prepare = cirrus_crtc_prepare,
379	.commit = cirrus_crtc_commit,
380	.load_lut = cirrus_crtc_load_lut,
381};
382
383/* CRTC setup */
384static void cirrus_crtc_init(struct drm_device *dev)
385{
386	struct cirrus_device *cdev = dev->dev_private;
387	struct cirrus_crtc *cirrus_crtc;
388	int i;
389
390	cirrus_crtc = kzalloc(sizeof(struct cirrus_crtc) +
391			      (CIRRUSFB_CONN_LIMIT * sizeof(struct drm_connector *)),
392			      GFP_KERNEL);
393
394	if (cirrus_crtc == NULL)
395		return;
396
397	drm_crtc_init(dev, &cirrus_crtc->base, &cirrus_crtc_funcs);
398
399	drm_mode_crtc_set_gamma_size(&cirrus_crtc->base, CIRRUS_LUT_SIZE);
400	cdev->mode_info.crtc = cirrus_crtc;
401
402	for (i = 0; i < CIRRUS_LUT_SIZE; i++) {
403		cirrus_crtc->lut_r[i] = i;
404		cirrus_crtc->lut_g[i] = i;
405		cirrus_crtc->lut_b[i] = i;
406	}
407
408	drm_crtc_helper_add(&cirrus_crtc->base, &cirrus_helper_funcs);
409}
410
411/** Sets the color ramps on behalf of fbcon */
412void cirrus_crtc_fb_gamma_set(struct drm_crtc *crtc, u16 red, u16 green,
413			      u16 blue, int regno)
414{
415	struct cirrus_crtc *cirrus_crtc = to_cirrus_crtc(crtc);
416
417	cirrus_crtc->lut_r[regno] = red;
418	cirrus_crtc->lut_g[regno] = green;
419	cirrus_crtc->lut_b[regno] = blue;
420}
421
422/** Gets the color ramps on behalf of fbcon */
423void cirrus_crtc_fb_gamma_get(struct drm_crtc *crtc, u16 *red, u16 *green,
424			      u16 *blue, int regno)
425{
426	struct cirrus_crtc *cirrus_crtc = to_cirrus_crtc(crtc);
427
428	*red = cirrus_crtc->lut_r[regno];
429	*green = cirrus_crtc->lut_g[regno];
430	*blue = cirrus_crtc->lut_b[regno];
431}
432
433
434static bool cirrus_encoder_mode_fixup(struct drm_encoder *encoder,
435				      const struct drm_display_mode *mode,
436				      struct drm_display_mode *adjusted_mode)
437{
438	return true;
439}
440
441static void cirrus_encoder_mode_set(struct drm_encoder *encoder,
442				struct drm_display_mode *mode,
443				struct drm_display_mode *adjusted_mode)
444{
445}
446
447static void cirrus_encoder_dpms(struct drm_encoder *encoder, int state)
448{
449	return;
450}
451
452static void cirrus_encoder_prepare(struct drm_encoder *encoder)
453{
454}
455
456static void cirrus_encoder_commit(struct drm_encoder *encoder)
457{
458}
459
460static void cirrus_encoder_destroy(struct drm_encoder *encoder)
461{
462	struct cirrus_encoder *cirrus_encoder = to_cirrus_encoder(encoder);
463	drm_encoder_cleanup(encoder);
464	kfree(cirrus_encoder);
465}
466
467static const struct drm_encoder_helper_funcs cirrus_encoder_helper_funcs = {
468	.dpms = cirrus_encoder_dpms,
469	.mode_fixup = cirrus_encoder_mode_fixup,
470	.mode_set = cirrus_encoder_mode_set,
471	.prepare = cirrus_encoder_prepare,
472	.commit = cirrus_encoder_commit,
473};
474
475static const struct drm_encoder_funcs cirrus_encoder_encoder_funcs = {
476	.destroy = cirrus_encoder_destroy,
477};
478
479static struct drm_encoder *cirrus_encoder_init(struct drm_device *dev)
480{
481	struct drm_encoder *encoder;
482	struct cirrus_encoder *cirrus_encoder;
483
484	cirrus_encoder = kzalloc(sizeof(struct cirrus_encoder), GFP_KERNEL);
485	if (!cirrus_encoder)
486		return NULL;
487
488	encoder = &cirrus_encoder->base;
489	encoder->possible_crtcs = 0x1;
490
491	drm_encoder_init(dev, encoder, &cirrus_encoder_encoder_funcs,
492			 DRM_MODE_ENCODER_DAC);
493	drm_encoder_helper_add(encoder, &cirrus_encoder_helper_funcs);
494
495	return encoder;
496}
497
498
499static int cirrus_vga_get_modes(struct drm_connector *connector)
500{
501	int count;
502
503	/* Just add a static list of modes */
504	if (cirrus_bpp <= 24) {
505		count = drm_add_modes_noedid(connector, 1280, 1024);
506		drm_set_preferred_mode(connector, 1024, 768);
507	} else {
508		count = drm_add_modes_noedid(connector, 800, 600);
509		drm_set_preferred_mode(connector, 800, 600);
510	}
511	return count;
512}
513
514static struct drm_encoder *cirrus_connector_best_encoder(struct drm_connector
515						  *connector)
516{
517	int enc_id = connector->encoder_ids[0];
518	/* pick the encoder ids */
519	if (enc_id)
520		return drm_encoder_find(connector->dev, enc_id);
521	return NULL;
522}
523
524static enum drm_connector_status cirrus_vga_detect(struct drm_connector
525						   *connector, bool force)
526{
527	return connector_status_connected;
528}
529
530static void cirrus_connector_destroy(struct drm_connector *connector)
531{
532	drm_connector_cleanup(connector);
533	kfree(connector);
534}
535
536struct drm_connector_helper_funcs cirrus_vga_connector_helper_funcs = {
537	.get_modes = cirrus_vga_get_modes,
538	.best_encoder = cirrus_connector_best_encoder,
539};
540
541struct drm_connector_funcs cirrus_vga_connector_funcs = {
542	.dpms = drm_helper_connector_dpms,
543	.detect = cirrus_vga_detect,
544	.fill_modes = drm_helper_probe_single_connector_modes,
545	.destroy = cirrus_connector_destroy,
546};
547
548static struct drm_connector *cirrus_vga_init(struct drm_device *dev)
549{
550	struct drm_connector *connector;
551	struct cirrus_connector *cirrus_connector;
552
553	cirrus_connector = kzalloc(sizeof(struct cirrus_connector), GFP_KERNEL);
554	if (!cirrus_connector)
555		return NULL;
556
557	connector = &cirrus_connector->base;
558
559	drm_connector_init(dev, connector,
560			   &cirrus_vga_connector_funcs, DRM_MODE_CONNECTOR_VGA);
561
562	drm_connector_helper_add(connector, &cirrus_vga_connector_helper_funcs);
563
564	drm_connector_register(connector);
565	return connector;
566}
567
568
569int cirrus_modeset_init(struct cirrus_device *cdev)
570{
571	struct drm_encoder *encoder;
572	struct drm_connector *connector;
573	int ret;
574
575	drm_mode_config_init(cdev->dev);
576	cdev->mode_info.mode_config_initialized = true;
577
578	cdev->dev->mode_config.max_width = CIRRUS_MAX_FB_WIDTH;
579	cdev->dev->mode_config.max_height = CIRRUS_MAX_FB_HEIGHT;
580
581	cdev->dev->mode_config.fb_base = cdev->mc.vram_base;
582	cdev->dev->mode_config.preferred_depth = 24;
583	/* don't prefer a shadow on virt GPU */
584	cdev->dev->mode_config.prefer_shadow = 0;
585
586	cirrus_crtc_init(cdev->dev);
587
588	encoder = cirrus_encoder_init(cdev->dev);
589	if (!encoder) {
590		DRM_ERROR("cirrus_encoder_init failed\n");
591		return -1;
592	}
593
594	connector = cirrus_vga_init(cdev->dev);
595	if (!connector) {
596		DRM_ERROR("cirrus_vga_init failed\n");
597		return -1;
598	}
599
600	drm_mode_connector_attach_encoder(connector, encoder);
601
602	ret = cirrus_fbdev_init(cdev);
603	if (ret) {
604		DRM_ERROR("cirrus_fbdev_init failed\n");
605		return ret;
606	}
607
608	return 0;
609}
610
611void cirrus_modeset_fini(struct cirrus_device *cdev)
612{
613	cirrus_fbdev_fini(cdev);
614
615	if (cdev->mode_info.mode_config_initialized) {
616		drm_mode_config_cleanup(cdev->dev);
617		cdev->mode_info.mode_config_initialized = false;
618	}
619}
620