1/*
2 * OMAP interface clock support
3 *
4 * Copyright (C) 2013 Texas Instruments, Inc.
5 *
6 * Tero Kristo <t-kristo@ti.com>
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 *
12 * This program is distributed "as is" WITHOUT ANY WARRANTY of any
13 * kind, whether express or implied; without even the implied warranty
14 * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
15 * GNU General Public License for more details.
16 */
17
18#include <linux/clk-provider.h>
19#include <linux/slab.h>
20#include <linux/of.h>
21#include <linux/of_address.h>
22#include <linux/clk/ti.h>
23#include "clock.h"
24
25#undef pr_fmt
26#define pr_fmt(fmt) "%s: " fmt, __func__
27
28static const struct clk_ops ti_interface_clk_ops = {
29	.init		= &omap2_init_clk_clkdm,
30	.enable		= &omap2_dflt_clk_enable,
31	.disable	= &omap2_dflt_clk_disable,
32	.is_enabled	= &omap2_dflt_clk_is_enabled,
33};
34
35static struct clk *_register_interface(struct device *dev, const char *name,
36				       const char *parent_name,
37				       void __iomem *reg, u8 bit_idx,
38				       const struct clk_hw_omap_ops *ops)
39{
40	struct clk_init_data init = { NULL };
41	struct clk_hw_omap *clk_hw;
42	struct clk *clk;
43
44	clk_hw = kzalloc(sizeof(*clk_hw), GFP_KERNEL);
45	if (!clk_hw)
46		return ERR_PTR(-ENOMEM);
47
48	clk_hw->hw.init = &init;
49	clk_hw->ops = ops;
50	clk_hw->flags = MEMMAP_ADDRESSING;
51	clk_hw->enable_reg = reg;
52	clk_hw->enable_bit = bit_idx;
53
54	init.name = name;
55	init.ops = &ti_interface_clk_ops;
56	init.flags = 0;
57
58	init.num_parents = 1;
59	init.parent_names = &parent_name;
60
61	clk = clk_register(NULL, &clk_hw->hw);
62
63	if (IS_ERR(clk))
64		kfree(clk_hw);
65	else
66		omap2_init_clk_hw_omap_clocks(clk);
67
68	return clk;
69}
70
71#if defined(CONFIG_ARCH_OMAP3) && defined(CONFIG_ATAGS)
72struct clk *ti_clk_register_interface(struct ti_clk *setup)
73{
74	const struct clk_hw_omap_ops *ops = &clkhwops_iclk_wait;
75	u32 reg;
76	struct clk_omap_reg *reg_setup;
77	struct ti_clk_gate *gate;
78
79	gate = setup->data;
80	reg_setup = (struct clk_omap_reg *)&reg;
81	reg_setup->index = gate->module;
82	reg_setup->offset = gate->reg;
83
84	if (gate->flags & CLKF_NO_WAIT)
85		ops = &clkhwops_iclk;
86
87	if (gate->flags & CLKF_HSOTGUSB)
88		ops = &clkhwops_omap3430es2_iclk_hsotgusb_wait;
89
90	if (gate->flags & CLKF_DSS)
91		ops = &clkhwops_omap3430es2_iclk_dss_usbhost_wait;
92
93	if (gate->flags & CLKF_SSI)
94		ops = &clkhwops_omap3430es2_iclk_ssi_wait;
95
96	if (gate->flags & CLKF_AM35XX)
97		ops = &clkhwops_am35xx_ipss_wait;
98
99	return _register_interface(NULL, setup->name, gate->parent,
100				   (void __iomem *)reg, gate->bit_shift, ops);
101}
102#endif
103
104static void __init _of_ti_interface_clk_setup(struct device_node *node,
105					      const struct clk_hw_omap_ops *ops)
106{
107	struct clk *clk;
108	const char *parent_name;
109	void __iomem *reg;
110	u8 enable_bit = 0;
111	u32 val;
112
113	reg = ti_clk_get_reg_addr(node, 0);
114	if (IS_ERR(reg))
115		return;
116
117	if (!of_property_read_u32(node, "ti,bit-shift", &val))
118		enable_bit = val;
119
120	parent_name = of_clk_get_parent_name(node, 0);
121	if (!parent_name) {
122		pr_err("%s must have a parent\n", node->name);
123		return;
124	}
125
126	clk = _register_interface(NULL, node->name, parent_name, reg,
127				  enable_bit, ops);
128
129	if (!IS_ERR(clk))
130		of_clk_add_provider(node, of_clk_src_simple_get, clk);
131}
132
133static void __init of_ti_interface_clk_setup(struct device_node *node)
134{
135	_of_ti_interface_clk_setup(node, &clkhwops_iclk_wait);
136}
137CLK_OF_DECLARE(ti_interface_clk, "ti,omap3-interface-clock",
138	       of_ti_interface_clk_setup);
139
140static void __init of_ti_no_wait_interface_clk_setup(struct device_node *node)
141{
142	_of_ti_interface_clk_setup(node, &clkhwops_iclk);
143}
144CLK_OF_DECLARE(ti_no_wait_interface_clk, "ti,omap3-no-wait-interface-clock",
145	       of_ti_no_wait_interface_clk_setup);
146
147#ifdef CONFIG_ARCH_OMAP3
148static void __init of_ti_hsotgusb_interface_clk_setup(struct device_node *node)
149{
150	_of_ti_interface_clk_setup(node,
151				   &clkhwops_omap3430es2_iclk_hsotgusb_wait);
152}
153CLK_OF_DECLARE(ti_hsotgusb_interface_clk, "ti,omap3-hsotgusb-interface-clock",
154	       of_ti_hsotgusb_interface_clk_setup);
155
156static void __init of_ti_dss_interface_clk_setup(struct device_node *node)
157{
158	_of_ti_interface_clk_setup(node,
159				   &clkhwops_omap3430es2_iclk_dss_usbhost_wait);
160}
161CLK_OF_DECLARE(ti_dss_interface_clk, "ti,omap3-dss-interface-clock",
162	       of_ti_dss_interface_clk_setup);
163
164static void __init of_ti_ssi_interface_clk_setup(struct device_node *node)
165{
166	_of_ti_interface_clk_setup(node, &clkhwops_omap3430es2_iclk_ssi_wait);
167}
168CLK_OF_DECLARE(ti_ssi_interface_clk, "ti,omap3-ssi-interface-clock",
169	       of_ti_ssi_interface_clk_setup);
170
171static void __init of_ti_am35xx_interface_clk_setup(struct device_node *node)
172{
173	_of_ti_interface_clk_setup(node, &clkhwops_am35xx_ipss_wait);
174}
175CLK_OF_DECLARE(ti_am35xx_interface_clk, "ti,am35xx-interface-clock",
176	       of_ti_am35xx_interface_clk_setup);
177#endif
178
179#ifdef CONFIG_SOC_OMAP2430
180static void __init of_ti_omap2430_interface_clk_setup(struct device_node *node)
181{
182	_of_ti_interface_clk_setup(node, &clkhwops_omap2430_i2chs_wait);
183}
184CLK_OF_DECLARE(ti_omap2430_interface_clk, "ti,omap2430-interface-clock",
185	       of_ti_omap2430_interface_clk_setup);
186#endif
187