1/*
2 * clk-s2mps11.c - Clock driver for S2MPS11.
3 *
4 * Copyright (C) 2013,2014 Samsung Electornics
5 *
6 * This program is free software; you can redistribute  it and/or modify it
7 * under  the terms of  the GNU General  Public License as published by the
8 * Free Software Foundation;  either version 2 of the  License, or (at your
9 * option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
14 * GNU General Public License for more details.
15 *
16 */
17
18#include <linux/module.h>
19#include <linux/err.h>
20#include <linux/of.h>
21#include <linux/clkdev.h>
22#include <linux/regmap.h>
23#include <linux/clk-provider.h>
24#include <linux/platform_device.h>
25#include <linux/mfd/samsung/s2mps11.h>
26#include <linux/mfd/samsung/s2mps13.h>
27#include <linux/mfd/samsung/s2mps14.h>
28#include <linux/mfd/samsung/s5m8767.h>
29#include <linux/mfd/samsung/core.h>
30
31#define s2mps11_name(a) (a->hw.init->name)
32
33static struct clk **clk_table;
34static struct clk_onecell_data clk_data;
35
36enum {
37	S2MPS11_CLK_AP = 0,
38	S2MPS11_CLK_CP,
39	S2MPS11_CLK_BT,
40	S2MPS11_CLKS_NUM,
41};
42
43struct s2mps11_clk {
44	struct sec_pmic_dev *iodev;
45	struct device_node *clk_np;
46	struct clk_hw hw;
47	struct clk *clk;
48	struct clk_lookup *lookup;
49	u32 mask;
50	unsigned int reg;
51};
52
53static struct s2mps11_clk *to_s2mps11_clk(struct clk_hw *hw)
54{
55	return container_of(hw, struct s2mps11_clk, hw);
56}
57
58static int s2mps11_clk_prepare(struct clk_hw *hw)
59{
60	struct s2mps11_clk *s2mps11 = to_s2mps11_clk(hw);
61	int ret;
62
63	ret = regmap_update_bits(s2mps11->iodev->regmap_pmic,
64				 s2mps11->reg,
65				 s2mps11->mask, s2mps11->mask);
66
67	return ret;
68}
69
70static void s2mps11_clk_unprepare(struct clk_hw *hw)
71{
72	struct s2mps11_clk *s2mps11 = to_s2mps11_clk(hw);
73	int ret;
74
75	ret = regmap_update_bits(s2mps11->iodev->regmap_pmic, s2mps11->reg,
76			   s2mps11->mask, ~s2mps11->mask);
77}
78
79static int s2mps11_clk_is_prepared(struct clk_hw *hw)
80{
81	int ret;
82	u32 val;
83	struct s2mps11_clk *s2mps11 = to_s2mps11_clk(hw);
84
85	ret = regmap_read(s2mps11->iodev->regmap_pmic,
86				s2mps11->reg, &val);
87	if (ret < 0)
88		return -EINVAL;
89
90	return val & s2mps11->mask;
91}
92
93static unsigned long s2mps11_clk_recalc_rate(struct clk_hw *hw,
94					     unsigned long parent_rate)
95{
96	return 32768;
97}
98
99static struct clk_ops s2mps11_clk_ops = {
100	.prepare	= s2mps11_clk_prepare,
101	.unprepare	= s2mps11_clk_unprepare,
102	.is_prepared	= s2mps11_clk_is_prepared,
103	.recalc_rate	= s2mps11_clk_recalc_rate,
104};
105
106static struct clk_init_data s2mps11_clks_init[S2MPS11_CLKS_NUM] = {
107	[S2MPS11_CLK_AP] = {
108		.name = "s2mps11_ap",
109		.ops = &s2mps11_clk_ops,
110		.flags = CLK_IS_ROOT,
111	},
112	[S2MPS11_CLK_CP] = {
113		.name = "s2mps11_cp",
114		.ops = &s2mps11_clk_ops,
115		.flags = CLK_IS_ROOT,
116	},
117	[S2MPS11_CLK_BT] = {
118		.name = "s2mps11_bt",
119		.ops = &s2mps11_clk_ops,
120		.flags = CLK_IS_ROOT,
121	},
122};
123
124static struct clk_init_data s2mps13_clks_init[S2MPS11_CLKS_NUM] = {
125	[S2MPS11_CLK_AP] = {
126		.name = "s2mps13_ap",
127		.ops = &s2mps11_clk_ops,
128		.flags = CLK_IS_ROOT,
129	},
130	[S2MPS11_CLK_CP] = {
131		.name = "s2mps13_cp",
132		.ops = &s2mps11_clk_ops,
133		.flags = CLK_IS_ROOT,
134	},
135	[S2MPS11_CLK_BT] = {
136		.name = "s2mps13_bt",
137		.ops = &s2mps11_clk_ops,
138		.flags = CLK_IS_ROOT,
139	},
140};
141
142static struct clk_init_data s2mps14_clks_init[S2MPS11_CLKS_NUM] = {
143	[S2MPS11_CLK_AP] = {
144		.name = "s2mps14_ap",
145		.ops = &s2mps11_clk_ops,
146		.flags = CLK_IS_ROOT,
147	},
148	[S2MPS11_CLK_BT] = {
149		.name = "s2mps14_bt",
150		.ops = &s2mps11_clk_ops,
151		.flags = CLK_IS_ROOT,
152	},
153};
154
155static struct device_node *s2mps11_clk_parse_dt(struct platform_device *pdev,
156		struct clk_init_data *clks_init)
157{
158	struct sec_pmic_dev *iodev = dev_get_drvdata(pdev->dev.parent);
159	struct device_node *clk_np;
160	int i;
161
162	if (!iodev->dev->of_node)
163		return ERR_PTR(-EINVAL);
164
165	clk_np = of_get_child_by_name(iodev->dev->of_node, "clocks");
166	if (!clk_np) {
167		dev_err(&pdev->dev, "could not find clock sub-node\n");
168		return ERR_PTR(-EINVAL);
169	}
170
171	for (i = 0; i < S2MPS11_CLKS_NUM; i++) {
172		if (!clks_init[i].name)
173			continue; /* Skip clocks not present in some devices */
174		of_property_read_string_index(clk_np, "clock-output-names", i,
175				&clks_init[i].name);
176	}
177
178	return clk_np;
179}
180
181static int s2mps11_clk_probe(struct platform_device *pdev)
182{
183	struct sec_pmic_dev *iodev = dev_get_drvdata(pdev->dev.parent);
184	struct s2mps11_clk *s2mps11_clks, *s2mps11_clk;
185	unsigned int s2mps11_reg;
186	struct clk_init_data *clks_init;
187	int i, ret = 0;
188
189	s2mps11_clks = devm_kzalloc(&pdev->dev, sizeof(*s2mps11_clk) *
190					S2MPS11_CLKS_NUM, GFP_KERNEL);
191	if (!s2mps11_clks)
192		return -ENOMEM;
193
194	s2mps11_clk = s2mps11_clks;
195
196	clk_table = devm_kzalloc(&pdev->dev, sizeof(struct clk *) *
197				 S2MPS11_CLKS_NUM, GFP_KERNEL);
198	if (!clk_table)
199		return -ENOMEM;
200
201	switch(platform_get_device_id(pdev)->driver_data) {
202	case S2MPS11X:
203		s2mps11_reg = S2MPS11_REG_RTC_CTRL;
204		clks_init = s2mps11_clks_init;
205		break;
206	case S2MPS13X:
207		s2mps11_reg = S2MPS13_REG_RTCCTRL;
208		clks_init = s2mps13_clks_init;
209		break;
210	case S2MPS14X:
211		s2mps11_reg = S2MPS14_REG_RTCCTRL;
212		clks_init = s2mps14_clks_init;
213		break;
214	case S5M8767X:
215		s2mps11_reg = S5M8767_REG_CTRL1;
216		clks_init = s2mps11_clks_init;
217		break;
218	default:
219		dev_err(&pdev->dev, "Invalid device type\n");
220		return -EINVAL;
221	}
222
223	/* Store clocks of_node in first element of s2mps11_clks array */
224	s2mps11_clks->clk_np = s2mps11_clk_parse_dt(pdev, clks_init);
225	if (IS_ERR(s2mps11_clks->clk_np))
226		return PTR_ERR(s2mps11_clks->clk_np);
227
228	for (i = 0; i < S2MPS11_CLKS_NUM; i++, s2mps11_clk++) {
229		if (!clks_init[i].name)
230			continue; /* Skip clocks not present in some devices */
231		s2mps11_clk->iodev = iodev;
232		s2mps11_clk->hw.init = &clks_init[i];
233		s2mps11_clk->mask = 1 << i;
234		s2mps11_clk->reg = s2mps11_reg;
235
236		s2mps11_clk->clk = devm_clk_register(&pdev->dev,
237							&s2mps11_clk->hw);
238		if (IS_ERR(s2mps11_clk->clk)) {
239			dev_err(&pdev->dev, "Fail to register : %s\n",
240						s2mps11_name(s2mps11_clk));
241			ret = PTR_ERR(s2mps11_clk->clk);
242			goto err_reg;
243		}
244
245		s2mps11_clk->lookup = clkdev_alloc(s2mps11_clk->clk,
246					s2mps11_name(s2mps11_clk), NULL);
247		if (!s2mps11_clk->lookup) {
248			ret = -ENOMEM;
249			goto err_lup;
250		}
251
252		clkdev_add(s2mps11_clk->lookup);
253	}
254
255	for (i = 0; i < S2MPS11_CLKS_NUM; i++) {
256		/* Skip clocks not present on S2MPS14 */
257		if (!clks_init[i].name)
258			continue;
259		clk_table[i] = s2mps11_clks[i].clk;
260	}
261
262	clk_data.clks = clk_table;
263	clk_data.clk_num = S2MPS11_CLKS_NUM;
264	of_clk_add_provider(s2mps11_clks->clk_np, of_clk_src_onecell_get,
265			&clk_data);
266
267	platform_set_drvdata(pdev, s2mps11_clks);
268
269	return ret;
270err_lup:
271	devm_clk_unregister(&pdev->dev, s2mps11_clk->clk);
272err_reg:
273	while (s2mps11_clk > s2mps11_clks) {
274		if (s2mps11_clk->lookup) {
275			clkdev_drop(s2mps11_clk->lookup);
276			devm_clk_unregister(&pdev->dev, s2mps11_clk->clk);
277		}
278		s2mps11_clk--;
279	}
280
281	return ret;
282}
283
284static int s2mps11_clk_remove(struct platform_device *pdev)
285{
286	struct s2mps11_clk *s2mps11_clks = platform_get_drvdata(pdev);
287	int i;
288
289	of_clk_del_provider(s2mps11_clks[0].clk_np);
290	/* Drop the reference obtained in s2mps11_clk_parse_dt */
291	of_node_put(s2mps11_clks[0].clk_np);
292
293	for (i = 0; i < S2MPS11_CLKS_NUM; i++) {
294		/* Skip clocks not present on S2MPS14 */
295		if (!s2mps11_clks[i].lookup)
296			continue;
297		clkdev_drop(s2mps11_clks[i].lookup);
298	}
299
300	return 0;
301}
302
303static const struct platform_device_id s2mps11_clk_id[] = {
304	{ "s2mps11-clk", S2MPS11X},
305	{ "s2mps13-clk", S2MPS13X},
306	{ "s2mps14-clk", S2MPS14X},
307	{ "s5m8767-clk", S5M8767X},
308	{ },
309};
310MODULE_DEVICE_TABLE(platform, s2mps11_clk_id);
311
312static struct platform_driver s2mps11_clk_driver = {
313	.driver = {
314		.name  = "s2mps11-clk",
315	},
316	.probe = s2mps11_clk_probe,
317	.remove = s2mps11_clk_remove,
318	.id_table = s2mps11_clk_id,
319};
320
321static int __init s2mps11_clk_init(void)
322{
323	return platform_driver_register(&s2mps11_clk_driver);
324}
325subsys_initcall(s2mps11_clk_init);
326
327static void __init s2mps11_clk_cleanup(void)
328{
329	platform_driver_unregister(&s2mps11_clk_driver);
330}
331module_exit(s2mps11_clk_cleanup);
332
333MODULE_DESCRIPTION("S2MPS11 Clock Driver");
334MODULE_AUTHOR("Yadwinder Singh Brar <yadi.brar@samsung.com>");
335MODULE_LICENSE("GPL");
336