1#
2# Bus Devices
3#
4
5menu "Bus devices"
6
7config ARM_CCI
8	bool
9
10config ARM_CCI400_COMMON
11	bool
12	select ARM_CCI
13
14config ARM_CCI400_PMU
15	bool "ARM CCI400 PMU support"
16	default y
17	depends on ARM || ARM64
18	depends on HW_PERF_EVENTS
19	select ARM_CCI400_COMMON
20	help
21	  Support for PMU events monitoring on the ARM CCI cache coherent
22	  interconnect.
23
24	  If unsure, say Y
25
26config ARM_CCI400_PORT_CTRL
27	bool
28	depends on ARM && OF && CPU_V7
29	select ARM_CCI400_COMMON
30	help
31	  Low level power management driver for CCI400 cache coherent
32	  interconnect for ARM platforms.
33
34config ARM_CCN
35	bool "ARM CCN driver support"
36	depends on ARM || ARM64
37	depends on PERF_EVENTS
38	help
39	  PMU (perf) driver supporting the ARM CCN (Cache Coherent Network)
40	  interconnect.
41
42config BRCMSTB_GISB_ARB
43	bool "Broadcom STB GISB bus arbiter"
44	depends on ARM || MIPS
45	help
46	  Driver for the Broadcom Set Top Box System-on-a-chip internal bus
47	  arbiter. This driver provides timeout and target abort error handling
48	  and internal bus master decoding.
49
50config IMX_WEIM
51	bool "Freescale EIM DRIVER"
52	depends on ARCH_MXC
53	help
54	  Driver for i.MX WEIM controller.
55	  The WEIM(Wireless External Interface Module) works like a bus.
56	  You can attach many different devices on it, such as NOR, onenand.
57
58config MIPS_CDMM
59	bool "MIPS Common Device Memory Map (CDMM) Driver"
60	depends on CPU_MIPSR2
61	help
62	  Driver needed for the MIPS Common Device Memory Map bus in MIPS
63	  cores. This bus is for per-CPU tightly coupled devices such as the
64	  Fast Debug Channel (FDC).
65
66	  For this to work, either your bootloader needs to enable the CDMM
67	  region at an unused physical address on the boot CPU, or else your
68	  platform code needs to implement mips_cdmm_phys_base() (see
69	  asm/cdmm.h).
70
71config MVEBU_MBUS
72	bool
73	depends on PLAT_ORION
74	help
75	  Driver needed for the MBus configuration on Marvell EBU SoCs
76	  (Kirkwood, Dove, Orion5x, MV78XX0 and Armada 370/XP).
77
78config OMAP_INTERCONNECT
79	tristate "OMAP INTERCONNECT DRIVER"
80	depends on ARCH_OMAP2PLUS
81
82	help
83	  Driver to enable OMAP interconnect error handling driver.
84
85config OMAP_OCP2SCP
86	tristate "OMAP OCP2SCP DRIVER"
87	depends on ARCH_OMAP2PLUS
88	help
89	  Driver to enable ocp2scp module which transforms ocp interface
90	  protocol to scp protocol. In OMAP4, USB PHY is connected via
91	  OCP2SCP and in OMAP5, both USB PHY and SATA PHY is connected via
92	  OCP2SCP.
93
94config SIMPLE_PM_BUS
95	bool "Simple Power-Managed Bus Driver"
96	depends on OF && PM
97	depends on ARCH_SHMOBILE || COMPILE_TEST
98	help
99	  Driver for transparent busses that don't need a real driver, but
100	  where the bus controller is part of a PM domain, or under the control
101	  of a functional clock, and thus relies on runtime PM for managing
102	  this PM domain and/or clock.
103	  An example of such a bus controller is the Renesas Bus State
104	  Controller (BSC, sometimes called "LBSC within Bus Bridge", or
105	  "External Bus Interface") as found on several Renesas ARM SoCs.
106
107config VEXPRESS_CONFIG
108	bool "Versatile Express configuration bus"
109	default y if ARCH_VEXPRESS
110	depends on ARM || ARM64
111	depends on OF
112	select REGMAP
113	help
114	  Platform configuration infrastructure for the ARM Ltd.
115	  Versatile Express.
116endmenu
117