1/* 2 * mm.c - Micro Memory(tm) PCI memory board block device driver - v2.3 3 * 4 * (C) 2001 San Mehat <nettwerk@valinux.com> 5 * (C) 2001 Johannes Erdfelt <jerdfelt@valinux.com> 6 * (C) 2001 NeilBrown <neilb@cse.unsw.edu.au> 7 * 8 * This driver for the Micro Memory PCI Memory Module with Battery Backup 9 * is Copyright Micro Memory Inc 2001-2002. All rights reserved. 10 * 11 * This driver is released to the public under the terms of the 12 * GNU GENERAL PUBLIC LICENSE version 2 13 * See the file COPYING for details. 14 * 15 * This driver provides a standard block device interface for Micro Memory(tm) 16 * PCI based RAM boards. 17 * 10/05/01: Phap Nguyen - Rebuilt the driver 18 * 10/22/01: Phap Nguyen - v2.1 Added disk partitioning 19 * 29oct2001:NeilBrown - Use make_request_fn instead of request_fn 20 * - use stand disk partitioning (so fdisk works). 21 * 08nov2001:NeilBrown - change driver name from "mm" to "umem" 22 * - incorporate into main kernel 23 * 08apr2002:NeilBrown - Move some of interrupt handle to tasklet 24 * - use spin_lock_bh instead of _irq 25 * - Never block on make_request. queue 26 * bh's instead. 27 * - unregister umem from devfs at mod unload 28 * - Change version to 2.3 29 * 07Nov2001:Phap Nguyen - Select pci read command: 06, 12, 15 (Decimal) 30 * 07Jan2002: P. Nguyen - Used PCI Memory Write & Invalidate for DMA 31 * 15May2002:NeilBrown - convert to bio for 2.5 32 * 17May2002:NeilBrown - remove init_mem initialisation. Instead detect 33 * - a sequence of writes that cover the card, and 34 * - set initialised bit then. 35 */ 36 37#undef DEBUG /* #define DEBUG if you want debugging info (pr_debug) */ 38#include <linux/fs.h> 39#include <linux/bio.h> 40#include <linux/kernel.h> 41#include <linux/mm.h> 42#include <linux/mman.h> 43#include <linux/gfp.h> 44#include <linux/ioctl.h> 45#include <linux/module.h> 46#include <linux/init.h> 47#include <linux/interrupt.h> 48#include <linux/timer.h> 49#include <linux/pci.h> 50#include <linux/dma-mapping.h> 51 52#include <linux/fcntl.h> /* O_ACCMODE */ 53#include <linux/hdreg.h> /* HDIO_GETGEO */ 54 55#include "umem.h" 56 57#include <asm/uaccess.h> 58#include <asm/io.h> 59 60#define MM_MAXCARDS 4 61#define MM_RAHEAD 2 /* two sectors */ 62#define MM_BLKSIZE 1024 /* 1k blocks */ 63#define MM_HARDSECT 512 /* 512-byte hardware sectors */ 64#define MM_SHIFT 6 /* max 64 partitions on 4 cards */ 65 66/* 67 * Version Information 68 */ 69 70#define DRIVER_NAME "umem" 71#define DRIVER_VERSION "v2.3" 72#define DRIVER_AUTHOR "San Mehat, Johannes Erdfelt, NeilBrown" 73#define DRIVER_DESC "Micro Memory(tm) PCI memory board block driver" 74 75static int debug; 76/* #define HW_TRACE(x) writeb(x,cards[0].csr_remap + MEMCTRLSTATUS_MAGIC) */ 77#define HW_TRACE(x) 78 79#define DEBUG_LED_ON_TRANSFER 0x01 80#define DEBUG_BATTERY_POLLING 0x02 81 82module_param(debug, int, 0644); 83MODULE_PARM_DESC(debug, "Debug bitmask"); 84 85static int pci_read_cmd = 0x0C; /* Read Multiple */ 86module_param(pci_read_cmd, int, 0); 87MODULE_PARM_DESC(pci_read_cmd, "PCI read command"); 88 89static int pci_write_cmd = 0x0F; /* Write and Invalidate */ 90module_param(pci_write_cmd, int, 0); 91MODULE_PARM_DESC(pci_write_cmd, "PCI write command"); 92 93static int pci_cmds; 94 95static int major_nr; 96 97#include <linux/blkdev.h> 98#include <linux/blkpg.h> 99 100struct cardinfo { 101 struct pci_dev *dev; 102 103 unsigned char __iomem *csr_remap; 104 unsigned int mm_size; /* size in kbytes */ 105 106 unsigned int init_size; /* initial segment, in sectors, 107 * that we know to 108 * have been written 109 */ 110 struct bio *bio, *currentbio, **biotail; 111 struct bvec_iter current_iter; 112 113 struct request_queue *queue; 114 115 struct mm_page { 116 dma_addr_t page_dma; 117 struct mm_dma_desc *desc; 118 int cnt, headcnt; 119 struct bio *bio, **biotail; 120 struct bvec_iter iter; 121 } mm_pages[2]; 122#define DESC_PER_PAGE ((PAGE_SIZE*2)/sizeof(struct mm_dma_desc)) 123 124 int Active, Ready; 125 126 struct tasklet_struct tasklet; 127 unsigned int dma_status; 128 129 struct { 130 int good; 131 int warned; 132 unsigned long last_change; 133 } battery[2]; 134 135 spinlock_t lock; 136 int check_batteries; 137 138 int flags; 139}; 140 141static struct cardinfo cards[MM_MAXCARDS]; 142static struct timer_list battery_timer; 143 144static int num_cards; 145 146static struct gendisk *mm_gendisk[MM_MAXCARDS]; 147 148static void check_batteries(struct cardinfo *card); 149 150static int get_userbit(struct cardinfo *card, int bit) 151{ 152 unsigned char led; 153 154 led = readb(card->csr_remap + MEMCTRLCMD_LEDCTRL); 155 return led & bit; 156} 157 158static int set_userbit(struct cardinfo *card, int bit, unsigned char state) 159{ 160 unsigned char led; 161 162 led = readb(card->csr_remap + MEMCTRLCMD_LEDCTRL); 163 if (state) 164 led |= bit; 165 else 166 led &= ~bit; 167 writeb(led, card->csr_remap + MEMCTRLCMD_LEDCTRL); 168 169 return 0; 170} 171 172/* 173 * NOTE: For the power LED, use the LED_POWER_* macros since they differ 174 */ 175static void set_led(struct cardinfo *card, int shift, unsigned char state) 176{ 177 unsigned char led; 178 179 led = readb(card->csr_remap + MEMCTRLCMD_LEDCTRL); 180 if (state == LED_FLIP) 181 led ^= (1<<shift); 182 else { 183 led &= ~(0x03 << shift); 184 led |= (state << shift); 185 } 186 writeb(led, card->csr_remap + MEMCTRLCMD_LEDCTRL); 187 188} 189 190#ifdef MM_DIAG 191static void dump_regs(struct cardinfo *card) 192{ 193 unsigned char *p; 194 int i, i1; 195 196 p = card->csr_remap; 197 for (i = 0; i < 8; i++) { 198 printk(KERN_DEBUG "%p ", p); 199 200 for (i1 = 0; i1 < 16; i1++) 201 printk("%02x ", *p++); 202 203 printk("\n"); 204 } 205} 206#endif 207 208static void dump_dmastat(struct cardinfo *card, unsigned int dmastat) 209{ 210 dev_printk(KERN_DEBUG, &card->dev->dev, "DMAstat - "); 211 if (dmastat & DMASCR_ANY_ERR) 212 printk(KERN_CONT "ANY_ERR "); 213 if (dmastat & DMASCR_MBE_ERR) 214 printk(KERN_CONT "MBE_ERR "); 215 if (dmastat & DMASCR_PARITY_ERR_REP) 216 printk(KERN_CONT "PARITY_ERR_REP "); 217 if (dmastat & DMASCR_PARITY_ERR_DET) 218 printk(KERN_CONT "PARITY_ERR_DET "); 219 if (dmastat & DMASCR_SYSTEM_ERR_SIG) 220 printk(KERN_CONT "SYSTEM_ERR_SIG "); 221 if (dmastat & DMASCR_TARGET_ABT) 222 printk(KERN_CONT "TARGET_ABT "); 223 if (dmastat & DMASCR_MASTER_ABT) 224 printk(KERN_CONT "MASTER_ABT "); 225 if (dmastat & DMASCR_CHAIN_COMPLETE) 226 printk(KERN_CONT "CHAIN_COMPLETE "); 227 if (dmastat & DMASCR_DMA_COMPLETE) 228 printk(KERN_CONT "DMA_COMPLETE "); 229 printk("\n"); 230} 231 232/* 233 * Theory of request handling 234 * 235 * Each bio is assigned to one mm_dma_desc - which may not be enough FIXME 236 * We have two pages of mm_dma_desc, holding about 64 descriptors 237 * each. These are allocated at init time. 238 * One page is "Ready" and is either full, or can have request added. 239 * The other page might be "Active", which DMA is happening on it. 240 * 241 * Whenever IO on the active page completes, the Ready page is activated 242 * and the ex-Active page is clean out and made Ready. 243 * Otherwise the Ready page is only activated when it becomes full. 244 * 245 * If a request arrives while both pages a full, it is queued, and b_rdev is 246 * overloaded to record whether it was a read or a write. 247 * 248 * The interrupt handler only polls the device to clear the interrupt. 249 * The processing of the result is done in a tasklet. 250 */ 251 252static void mm_start_io(struct cardinfo *card) 253{ 254 /* we have the lock, we know there is 255 * no IO active, and we know that card->Active 256 * is set 257 */ 258 struct mm_dma_desc *desc; 259 struct mm_page *page; 260 int offset; 261 262 /* make the last descriptor end the chain */ 263 page = &card->mm_pages[card->Active]; 264 pr_debug("start_io: %d %d->%d\n", 265 card->Active, page->headcnt, page->cnt - 1); 266 desc = &page->desc[page->cnt-1]; 267 268 desc->control_bits |= cpu_to_le32(DMASCR_CHAIN_COMP_EN); 269 desc->control_bits &= ~cpu_to_le32(DMASCR_CHAIN_EN); 270 desc->sem_control_bits = desc->control_bits; 271 272 273 if (debug & DEBUG_LED_ON_TRANSFER) 274 set_led(card, LED_REMOVE, LED_ON); 275 276 desc = &page->desc[page->headcnt]; 277 writel(0, card->csr_remap + DMA_PCI_ADDR); 278 writel(0, card->csr_remap + DMA_PCI_ADDR + 4); 279 280 writel(0, card->csr_remap + DMA_LOCAL_ADDR); 281 writel(0, card->csr_remap + DMA_LOCAL_ADDR + 4); 282 283 writel(0, card->csr_remap + DMA_TRANSFER_SIZE); 284 writel(0, card->csr_remap + DMA_TRANSFER_SIZE + 4); 285 286 writel(0, card->csr_remap + DMA_SEMAPHORE_ADDR); 287 writel(0, card->csr_remap + DMA_SEMAPHORE_ADDR + 4); 288 289 offset = ((char *)desc) - ((char *)page->desc); 290 writel(cpu_to_le32((page->page_dma+offset) & 0xffffffff), 291 card->csr_remap + DMA_DESCRIPTOR_ADDR); 292 /* Force the value to u64 before shifting otherwise >> 32 is undefined C 293 * and on some ports will do nothing ! */ 294 writel(cpu_to_le32(((u64)page->page_dma)>>32), 295 card->csr_remap + DMA_DESCRIPTOR_ADDR + 4); 296 297 /* Go, go, go */ 298 writel(cpu_to_le32(DMASCR_GO | DMASCR_CHAIN_EN | pci_cmds), 299 card->csr_remap + DMA_STATUS_CTRL); 300} 301 302static int add_bio(struct cardinfo *card); 303 304static void activate(struct cardinfo *card) 305{ 306 /* if No page is Active, and Ready is 307 * not empty, then switch Ready page 308 * to active and start IO. 309 * Then add any bh's that are available to Ready 310 */ 311 312 do { 313 while (add_bio(card)) 314 ; 315 316 if (card->Active == -1 && 317 card->mm_pages[card->Ready].cnt > 0) { 318 card->Active = card->Ready; 319 card->Ready = 1-card->Ready; 320 mm_start_io(card); 321 } 322 323 } while (card->Active == -1 && add_bio(card)); 324} 325 326static inline void reset_page(struct mm_page *page) 327{ 328 page->cnt = 0; 329 page->headcnt = 0; 330 page->bio = NULL; 331 page->biotail = &page->bio; 332} 333 334/* 335 * If there is room on Ready page, take 336 * one bh off list and add it. 337 * return 1 if there was room, else 0. 338 */ 339static int add_bio(struct cardinfo *card) 340{ 341 struct mm_page *p; 342 struct mm_dma_desc *desc; 343 dma_addr_t dma_handle; 344 int offset; 345 struct bio *bio; 346 struct bio_vec vec; 347 int rw; 348 349 bio = card->currentbio; 350 if (!bio && card->bio) { 351 card->currentbio = card->bio; 352 card->current_iter = card->bio->bi_iter; 353 card->bio = card->bio->bi_next; 354 if (card->bio == NULL) 355 card->biotail = &card->bio; 356 card->currentbio->bi_next = NULL; 357 return 1; 358 } 359 if (!bio) 360 return 0; 361 362 rw = bio_rw(bio); 363 if (card->mm_pages[card->Ready].cnt >= DESC_PER_PAGE) 364 return 0; 365 366 vec = bio_iter_iovec(bio, card->current_iter); 367 368 dma_handle = pci_map_page(card->dev, 369 vec.bv_page, 370 vec.bv_offset, 371 vec.bv_len, 372 (rw == READ) ? 373 PCI_DMA_FROMDEVICE : PCI_DMA_TODEVICE); 374 375 p = &card->mm_pages[card->Ready]; 376 desc = &p->desc[p->cnt]; 377 p->cnt++; 378 if (p->bio == NULL) 379 p->iter = card->current_iter; 380 if ((p->biotail) != &bio->bi_next) { 381 *(p->biotail) = bio; 382 p->biotail = &(bio->bi_next); 383 bio->bi_next = NULL; 384 } 385 386 desc->data_dma_handle = dma_handle; 387 388 desc->pci_addr = cpu_to_le64((u64)desc->data_dma_handle); 389 desc->local_addr = cpu_to_le64(card->current_iter.bi_sector << 9); 390 desc->transfer_size = cpu_to_le32(vec.bv_len); 391 offset = (((char *)&desc->sem_control_bits) - ((char *)p->desc)); 392 desc->sem_addr = cpu_to_le64((u64)(p->page_dma+offset)); 393 desc->zero1 = desc->zero2 = 0; 394 offset = (((char *)(desc+1)) - ((char *)p->desc)); 395 desc->next_desc_addr = cpu_to_le64(p->page_dma+offset); 396 desc->control_bits = cpu_to_le32(DMASCR_GO|DMASCR_ERR_INT_EN| 397 DMASCR_PARITY_INT_EN| 398 DMASCR_CHAIN_EN | 399 DMASCR_SEM_EN | 400 pci_cmds); 401 if (rw == WRITE) 402 desc->control_bits |= cpu_to_le32(DMASCR_TRANSFER_READ); 403 desc->sem_control_bits = desc->control_bits; 404 405 406 bio_advance_iter(bio, &card->current_iter, vec.bv_len); 407 if (!card->current_iter.bi_size) 408 card->currentbio = NULL; 409 410 return 1; 411} 412 413static void process_page(unsigned long data) 414{ 415 /* check if any of the requests in the page are DMA_COMPLETE, 416 * and deal with them appropriately. 417 * If we find a descriptor without DMA_COMPLETE in the semaphore, then 418 * dma must have hit an error on that descriptor, so use dma_status 419 * instead and assume that all following descriptors must be re-tried. 420 */ 421 struct mm_page *page; 422 struct bio *return_bio = NULL; 423 struct cardinfo *card = (struct cardinfo *)data; 424 unsigned int dma_status = card->dma_status; 425 426 spin_lock_bh(&card->lock); 427 if (card->Active < 0) 428 goto out_unlock; 429 page = &card->mm_pages[card->Active]; 430 431 while (page->headcnt < page->cnt) { 432 struct bio *bio = page->bio; 433 struct mm_dma_desc *desc = &page->desc[page->headcnt]; 434 int control = le32_to_cpu(desc->sem_control_bits); 435 int last = 0; 436 struct bio_vec vec; 437 438 if (!(control & DMASCR_DMA_COMPLETE)) { 439 control = dma_status; 440 last = 1; 441 } 442 443 page->headcnt++; 444 vec = bio_iter_iovec(bio, page->iter); 445 bio_advance_iter(bio, &page->iter, vec.bv_len); 446 447 if (!page->iter.bi_size) { 448 page->bio = bio->bi_next; 449 if (page->bio) 450 page->iter = page->bio->bi_iter; 451 } 452 453 pci_unmap_page(card->dev, desc->data_dma_handle, 454 vec.bv_len, 455 (control & DMASCR_TRANSFER_READ) ? 456 PCI_DMA_TODEVICE : PCI_DMA_FROMDEVICE); 457 if (control & DMASCR_HARD_ERROR) { 458 /* error */ 459 clear_bit(BIO_UPTODATE, &bio->bi_flags); 460 dev_printk(KERN_WARNING, &card->dev->dev, 461 "I/O error on sector %d/%d\n", 462 le32_to_cpu(desc->local_addr)>>9, 463 le32_to_cpu(desc->transfer_size)); 464 dump_dmastat(card, control); 465 } else if ((bio->bi_rw & REQ_WRITE) && 466 le32_to_cpu(desc->local_addr) >> 9 == 467 card->init_size) { 468 card->init_size += le32_to_cpu(desc->transfer_size) >> 9; 469 if (card->init_size >> 1 >= card->mm_size) { 470 dev_printk(KERN_INFO, &card->dev->dev, 471 "memory now initialised\n"); 472 set_userbit(card, MEMORY_INITIALIZED, 1); 473 } 474 } 475 if (bio != page->bio) { 476 bio->bi_next = return_bio; 477 return_bio = bio; 478 } 479 480 if (last) 481 break; 482 } 483 484 if (debug & DEBUG_LED_ON_TRANSFER) 485 set_led(card, LED_REMOVE, LED_OFF); 486 487 if (card->check_batteries) { 488 card->check_batteries = 0; 489 check_batteries(card); 490 } 491 if (page->headcnt >= page->cnt) { 492 reset_page(page); 493 card->Active = -1; 494 activate(card); 495 } else { 496 /* haven't finished with this one yet */ 497 pr_debug("do some more\n"); 498 mm_start_io(card); 499 } 500 out_unlock: 501 spin_unlock_bh(&card->lock); 502 503 while (return_bio) { 504 struct bio *bio = return_bio; 505 506 return_bio = bio->bi_next; 507 bio->bi_next = NULL; 508 bio_endio(bio, 0); 509 } 510} 511 512static void mm_unplug(struct blk_plug_cb *cb, bool from_schedule) 513{ 514 struct cardinfo *card = cb->data; 515 516 spin_lock_irq(&card->lock); 517 activate(card); 518 spin_unlock_irq(&card->lock); 519 kfree(cb); 520} 521 522static int mm_check_plugged(struct cardinfo *card) 523{ 524 return !!blk_check_plugged(mm_unplug, card, sizeof(struct blk_plug_cb)); 525} 526 527static void mm_make_request(struct request_queue *q, struct bio *bio) 528{ 529 struct cardinfo *card = q->queuedata; 530 pr_debug("mm_make_request %llu %u\n", 531 (unsigned long long)bio->bi_iter.bi_sector, 532 bio->bi_iter.bi_size); 533 534 spin_lock_irq(&card->lock); 535 *card->biotail = bio; 536 bio->bi_next = NULL; 537 card->biotail = &bio->bi_next; 538 if (bio->bi_rw & REQ_SYNC || !mm_check_plugged(card)) 539 activate(card); 540 spin_unlock_irq(&card->lock); 541 542 return; 543} 544 545static irqreturn_t mm_interrupt(int irq, void *__card) 546{ 547 struct cardinfo *card = (struct cardinfo *) __card; 548 unsigned int dma_status; 549 unsigned short cfg_status; 550 551HW_TRACE(0x30); 552 553 dma_status = le32_to_cpu(readl(card->csr_remap + DMA_STATUS_CTRL)); 554 555 if (!(dma_status & (DMASCR_ERROR_MASK | DMASCR_CHAIN_COMPLETE))) { 556 /* interrupt wasn't for me ... */ 557 return IRQ_NONE; 558 } 559 560 /* clear COMPLETION interrupts */ 561 if (card->flags & UM_FLAG_NO_BYTE_STATUS) 562 writel(cpu_to_le32(DMASCR_DMA_COMPLETE|DMASCR_CHAIN_COMPLETE), 563 card->csr_remap + DMA_STATUS_CTRL); 564 else 565 writeb((DMASCR_DMA_COMPLETE|DMASCR_CHAIN_COMPLETE) >> 16, 566 card->csr_remap + DMA_STATUS_CTRL + 2); 567 568 /* log errors and clear interrupt status */ 569 if (dma_status & DMASCR_ANY_ERR) { 570 unsigned int data_log1, data_log2; 571 unsigned int addr_log1, addr_log2; 572 unsigned char stat, count, syndrome, check; 573 574 stat = readb(card->csr_remap + MEMCTRLCMD_ERRSTATUS); 575 576 data_log1 = le32_to_cpu(readl(card->csr_remap + 577 ERROR_DATA_LOG)); 578 data_log2 = le32_to_cpu(readl(card->csr_remap + 579 ERROR_DATA_LOG + 4)); 580 addr_log1 = le32_to_cpu(readl(card->csr_remap + 581 ERROR_ADDR_LOG)); 582 addr_log2 = readb(card->csr_remap + ERROR_ADDR_LOG + 4); 583 584 count = readb(card->csr_remap + ERROR_COUNT); 585 syndrome = readb(card->csr_remap + ERROR_SYNDROME); 586 check = readb(card->csr_remap + ERROR_CHECK); 587 588 dump_dmastat(card, dma_status); 589 590 if (stat & 0x01) 591 dev_printk(KERN_ERR, &card->dev->dev, 592 "Memory access error detected (err count %d)\n", 593 count); 594 if (stat & 0x02) 595 dev_printk(KERN_ERR, &card->dev->dev, 596 "Multi-bit EDC error\n"); 597 598 dev_printk(KERN_ERR, &card->dev->dev, 599 "Fault Address 0x%02x%08x, Fault Data 0x%08x%08x\n", 600 addr_log2, addr_log1, data_log2, data_log1); 601 dev_printk(KERN_ERR, &card->dev->dev, 602 "Fault Check 0x%02x, Fault Syndrome 0x%02x\n", 603 check, syndrome); 604 605 writeb(0, card->csr_remap + ERROR_COUNT); 606 } 607 608 if (dma_status & DMASCR_PARITY_ERR_REP) { 609 dev_printk(KERN_ERR, &card->dev->dev, 610 "PARITY ERROR REPORTED\n"); 611 pci_read_config_word(card->dev, PCI_STATUS, &cfg_status); 612 pci_write_config_word(card->dev, PCI_STATUS, cfg_status); 613 } 614 615 if (dma_status & DMASCR_PARITY_ERR_DET) { 616 dev_printk(KERN_ERR, &card->dev->dev, 617 "PARITY ERROR DETECTED\n"); 618 pci_read_config_word(card->dev, PCI_STATUS, &cfg_status); 619 pci_write_config_word(card->dev, PCI_STATUS, cfg_status); 620 } 621 622 if (dma_status & DMASCR_SYSTEM_ERR_SIG) { 623 dev_printk(KERN_ERR, &card->dev->dev, "SYSTEM ERROR\n"); 624 pci_read_config_word(card->dev, PCI_STATUS, &cfg_status); 625 pci_write_config_word(card->dev, PCI_STATUS, cfg_status); 626 } 627 628 if (dma_status & DMASCR_TARGET_ABT) { 629 dev_printk(KERN_ERR, &card->dev->dev, "TARGET ABORT\n"); 630 pci_read_config_word(card->dev, PCI_STATUS, &cfg_status); 631 pci_write_config_word(card->dev, PCI_STATUS, cfg_status); 632 } 633 634 if (dma_status & DMASCR_MASTER_ABT) { 635 dev_printk(KERN_ERR, &card->dev->dev, "MASTER ABORT\n"); 636 pci_read_config_word(card->dev, PCI_STATUS, &cfg_status); 637 pci_write_config_word(card->dev, PCI_STATUS, cfg_status); 638 } 639 640 /* and process the DMA descriptors */ 641 card->dma_status = dma_status; 642 tasklet_schedule(&card->tasklet); 643 644HW_TRACE(0x36); 645 646 return IRQ_HANDLED; 647} 648 649/* 650 * If both batteries are good, no LED 651 * If either battery has been warned, solid LED 652 * If both batteries are bad, flash the LED quickly 653 * If either battery is bad, flash the LED semi quickly 654 */ 655static void set_fault_to_battery_status(struct cardinfo *card) 656{ 657 if (card->battery[0].good && card->battery[1].good) 658 set_led(card, LED_FAULT, LED_OFF); 659 else if (card->battery[0].warned || card->battery[1].warned) 660 set_led(card, LED_FAULT, LED_ON); 661 else if (!card->battery[0].good && !card->battery[1].good) 662 set_led(card, LED_FAULT, LED_FLASH_7_0); 663 else 664 set_led(card, LED_FAULT, LED_FLASH_3_5); 665} 666 667static void init_battery_timer(void); 668 669static int check_battery(struct cardinfo *card, int battery, int status) 670{ 671 if (status != card->battery[battery].good) { 672 card->battery[battery].good = !card->battery[battery].good; 673 card->battery[battery].last_change = jiffies; 674 675 if (card->battery[battery].good) { 676 dev_printk(KERN_ERR, &card->dev->dev, 677 "Battery %d now good\n", battery + 1); 678 card->battery[battery].warned = 0; 679 } else 680 dev_printk(KERN_ERR, &card->dev->dev, 681 "Battery %d now FAILED\n", battery + 1); 682 683 return 1; 684 } else if (!card->battery[battery].good && 685 !card->battery[battery].warned && 686 time_after_eq(jiffies, card->battery[battery].last_change + 687 (HZ * 60 * 60 * 5))) { 688 dev_printk(KERN_ERR, &card->dev->dev, 689 "Battery %d still FAILED after 5 hours\n", battery + 1); 690 card->battery[battery].warned = 1; 691 692 return 1; 693 } 694 695 return 0; 696} 697 698static void check_batteries(struct cardinfo *card) 699{ 700 /* NOTE: this must *never* be called while the card 701 * is doing (bus-to-card) DMA, or you will need the 702 * reset switch 703 */ 704 unsigned char status; 705 int ret1, ret2; 706 707 status = readb(card->csr_remap + MEMCTRLSTATUS_BATTERY); 708 if (debug & DEBUG_BATTERY_POLLING) 709 dev_printk(KERN_DEBUG, &card->dev->dev, 710 "checking battery status, 1 = %s, 2 = %s\n", 711 (status & BATTERY_1_FAILURE) ? "FAILURE" : "OK", 712 (status & BATTERY_2_FAILURE) ? "FAILURE" : "OK"); 713 714 ret1 = check_battery(card, 0, !(status & BATTERY_1_FAILURE)); 715 ret2 = check_battery(card, 1, !(status & BATTERY_2_FAILURE)); 716 717 if (ret1 || ret2) 718 set_fault_to_battery_status(card); 719} 720 721static void check_all_batteries(unsigned long ptr) 722{ 723 int i; 724 725 for (i = 0; i < num_cards; i++) 726 if (!(cards[i].flags & UM_FLAG_NO_BATT)) { 727 struct cardinfo *card = &cards[i]; 728 spin_lock_bh(&card->lock); 729 if (card->Active >= 0) 730 card->check_batteries = 1; 731 else 732 check_batteries(card); 733 spin_unlock_bh(&card->lock); 734 } 735 736 init_battery_timer(); 737} 738 739static void init_battery_timer(void) 740{ 741 init_timer(&battery_timer); 742 battery_timer.function = check_all_batteries; 743 battery_timer.expires = jiffies + (HZ * 60); 744 add_timer(&battery_timer); 745} 746 747static void del_battery_timer(void) 748{ 749 del_timer(&battery_timer); 750} 751 752/* 753 * Note no locks taken out here. In a worst case scenario, we could drop 754 * a chunk of system memory. But that should never happen, since validation 755 * happens at open or mount time, when locks are held. 756 * 757 * That's crap, since doing that while some partitions are opened 758 * or mounted will give you really nasty results. 759 */ 760static int mm_revalidate(struct gendisk *disk) 761{ 762 struct cardinfo *card = disk->private_data; 763 set_capacity(disk, card->mm_size << 1); 764 return 0; 765} 766 767static int mm_getgeo(struct block_device *bdev, struct hd_geometry *geo) 768{ 769 struct cardinfo *card = bdev->bd_disk->private_data; 770 int size = card->mm_size * (1024 / MM_HARDSECT); 771 772 /* 773 * get geometry: we have to fake one... trim the size to a 774 * multiple of 2048 (1M): tell we have 32 sectors, 64 heads, 775 * whatever cylinders. 776 */ 777 geo->heads = 64; 778 geo->sectors = 32; 779 geo->cylinders = size / (geo->heads * geo->sectors); 780 return 0; 781} 782 783static const struct block_device_operations mm_fops = { 784 .owner = THIS_MODULE, 785 .getgeo = mm_getgeo, 786 .revalidate_disk = mm_revalidate, 787}; 788 789static int mm_pci_probe(struct pci_dev *dev, const struct pci_device_id *id) 790{ 791 int ret = -ENODEV; 792 struct cardinfo *card = &cards[num_cards]; 793 unsigned char mem_present; 794 unsigned char batt_status; 795 unsigned int saved_bar, data; 796 unsigned long csr_base; 797 unsigned long csr_len; 798 int magic_number; 799 static int printed_version; 800 801 if (!printed_version++) 802 printk(KERN_INFO DRIVER_VERSION " : " DRIVER_DESC "\n"); 803 804 ret = pci_enable_device(dev); 805 if (ret) 806 return ret; 807 808 pci_write_config_byte(dev, PCI_LATENCY_TIMER, 0xF8); 809 pci_set_master(dev); 810 811 card->dev = dev; 812 813 csr_base = pci_resource_start(dev, 0); 814 csr_len = pci_resource_len(dev, 0); 815 if (!csr_base || !csr_len) 816 return -ENODEV; 817 818 dev_printk(KERN_INFO, &dev->dev, 819 "Micro Memory(tm) controller found (PCI Mem Module (Battery Backup))\n"); 820 821 if (pci_set_dma_mask(dev, DMA_BIT_MASK(64)) && 822 pci_set_dma_mask(dev, DMA_BIT_MASK(32))) { 823 dev_printk(KERN_WARNING, &dev->dev, "NO suitable DMA found\n"); 824 return -ENOMEM; 825 } 826 827 ret = pci_request_regions(dev, DRIVER_NAME); 828 if (ret) { 829 dev_printk(KERN_ERR, &card->dev->dev, 830 "Unable to request memory region\n"); 831 goto failed_req_csr; 832 } 833 834 card->csr_remap = ioremap_nocache(csr_base, csr_len); 835 if (!card->csr_remap) { 836 dev_printk(KERN_ERR, &card->dev->dev, 837 "Unable to remap memory region\n"); 838 ret = -ENOMEM; 839 840 goto failed_remap_csr; 841 } 842 843 dev_printk(KERN_INFO, &card->dev->dev, 844 "CSR 0x%08lx -> 0x%p (0x%lx)\n", 845 csr_base, card->csr_remap, csr_len); 846 847 switch (card->dev->device) { 848 case 0x5415: 849 card->flags |= UM_FLAG_NO_BYTE_STATUS | UM_FLAG_NO_BATTREG; 850 magic_number = 0x59; 851 break; 852 853 case 0x5425: 854 card->flags |= UM_FLAG_NO_BYTE_STATUS; 855 magic_number = 0x5C; 856 break; 857 858 case 0x6155: 859 card->flags |= UM_FLAG_NO_BYTE_STATUS | 860 UM_FLAG_NO_BATTREG | UM_FLAG_NO_BATT; 861 magic_number = 0x99; 862 break; 863 864 default: 865 magic_number = 0x100; 866 break; 867 } 868 869 if (readb(card->csr_remap + MEMCTRLSTATUS_MAGIC) != magic_number) { 870 dev_printk(KERN_ERR, &card->dev->dev, "Magic number invalid\n"); 871 ret = -ENOMEM; 872 goto failed_magic; 873 } 874 875 card->mm_pages[0].desc = pci_alloc_consistent(card->dev, 876 PAGE_SIZE * 2, 877 &card->mm_pages[0].page_dma); 878 card->mm_pages[1].desc = pci_alloc_consistent(card->dev, 879 PAGE_SIZE * 2, 880 &card->mm_pages[1].page_dma); 881 if (card->mm_pages[0].desc == NULL || 882 card->mm_pages[1].desc == NULL) { 883 dev_printk(KERN_ERR, &card->dev->dev, "alloc failed\n"); 884 goto failed_alloc; 885 } 886 reset_page(&card->mm_pages[0]); 887 reset_page(&card->mm_pages[1]); 888 card->Ready = 0; /* page 0 is ready */ 889 card->Active = -1; /* no page is active */ 890 card->bio = NULL; 891 card->biotail = &card->bio; 892 893 card->queue = blk_alloc_queue(GFP_KERNEL); 894 if (!card->queue) 895 goto failed_alloc; 896 897 blk_queue_make_request(card->queue, mm_make_request); 898 card->queue->queue_lock = &card->lock; 899 card->queue->queuedata = card; 900 901 tasklet_init(&card->tasklet, process_page, (unsigned long)card); 902 903 card->check_batteries = 0; 904 905 mem_present = readb(card->csr_remap + MEMCTRLSTATUS_MEMORY); 906 switch (mem_present) { 907 case MEM_128_MB: 908 card->mm_size = 1024 * 128; 909 break; 910 case MEM_256_MB: 911 card->mm_size = 1024 * 256; 912 break; 913 case MEM_512_MB: 914 card->mm_size = 1024 * 512; 915 break; 916 case MEM_1_GB: 917 card->mm_size = 1024 * 1024; 918 break; 919 case MEM_2_GB: 920 card->mm_size = 1024 * 2048; 921 break; 922 default: 923 card->mm_size = 0; 924 break; 925 } 926 927 /* Clear the LED's we control */ 928 set_led(card, LED_REMOVE, LED_OFF); 929 set_led(card, LED_FAULT, LED_OFF); 930 931 batt_status = readb(card->csr_remap + MEMCTRLSTATUS_BATTERY); 932 933 card->battery[0].good = !(batt_status & BATTERY_1_FAILURE); 934 card->battery[1].good = !(batt_status & BATTERY_2_FAILURE); 935 card->battery[0].last_change = card->battery[1].last_change = jiffies; 936 937 if (card->flags & UM_FLAG_NO_BATT) 938 dev_printk(KERN_INFO, &card->dev->dev, 939 "Size %d KB\n", card->mm_size); 940 else { 941 dev_printk(KERN_INFO, &card->dev->dev, 942 "Size %d KB, Battery 1 %s (%s), Battery 2 %s (%s)\n", 943 card->mm_size, 944 batt_status & BATTERY_1_DISABLED ? "Disabled" : "Enabled", 945 card->battery[0].good ? "OK" : "FAILURE", 946 batt_status & BATTERY_2_DISABLED ? "Disabled" : "Enabled", 947 card->battery[1].good ? "OK" : "FAILURE"); 948 949 set_fault_to_battery_status(card); 950 } 951 952 pci_read_config_dword(dev, PCI_BASE_ADDRESS_1, &saved_bar); 953 data = 0xffffffff; 954 pci_write_config_dword(dev, PCI_BASE_ADDRESS_1, data); 955 pci_read_config_dword(dev, PCI_BASE_ADDRESS_1, &data); 956 pci_write_config_dword(dev, PCI_BASE_ADDRESS_1, saved_bar); 957 data &= 0xfffffff0; 958 data = ~data; 959 data += 1; 960 961 if (request_irq(dev->irq, mm_interrupt, IRQF_SHARED, DRIVER_NAME, 962 card)) { 963 dev_printk(KERN_ERR, &card->dev->dev, 964 "Unable to allocate IRQ\n"); 965 ret = -ENODEV; 966 goto failed_req_irq; 967 } 968 969 dev_printk(KERN_INFO, &card->dev->dev, 970 "Window size %d bytes, IRQ %d\n", data, dev->irq); 971 972 spin_lock_init(&card->lock); 973 974 pci_set_drvdata(dev, card); 975 976 if (pci_write_cmd != 0x0F) /* If not Memory Write & Invalidate */ 977 pci_write_cmd = 0x07; /* then Memory Write command */ 978 979 if (pci_write_cmd & 0x08) { /* use Memory Write and Invalidate */ 980 unsigned short cfg_command; 981 pci_read_config_word(dev, PCI_COMMAND, &cfg_command); 982 cfg_command |= 0x10; /* Memory Write & Invalidate Enable */ 983 pci_write_config_word(dev, PCI_COMMAND, cfg_command); 984 } 985 pci_cmds = (pci_read_cmd << 28) | (pci_write_cmd << 24); 986 987 num_cards++; 988 989 if (!get_userbit(card, MEMORY_INITIALIZED)) { 990 dev_printk(KERN_INFO, &card->dev->dev, 991 "memory NOT initialized. Consider over-writing whole device.\n"); 992 card->init_size = 0; 993 } else { 994 dev_printk(KERN_INFO, &card->dev->dev, 995 "memory already initialized\n"); 996 card->init_size = card->mm_size; 997 } 998 999 /* Enable ECC */ 1000 writeb(EDC_STORE_CORRECT, card->csr_remap + MEMCTRLCMD_ERRCTRL); 1001 1002 return 0; 1003 1004 failed_req_irq: 1005 failed_alloc: 1006 if (card->mm_pages[0].desc) 1007 pci_free_consistent(card->dev, PAGE_SIZE*2, 1008 card->mm_pages[0].desc, 1009 card->mm_pages[0].page_dma); 1010 if (card->mm_pages[1].desc) 1011 pci_free_consistent(card->dev, PAGE_SIZE*2, 1012 card->mm_pages[1].desc, 1013 card->mm_pages[1].page_dma); 1014 failed_magic: 1015 iounmap(card->csr_remap); 1016 failed_remap_csr: 1017 pci_release_regions(dev); 1018 failed_req_csr: 1019 1020 return ret; 1021} 1022 1023static void mm_pci_remove(struct pci_dev *dev) 1024{ 1025 struct cardinfo *card = pci_get_drvdata(dev); 1026 1027 tasklet_kill(&card->tasklet); 1028 free_irq(dev->irq, card); 1029 iounmap(card->csr_remap); 1030 1031 if (card->mm_pages[0].desc) 1032 pci_free_consistent(card->dev, PAGE_SIZE*2, 1033 card->mm_pages[0].desc, 1034 card->mm_pages[0].page_dma); 1035 if (card->mm_pages[1].desc) 1036 pci_free_consistent(card->dev, PAGE_SIZE*2, 1037 card->mm_pages[1].desc, 1038 card->mm_pages[1].page_dma); 1039 blk_cleanup_queue(card->queue); 1040 1041 pci_release_regions(dev); 1042 pci_disable_device(dev); 1043} 1044 1045static const struct pci_device_id mm_pci_ids[] = { 1046 {PCI_DEVICE(PCI_VENDOR_ID_MICRO_MEMORY, PCI_DEVICE_ID_MICRO_MEMORY_5415CN)}, 1047 {PCI_DEVICE(PCI_VENDOR_ID_MICRO_MEMORY, PCI_DEVICE_ID_MICRO_MEMORY_5425CN)}, 1048 {PCI_DEVICE(PCI_VENDOR_ID_MICRO_MEMORY, PCI_DEVICE_ID_MICRO_MEMORY_6155)}, 1049 { 1050 .vendor = 0x8086, 1051 .device = 0xB555, 1052 .subvendor = 0x1332, 1053 .subdevice = 0x5460, 1054 .class = 0x050000, 1055 .class_mask = 0, 1056 }, { /* end: all zeroes */ } 1057}; 1058 1059MODULE_DEVICE_TABLE(pci, mm_pci_ids); 1060 1061static struct pci_driver mm_pci_driver = { 1062 .name = DRIVER_NAME, 1063 .id_table = mm_pci_ids, 1064 .probe = mm_pci_probe, 1065 .remove = mm_pci_remove, 1066}; 1067 1068static int __init mm_init(void) 1069{ 1070 int retval, i; 1071 int err; 1072 1073 retval = pci_register_driver(&mm_pci_driver); 1074 if (retval) 1075 return -ENOMEM; 1076 1077 err = major_nr = register_blkdev(0, DRIVER_NAME); 1078 if (err < 0) { 1079 pci_unregister_driver(&mm_pci_driver); 1080 return -EIO; 1081 } 1082 1083 for (i = 0; i < num_cards; i++) { 1084 mm_gendisk[i] = alloc_disk(1 << MM_SHIFT); 1085 if (!mm_gendisk[i]) 1086 goto out; 1087 } 1088 1089 for (i = 0; i < num_cards; i++) { 1090 struct gendisk *disk = mm_gendisk[i]; 1091 sprintf(disk->disk_name, "umem%c", 'a'+i); 1092 spin_lock_init(&cards[i].lock); 1093 disk->major = major_nr; 1094 disk->first_minor = i << MM_SHIFT; 1095 disk->fops = &mm_fops; 1096 disk->private_data = &cards[i]; 1097 disk->queue = cards[i].queue; 1098 set_capacity(disk, cards[i].mm_size << 1); 1099 add_disk(disk); 1100 } 1101 1102 init_battery_timer(); 1103 printk(KERN_INFO "MM: desc_per_page = %ld\n", DESC_PER_PAGE); 1104/* printk("mm_init: Done. 10-19-01 9:00\n"); */ 1105 return 0; 1106 1107out: 1108 pci_unregister_driver(&mm_pci_driver); 1109 unregister_blkdev(major_nr, DRIVER_NAME); 1110 while (i--) 1111 put_disk(mm_gendisk[i]); 1112 return -ENOMEM; 1113} 1114 1115static void __exit mm_cleanup(void) 1116{ 1117 int i; 1118 1119 del_battery_timer(); 1120 1121 for (i = 0; i < num_cards ; i++) { 1122 del_gendisk(mm_gendisk[i]); 1123 put_disk(mm_gendisk[i]); 1124 } 1125 1126 pci_unregister_driver(&mm_pci_driver); 1127 1128 unregister_blkdev(major_nr, DRIVER_NAME); 1129} 1130 1131module_init(mm_init); 1132module_exit(mm_cleanup); 1133 1134MODULE_AUTHOR(DRIVER_AUTHOR); 1135MODULE_DESCRIPTION(DRIVER_DESC); 1136MODULE_LICENSE("GPL"); 1137