1/* 2 * New ATA layer SC1200 driver Alan Cox <alan@lxorguk.ukuu.org.uk> 3 * 4 * TODO: Mode selection filtering 5 * TODO: Needs custom DMA cleanup code 6 * 7 * Based very heavily on 8 * 9 * linux/drivers/ide/pci/sc1200.c Version 0.91 28-Jan-2003 10 * 11 * Copyright (C) 2000-2002 Mark Lord <mlord@pobox.com> 12 * May be copied or modified under the terms of the GNU General Public License 13 * 14 * Development of this chipset driver was funded 15 * by the nice folks at National Semiconductor. 16 * 17 * This program is free software; you can redistribute it and/or modify 18 * it under the terms of the GNU General Public License version 2 as 19 * published by the Free Software Foundation. 20 * 21 * This program is distributed in the hope that it will be useful, 22 * but WITHOUT ANY WARRANTY; without even the implied warranty of 23 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 24 * GNU General Public License for more details. 25 * 26 * You should have received a copy of the GNU General Public License 27 * along with this program; if not, write to the Free Software 28 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 29 * 30 */ 31 32#include <linux/kernel.h> 33#include <linux/module.h> 34#include <linux/pci.h> 35#include <linux/blkdev.h> 36#include <linux/delay.h> 37#include <scsi/scsi_host.h> 38#include <linux/libata.h> 39 40#define DRV_NAME "pata_sc1200" 41#define DRV_VERSION "0.2.6" 42 43#define SC1200_REV_A 0x00 44#define SC1200_REV_B1 0x01 45#define SC1200_REV_B3 0x02 46#define SC1200_REV_C1 0x03 47#define SC1200_REV_D1 0x04 48 49/** 50 * sc1200_clock - PCI clock 51 * 52 * Return the PCI bus clocking for the SC1200 chipset configuration 53 * in use. We return 0 for 33MHz 1 for 48MHz and 2 for 66Mhz 54 */ 55 56static int sc1200_clock(void) 57{ 58 /* Magic registers that give us the chipset data */ 59 u8 chip_id = inb(0x903C); 60 u8 silicon_rev = inb(0x903D); 61 u16 pci_clock; 62 63 if (chip_id == 0x04 && silicon_rev < SC1200_REV_B1) 64 return 0; /* 33 MHz mode */ 65 66 /* Clock generator configuration 0x901E its 8/9 are the PCI clocking 67 0/3 is 33Mhz 1 is 48 2 is 66 */ 68 69 pci_clock = inw(0x901E); 70 pci_clock >>= 8; 71 pci_clock &= 0x03; 72 if (pci_clock == 3) 73 pci_clock = 0; 74 return pci_clock; 75} 76 77/** 78 * sc1200_set_piomode - PIO setup 79 * @ap: ATA interface 80 * @adev: device on the interface 81 * 82 * Set our PIO requirements. This is fairly simple on the SC1200 83 */ 84 85static void sc1200_set_piomode(struct ata_port *ap, struct ata_device *adev) 86{ 87 static const u32 pio_timings[4][5] = { 88 /* format0, 33Mhz */ 89 { 0x00009172, 0x00012171, 0x00020080, 0x00032010, 0x00040010 }, 90 /* format1, 33Mhz */ 91 { 0xd1329172, 0x71212171, 0x30200080, 0x20102010, 0x00100010 }, 92 /* format1, 48Mhz */ 93 { 0xfaa3f4f3, 0xc23232b2, 0x513101c1, 0x31213121, 0x10211021 }, 94 /* format1, 66Mhz */ 95 { 0xfff4fff4, 0xf35353d3, 0x814102f1, 0x42314231, 0x11311131 } 96 }; 97 98 struct pci_dev *pdev = to_pci_dev(ap->host->dev); 99 u32 format; 100 unsigned int reg = 0x40 + 0x10 * ap->port_no; 101 int mode = adev->pio_mode - XFER_PIO_0; 102 103 pci_read_config_dword(pdev, reg + 4, &format); 104 format >>= 31; 105 format += sc1200_clock(); 106 pci_write_config_dword(pdev, reg + 8 * adev->devno, 107 pio_timings[format][mode]); 108} 109 110/** 111 * sc1200_set_dmamode - DMA timing setup 112 * @ap: ATA interface 113 * @adev: Device being configured 114 * 115 * We cannot mix MWDMA and UDMA without reloading timings each switch 116 * master to slave. 117 */ 118 119static void sc1200_set_dmamode(struct ata_port *ap, struct ata_device *adev) 120{ 121 static const u32 udma_timing[3][3] = { 122 { 0x00921250, 0x00911140, 0x00911030 }, 123 { 0x00932470, 0x00922260, 0x00922140 }, 124 { 0x009436A1, 0x00933481, 0x00923261 } 125 }; 126 127 static const u32 mwdma_timing[3][3] = { 128 { 0x00077771, 0x00012121, 0x00002020 }, 129 { 0x000BBBB2, 0x00024241, 0x00013131 }, 130 { 0x000FFFF3, 0x00035352, 0x00015151 } 131 }; 132 133 int clock = sc1200_clock(); 134 struct pci_dev *pdev = to_pci_dev(ap->host->dev); 135 unsigned int reg = 0x40 + 0x10 * ap->port_no; 136 int mode = adev->dma_mode; 137 u32 format; 138 139 if (mode >= XFER_UDMA_0) 140 format = udma_timing[clock][mode - XFER_UDMA_0]; 141 else 142 format = mwdma_timing[clock][mode - XFER_MW_DMA_0]; 143 144 if (adev->devno == 0) { 145 u32 timings; 146 147 pci_read_config_dword(pdev, reg + 4, &timings); 148 timings &= 0x80000000UL; 149 timings |= format; 150 pci_write_config_dword(pdev, reg + 4, timings); 151 } else 152 pci_write_config_dword(pdev, reg + 12, format); 153} 154 155/** 156 * sc1200_qc_issue - command issue 157 * @qc: command pending 158 * 159 * Called when the libata layer is about to issue a command. We wrap 160 * this interface so that we can load the correct ATA timings if 161 * necessary. Specifically we have a problem that there is only 162 * one MWDMA/UDMA bit. 163 */ 164 165static unsigned int sc1200_qc_issue(struct ata_queued_cmd *qc) 166{ 167 struct ata_port *ap = qc->ap; 168 struct ata_device *adev = qc->dev; 169 struct ata_device *prev = ap->private_data; 170 171 /* See if the DMA settings could be wrong */ 172 if (ata_dma_enabled(adev) && adev != prev && prev != NULL) { 173 /* Maybe, but do the channels match MWDMA/UDMA ? */ 174 if ((ata_using_udma(adev) && !ata_using_udma(prev)) || 175 (ata_using_udma(prev) && !ata_using_udma(adev))) 176 /* Switch the mode bits */ 177 sc1200_set_dmamode(ap, adev); 178 } 179 180 return ata_bmdma_qc_issue(qc); 181} 182 183/** 184 * sc1200_qc_defer - implement serialization 185 * @qc: command 186 * 187 * Serialize command issue on this controller. 188 */ 189 190static int sc1200_qc_defer(struct ata_queued_cmd *qc) 191{ 192 struct ata_host *host = qc->ap->host; 193 struct ata_port *alt = host->ports[1 ^ qc->ap->port_no]; 194 int rc; 195 196 /* First apply the usual rules */ 197 rc = ata_std_qc_defer(qc); 198 if (rc != 0) 199 return rc; 200 201 /* Now apply serialization rules. Only allow a command if the 202 other channel state machine is idle */ 203 if (alt && alt->qc_active) 204 return ATA_DEFER_PORT; 205 return 0; 206} 207 208static struct scsi_host_template sc1200_sht = { 209 ATA_BMDMA_SHT(DRV_NAME), 210 .sg_tablesize = LIBATA_DUMB_MAX_PRD, 211}; 212 213static struct ata_port_operations sc1200_port_ops = { 214 .inherits = &ata_bmdma_port_ops, 215 .qc_prep = ata_bmdma_dumb_qc_prep, 216 .qc_issue = sc1200_qc_issue, 217 .qc_defer = sc1200_qc_defer, 218 .cable_detect = ata_cable_40wire, 219 .set_piomode = sc1200_set_piomode, 220 .set_dmamode = sc1200_set_dmamode, 221}; 222 223/** 224 * sc1200_init_one - Initialise an SC1200 225 * @dev: PCI device 226 * @id: Entry in match table 227 * 228 * Just throw the needed data at the libata helper and it does all 229 * our work. 230 */ 231 232static int sc1200_init_one(struct pci_dev *dev, const struct pci_device_id *id) 233{ 234 static const struct ata_port_info info = { 235 .flags = ATA_FLAG_SLAVE_POSS, 236 .pio_mask = ATA_PIO4, 237 .mwdma_mask = ATA_MWDMA2, 238 .udma_mask = ATA_UDMA2, 239 .port_ops = &sc1200_port_ops 240 }; 241 const struct ata_port_info *ppi[] = { &info, NULL }; 242 243 return ata_pci_bmdma_init_one(dev, ppi, &sc1200_sht, NULL, 0); 244} 245 246static const struct pci_device_id sc1200[] = { 247 { PCI_VDEVICE(NS, PCI_DEVICE_ID_NS_SCx200_IDE), }, 248 249 { }, 250}; 251 252static struct pci_driver sc1200_pci_driver = { 253 .name = DRV_NAME, 254 .id_table = sc1200, 255 .probe = sc1200_init_one, 256 .remove = ata_pci_remove_one, 257#ifdef CONFIG_PM_SLEEP 258 .suspend = ata_pci_device_suspend, 259 .resume = ata_pci_device_resume, 260#endif 261}; 262 263module_pci_driver(sc1200_pci_driver); 264 265MODULE_AUTHOR("Alan Cox, Mark Lord"); 266MODULE_DESCRIPTION("low-level driver for the NS/AMD SC1200"); 267MODULE_LICENSE("GPL"); 268MODULE_DEVICE_TABLE(pci, sc1200); 269MODULE_VERSION(DRV_VERSION); 270