1#ifndef __KVM_IO_APIC_H
2#define __KVM_IO_APIC_H
3
4#include <linux/kvm_host.h>
5
6#include <kvm/iodev.h>
7
8struct kvm;
9struct kvm_vcpu;
10
11#define IOAPIC_NUM_PINS  KVM_IOAPIC_NUM_PINS
12#define IOAPIC_VERSION_ID 0x11	/* IOAPIC version */
13#define IOAPIC_EDGE_TRIG  0
14#define IOAPIC_LEVEL_TRIG 1
15
16#define IOAPIC_DEFAULT_BASE_ADDRESS  0xfec00000
17#define IOAPIC_MEM_LENGTH            0x100
18
19/* Direct registers. */
20#define IOAPIC_REG_SELECT  0x00
21#define IOAPIC_REG_WINDOW  0x10
22
23/* Indirect registers. */
24#define IOAPIC_REG_APIC_ID 0x00	/* x86 IOAPIC only */
25#define IOAPIC_REG_VERSION 0x01
26#define IOAPIC_REG_ARB_ID  0x02	/* x86 IOAPIC only */
27
28/*ioapic delivery mode*/
29#define	IOAPIC_FIXED			0x0
30#define	IOAPIC_LOWEST_PRIORITY		0x1
31#define	IOAPIC_PMI			0x2
32#define	IOAPIC_NMI			0x4
33#define	IOAPIC_INIT			0x5
34#define	IOAPIC_EXTINT			0x7
35
36#ifdef CONFIG_X86
37#define RTC_GSI 8
38#else
39#define RTC_GSI -1U
40#endif
41
42struct rtc_status {
43	int pending_eoi;
44	DECLARE_BITMAP(dest_map, KVM_MAX_VCPUS);
45};
46
47union kvm_ioapic_redirect_entry {
48	u64 bits;
49	struct {
50		u8 vector;
51		u8 delivery_mode:3;
52		u8 dest_mode:1;
53		u8 delivery_status:1;
54		u8 polarity:1;
55		u8 remote_irr:1;
56		u8 trig_mode:1;
57		u8 mask:1;
58		u8 reserve:7;
59		u8 reserved[4];
60		u8 dest_id;
61	} fields;
62};
63
64struct kvm_ioapic {
65	u64 base_address;
66	u32 ioregsel;
67	u32 id;
68	u32 irr;
69	u32 pad;
70	union kvm_ioapic_redirect_entry redirtbl[IOAPIC_NUM_PINS];
71	unsigned long irq_states[IOAPIC_NUM_PINS];
72	struct kvm_io_device dev;
73	struct kvm *kvm;
74	void (*ack_notifier)(void *opaque, int irq);
75	spinlock_t lock;
76	DECLARE_BITMAP(handled_vectors, 256);
77	struct rtc_status rtc_status;
78	struct delayed_work eoi_inject;
79	u32 irq_eoi[IOAPIC_NUM_PINS];
80	u32 irr_delivered;
81};
82
83#ifdef DEBUG
84#define ASSERT(x)  							\
85do {									\
86	if (!(x)) {							\
87		printk(KERN_EMERG "assertion failed %s: %d: %s\n",	\
88		       __FILE__, __LINE__, #x);				\
89		BUG();							\
90	}								\
91} while (0)
92#else
93#define ASSERT(x) do { } while (0)
94#endif
95
96static inline struct kvm_ioapic *ioapic_irqchip(struct kvm *kvm)
97{
98	return kvm->arch.vioapic;
99}
100
101static inline bool kvm_ioapic_handles_vector(struct kvm *kvm, int vector)
102{
103	struct kvm_ioapic *ioapic = kvm->arch.vioapic;
104	smp_rmb();
105	return test_bit(vector, ioapic->handled_vectors);
106}
107
108void kvm_rtc_eoi_tracking_restore_one(struct kvm_vcpu *vcpu);
109bool kvm_apic_match_dest(struct kvm_vcpu *vcpu, struct kvm_lapic *source,
110		int short_hand, unsigned int dest, int dest_mode);
111int kvm_apic_compare_prio(struct kvm_vcpu *vcpu1, struct kvm_vcpu *vcpu2);
112void kvm_ioapic_update_eoi(struct kvm_vcpu *vcpu, int vector,
113			int trigger_mode);
114int kvm_ioapic_init(struct kvm *kvm);
115void kvm_ioapic_destroy(struct kvm *kvm);
116int kvm_ioapic_set_irq(struct kvm_ioapic *ioapic, int irq, int irq_source_id,
117		       int level, bool line_status);
118void kvm_ioapic_clear_all(struct kvm_ioapic *ioapic, int irq_source_id);
119int kvm_irq_delivery_to_apic(struct kvm *kvm, struct kvm_lapic *src,
120		struct kvm_lapic_irq *irq, unsigned long *dest_map);
121int kvm_get_ioapic(struct kvm *kvm, struct kvm_ioapic_state *state);
122int kvm_set_ioapic(struct kvm *kvm, struct kvm_ioapic_state *state);
123void kvm_ioapic_scan_entry(struct kvm_vcpu *vcpu, u64 *eoi_exit_bitmap,
124			u32 *tmr);
125
126#endif
127