1/*
2 * GE SBC610 board support
3 *
4 * Author: Martyn Welch <martyn.welch@ge.com>
5 *
6 * Copyright 2008 GE Intelligent Platforms Embedded Systems, Inc.
7 *
8 * This program is free software; you can redistribute  it and/or modify it
9 * under  the terms of  the GNU General  Public License as published by the
10 * Free Software Foundation;  either version 2 of the  License, or (at your
11 * option) any later version.
12 *
13 * Based on: mpc86xx_hpcn.c (MPC86xx HPCN board specific routines)
14 * Copyright 2006 Freescale Semiconductor Inc.
15 *
16 * NEC fixup adapted from arch/mips/pci/fixup-lm2e.c
17 */
18
19#include <linux/stddef.h>
20#include <linux/kernel.h>
21#include <linux/pci.h>
22#include <linux/kdev_t.h>
23#include <linux/delay.h>
24#include <linux/seq_file.h>
25#include <linux/of_platform.h>
26
27#include <asm/time.h>
28#include <asm/machdep.h>
29#include <asm/pci-bridge.h>
30#include <asm/prom.h>
31#include <mm/mmu_decl.h>
32#include <asm/udbg.h>
33
34#include <asm/mpic.h>
35#include <asm/nvram.h>
36
37#include <sysdev/fsl_pci.h>
38#include <sysdev/fsl_soc.h>
39#include <sysdev/ge/ge_pic.h>
40
41#include "mpc86xx.h"
42
43#undef DEBUG
44
45#ifdef DEBUG
46#define DBG (fmt...) do { printk(KERN_ERR "SBC610: " fmt); } while (0)
47#else
48#define DBG (fmt...) do { } while (0)
49#endif
50
51void __iomem *sbc610_regs;
52
53static void __init gef_sbc610_init_irq(void)
54{
55	struct device_node *cascade_node = NULL;
56
57	mpc86xx_init_irq();
58
59	/*
60	 * There is a simple interrupt handler in the main FPGA, this needs
61	 * to be cascaded into the MPIC
62	 */
63	cascade_node = of_find_compatible_node(NULL, NULL, "gef,fpga-pic");
64	if (!cascade_node) {
65		printk(KERN_WARNING "SBC610: No FPGA PIC\n");
66		return;
67	}
68
69	gef_pic_init(cascade_node);
70	of_node_put(cascade_node);
71}
72
73static void __init gef_sbc610_setup_arch(void)
74{
75	struct device_node *regs;
76
77	printk(KERN_INFO "GE Intelligent Platforms SBC610 6U VPX SBC\n");
78
79#ifdef CONFIG_SMP
80	mpc86xx_smp_init();
81#endif
82
83	fsl_pci_assign_primary();
84
85	/* Remap basic board registers */
86	regs = of_find_compatible_node(NULL, NULL, "gef,fpga-regs");
87	if (regs) {
88		sbc610_regs = of_iomap(regs, 0);
89		if (sbc610_regs == NULL)
90			printk(KERN_WARNING "Unable to map board registers\n");
91		of_node_put(regs);
92	}
93
94#if defined(CONFIG_MMIO_NVRAM)
95	mmio_nvram_init();
96#endif
97}
98
99/* Return the PCB revision */
100static unsigned int gef_sbc610_get_pcb_rev(void)
101{
102	unsigned int reg;
103
104	reg = ioread32(sbc610_regs);
105	return (reg >> 8) & 0xff;
106}
107
108/* Return the board (software) revision */
109static unsigned int gef_sbc610_get_board_rev(void)
110{
111	unsigned int reg;
112
113	reg = ioread32(sbc610_regs);
114	return (reg >> 16) & 0xff;
115}
116
117/* Return the FPGA revision */
118static unsigned int gef_sbc610_get_fpga_rev(void)
119{
120	unsigned int reg;
121
122	reg = ioread32(sbc610_regs);
123	return (reg >> 24) & 0xf;
124}
125
126static void gef_sbc610_show_cpuinfo(struct seq_file *m)
127{
128	uint svid = mfspr(SPRN_SVR);
129
130	seq_printf(m, "Vendor\t\t: GE Intelligent Platforms\n");
131
132	seq_printf(m, "Revision\t: %u%c\n", gef_sbc610_get_pcb_rev(),
133		('A' + gef_sbc610_get_board_rev() - 1));
134	seq_printf(m, "FPGA Revision\t: %u\n", gef_sbc610_get_fpga_rev());
135
136	seq_printf(m, "SVR\t\t: 0x%x\n", svid);
137}
138
139static void gef_sbc610_nec_fixup(struct pci_dev *pdev)
140{
141	unsigned int val;
142
143	/* Do not do the fixup on other platforms! */
144	if (!machine_is(gef_sbc610))
145		return;
146
147	printk(KERN_INFO "Running NEC uPD720101 Fixup\n");
148
149	/* Ensure ports 1, 2, 3, 4 & 5 are enabled */
150	pci_read_config_dword(pdev, 0xe0, &val);
151	pci_write_config_dword(pdev, 0xe0, (val & ~7) | 0x5);
152
153	/* System clock is 48-MHz Oscillator and EHCI Enabled. */
154	pci_write_config_dword(pdev, 0xe4, 1 << 5);
155}
156DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_NEC, PCI_DEVICE_ID_NEC_USB,
157	gef_sbc610_nec_fixup);
158
159/*
160 * Called very early, device-tree isn't unflattened
161 *
162 * This function is called to determine whether the BSP is compatible with the
163 * supplied device-tree, which is assumed to be the correct one for the actual
164 * board. It is expected thati, in the future, a kernel may support multiple
165 * boards.
166 */
167static int __init gef_sbc610_probe(void)
168{
169	unsigned long root = of_get_flat_dt_root();
170
171	if (of_flat_dt_is_compatible(root, "gef,sbc610"))
172		return 1;
173
174	return 0;
175}
176
177static long __init mpc86xx_time_init(void)
178{
179	unsigned int temp;
180
181	/* Set the time base to zero */
182	mtspr(SPRN_TBWL, 0);
183	mtspr(SPRN_TBWU, 0);
184
185	temp = mfspr(SPRN_HID0);
186	temp |= HID0_TBEN;
187	mtspr(SPRN_HID0, temp);
188	asm volatile("isync");
189
190	return 0;
191}
192
193static const struct of_device_id of_bus_ids[] __initconst = {
194	{ .compatible = "simple-bus", },
195	{ .compatible = "gianfar", },
196	{ .compatible = "fsl,mpc8641-pcie", },
197	{},
198};
199
200static int __init declare_of_platform_devices(void)
201{
202	printk(KERN_DEBUG "Probe platform devices\n");
203	of_platform_bus_probe(NULL, of_bus_ids, NULL);
204
205	return 0;
206}
207machine_arch_initcall(gef_sbc610, declare_of_platform_devices);
208
209define_machine(gef_sbc610) {
210	.name			= "GE SBC610",
211	.probe			= gef_sbc610_probe,
212	.setup_arch		= gef_sbc610_setup_arch,
213	.init_IRQ		= gef_sbc610_init_irq,
214	.show_cpuinfo		= gef_sbc610_show_cpuinfo,
215	.get_irq		= mpic_get_irq,
216	.restart		= fsl_rstcr_restart,
217	.time_init		= mpc86xx_time_init,
218	.calibrate_decr		= generic_calibrate_decr,
219	.progress		= udbg_progress,
220#ifdef CONFIG_PCI
221	.pcibios_fixup_bus	= fsl_pcibios_fixup_bus,
222#endif
223};
224