1/*
2 * GE SBC310 board support
3 *
4 * Author: Martyn Welch <martyn.welch@ge.com>
5 *
6 * Copyright 2008 GE Intelligent Platforms Embedded Systems, Inc.
7 *
8 * This program is free software; you can redistribute  it and/or modify it
9 * under  the terms of  the GNU General  Public License as published by the
10 * Free Software Foundation;  either version 2 of the  License, or (at your
11 * option) any later version.
12 *
13 * Based on: mpc86xx_hpcn.c (MPC86xx HPCN board specific routines)
14 * Copyright 2006 Freescale Semiconductor Inc.
15 *
16 * NEC fixup adapted from arch/mips/pci/fixup-lm2e.c
17 */
18
19#include <linux/stddef.h>
20#include <linux/kernel.h>
21#include <linux/pci.h>
22#include <linux/kdev_t.h>
23#include <linux/delay.h>
24#include <linux/seq_file.h>
25#include <linux/of_platform.h>
26
27#include <asm/time.h>
28#include <asm/machdep.h>
29#include <asm/pci-bridge.h>
30#include <asm/prom.h>
31#include <mm/mmu_decl.h>
32#include <asm/udbg.h>
33
34#include <asm/mpic.h>
35#include <asm/nvram.h>
36
37#include <sysdev/fsl_pci.h>
38#include <sysdev/fsl_soc.h>
39#include <sysdev/ge/ge_pic.h>
40
41#include "mpc86xx.h"
42
43#undef DEBUG
44
45#ifdef DEBUG
46#define DBG (fmt...) do { printk(KERN_ERR "SBC310: " fmt); } while (0)
47#else
48#define DBG (fmt...) do { } while (0)
49#endif
50
51void __iomem *sbc310_regs;
52
53static void __init gef_sbc310_init_irq(void)
54{
55	struct device_node *cascade_node = NULL;
56
57	mpc86xx_init_irq();
58
59	/*
60	 * There is a simple interrupt handler in the main FPGA, this needs
61	 * to be cascaded into the MPIC
62	 */
63	cascade_node = of_find_compatible_node(NULL, NULL, "gef,fpga-pic");
64	if (!cascade_node) {
65		printk(KERN_WARNING "SBC310: No FPGA PIC\n");
66		return;
67	}
68
69	gef_pic_init(cascade_node);
70	of_node_put(cascade_node);
71}
72
73static void __init gef_sbc310_setup_arch(void)
74{
75	struct device_node *regs;
76	printk(KERN_INFO "GE Intelligent Platforms SBC310 6U VPX SBC\n");
77
78#ifdef CONFIG_SMP
79	mpc86xx_smp_init();
80#endif
81
82	fsl_pci_assign_primary();
83
84	/* Remap basic board registers */
85	regs = of_find_compatible_node(NULL, NULL, "gef,fpga-regs");
86	if (regs) {
87		sbc310_regs = of_iomap(regs, 0);
88		if (sbc310_regs == NULL)
89			printk(KERN_WARNING "Unable to map board registers\n");
90		of_node_put(regs);
91	}
92
93#if defined(CONFIG_MMIO_NVRAM)
94	mmio_nvram_init();
95#endif
96}
97
98/* Return the PCB revision */
99static unsigned int gef_sbc310_get_board_id(void)
100{
101	unsigned int reg;
102
103	reg = ioread32(sbc310_regs);
104	return reg & 0xff;
105}
106
107/* Return the PCB revision */
108static unsigned int gef_sbc310_get_pcb_rev(void)
109{
110	unsigned int reg;
111
112	reg = ioread32(sbc310_regs);
113	return (reg >> 8) & 0xff;
114}
115
116/* Return the board (software) revision */
117static unsigned int gef_sbc310_get_board_rev(void)
118{
119	unsigned int reg;
120
121	reg = ioread32(sbc310_regs);
122	return (reg >> 16) & 0xff;
123}
124
125/* Return the FPGA revision */
126static unsigned int gef_sbc310_get_fpga_rev(void)
127{
128	unsigned int reg;
129
130	reg = ioread32(sbc310_regs);
131	return (reg >> 24) & 0xf;
132}
133
134static void gef_sbc310_show_cpuinfo(struct seq_file *m)
135{
136	uint svid = mfspr(SPRN_SVR);
137
138	seq_printf(m, "Vendor\t\t: GE Intelligent Platforms\n");
139
140	seq_printf(m, "Board ID\t: 0x%2.2x\n", gef_sbc310_get_board_id());
141	seq_printf(m, "Revision\t: %u%c\n", gef_sbc310_get_pcb_rev(),
142		('A' + gef_sbc310_get_board_rev() - 1));
143	seq_printf(m, "FPGA Revision\t: %u\n", gef_sbc310_get_fpga_rev());
144
145	seq_printf(m, "SVR\t\t: 0x%x\n", svid);
146
147}
148
149static void gef_sbc310_nec_fixup(struct pci_dev *pdev)
150{
151	unsigned int val;
152
153	/* Do not do the fixup on other platforms! */
154	if (!machine_is(gef_sbc310))
155		return;
156
157	printk(KERN_INFO "Running NEC uPD720101 Fixup\n");
158
159	/* Ensure only ports 1 & 2 are enabled */
160	pci_read_config_dword(pdev, 0xe0, &val);
161	pci_write_config_dword(pdev, 0xe0, (val & ~7) | 0x2);
162
163	/* System clock is 48-MHz Oscillator and EHCI Enabled. */
164	pci_write_config_dword(pdev, 0xe4, 1 << 5);
165}
166DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_NEC, PCI_DEVICE_ID_NEC_USB,
167	gef_sbc310_nec_fixup);
168
169/*
170 * Called very early, device-tree isn't unflattened
171 *
172 * This function is called to determine whether the BSP is compatible with the
173 * supplied device-tree, which is assumed to be the correct one for the actual
174 * board. It is expected thati, in the future, a kernel may support multiple
175 * boards.
176 */
177static int __init gef_sbc310_probe(void)
178{
179	unsigned long root = of_get_flat_dt_root();
180
181	if (of_flat_dt_is_compatible(root, "gef,sbc310"))
182		return 1;
183
184	return 0;
185}
186
187static long __init mpc86xx_time_init(void)
188{
189	unsigned int temp;
190
191	/* Set the time base to zero */
192	mtspr(SPRN_TBWL, 0);
193	mtspr(SPRN_TBWU, 0);
194
195	temp = mfspr(SPRN_HID0);
196	temp |= HID0_TBEN;
197	mtspr(SPRN_HID0, temp);
198	asm volatile("isync");
199
200	return 0;
201}
202
203static const struct of_device_id of_bus_ids[] __initconst = {
204	{ .compatible = "simple-bus", },
205	{ .compatible = "gianfar", },
206	{ .compatible = "fsl,mpc8641-pcie", },
207	{},
208};
209
210static int __init declare_of_platform_devices(void)
211{
212	printk(KERN_DEBUG "Probe platform devices\n");
213	of_platform_bus_probe(NULL, of_bus_ids, NULL);
214
215	return 0;
216}
217machine_arch_initcall(gef_sbc310, declare_of_platform_devices);
218
219define_machine(gef_sbc310) {
220	.name			= "GE SBC310",
221	.probe			= gef_sbc310_probe,
222	.setup_arch		= gef_sbc310_setup_arch,
223	.init_IRQ		= gef_sbc310_init_irq,
224	.show_cpuinfo		= gef_sbc310_show_cpuinfo,
225	.get_irq		= mpic_get_irq,
226	.restart		= fsl_rstcr_restart,
227	.time_init		= mpc86xx_time_init,
228	.calibrate_decr		= generic_calibrate_decr,
229	.progress		= udbg_progress,
230#ifdef CONFIG_PCI
231	.pcibios_fixup_bus	= fsl_pcibios_fixup_bus,
232#endif
233};
234