1/*
2 * Copyright 2010-2011, 2013 Freescale Semiconductor, Inc.
3 *
4 * Author: Roy Zang <tie-fei.zang@freescale.com>
5 *
6 * Description:
7 * P1023 RDB Board Setup
8 *
9 * This program is free software; you can redistribute  it and/or modify it
10 * under  the terms of  the GNU General  Public License as published by the
11 * Free Software Foundation;  either version 2 of the  License, or (at your
12 * option) any later version.
13 */
14
15#include <linux/kernel.h>
16#include <linux/init.h>
17#include <linux/errno.h>
18#include <linux/pci.h>
19#include <linux/delay.h>
20#include <linux/module.h>
21#include <linux/fsl_devices.h>
22#include <linux/of_platform.h>
23#include <linux/of_device.h>
24
25#include <asm/time.h>
26#include <asm/machdep.h>
27#include <asm/pci-bridge.h>
28#include <mm/mmu_decl.h>
29#include <asm/prom.h>
30#include <asm/udbg.h>
31#include <asm/mpic.h>
32#include "smp.h"
33
34#include <sysdev/fsl_soc.h>
35#include <sysdev/fsl_pci.h>
36
37#include "mpc85xx.h"
38
39/* ************************************************************************
40 *
41 * Setup the architecture
42 *
43 */
44static void __init mpc85xx_rdb_setup_arch(void)
45{
46	struct device_node *np;
47
48	if (ppc_md.progress)
49		ppc_md.progress("p1023_rdb_setup_arch()", 0);
50
51	/* Map BCSR area */
52	np = of_find_node_by_name(NULL, "bcsr");
53	if (np != NULL) {
54		static u8 __iomem *bcsr_regs;
55
56		bcsr_regs = of_iomap(np, 0);
57		of_node_put(np);
58
59		if (!bcsr_regs) {
60			printk(KERN_ERR
61			       "BCSR: Failed to map bcsr register space\n");
62			return;
63		} else {
64#define BCSR15_I2C_BUS0_SEG_CLR		0x07
65#define BCSR15_I2C_BUS0_SEG2		0x02
66/*
67 * Note: Accessing exclusively i2c devices.
68 *
69 * The i2c controller selects initially ID EEPROM in the u-boot;
70 * but if menu configuration selects RTC support in the kernel,
71 * the i2c controller switches to select RTC chip in the kernel.
72 */
73#ifdef CONFIG_RTC_CLASS
74			/* Enable RTC chip on the segment #2 of i2c */
75			clrbits8(&bcsr_regs[15], BCSR15_I2C_BUS0_SEG_CLR);
76			setbits8(&bcsr_regs[15], BCSR15_I2C_BUS0_SEG2);
77#endif
78
79			iounmap(bcsr_regs);
80		}
81	}
82
83	mpc85xx_smp_init();
84
85	fsl_pci_assign_primary();
86}
87
88machine_arch_initcall(p1023_rdb, mpc85xx_common_publish_devices);
89
90static void __init mpc85xx_rdb_pic_init(void)
91{
92	struct mpic *mpic = mpic_alloc(NULL, 0, MPIC_BIG_ENDIAN |
93		MPIC_SINGLE_DEST_CPU,
94		0, 256, " OpenPIC  ");
95
96	BUG_ON(mpic == NULL);
97
98	mpic_init(mpic);
99}
100
101static int __init p1023_rdb_probe(void)
102{
103	unsigned long root = of_get_flat_dt_root();
104
105	return of_flat_dt_is_compatible(root, "fsl,P1023RDB");
106
107}
108
109define_machine(p1023_rdb) {
110	.name			= "P1023 RDB",
111	.probe			= p1023_rdb_probe,
112	.setup_arch		= mpc85xx_rdb_setup_arch,
113	.init_IRQ		= mpc85xx_rdb_pic_init,
114	.get_irq		= mpic_get_irq,
115	.restart		= fsl_rstcr_restart,
116	.calibrate_decr		= generic_calibrate_decr,
117	.progress		= udbg_progress,
118#ifdef CONFIG_PCI
119	.pcibios_fixup_bus	= fsl_pcibios_fixup_bus,
120	.pcibios_fixup_phb      = fsl_pcibios_fixup_phb,
121#endif
122};
123