1/*
2 * Embedded Planet EP8248E support
3 *
4 * Copyright 2007 Freescale Semiconductor, Inc.
5 * Author: Scott Wood <scottwood@freescale.com>
6 *
7 * This program is free software; you can redistribute  it and/or modify it
8 * under  the terms of  the GNU General  Public License as published by the
9 * Free Software Foundation;  either version 2 of the  License, or (at your
10 * option) any later version.
11 */
12
13#include <linux/init.h>
14#include <linux/interrupt.h>
15#include <linux/fsl_devices.h>
16#include <linux/mdio-bitbang.h>
17#include <linux/of_mdio.h>
18#include <linux/slab.h>
19#include <linux/of_platform.h>
20
21#include <asm/io.h>
22#include <asm/cpm2.h>
23#include <asm/udbg.h>
24#include <asm/machdep.h>
25#include <asm/time.h>
26#include <asm/mpc8260.h>
27#include <asm/prom.h>
28
29#include <sysdev/fsl_soc.h>
30#include <sysdev/cpm2_pic.h>
31
32#include "pq2.h"
33
34static u8 __iomem *ep8248e_bcsr;
35static struct device_node *ep8248e_bcsr_node;
36
37#define BCSR7_SCC2_ENABLE 0x10
38
39#define BCSR8_PHY1_ENABLE 0x80
40#define BCSR8_PHY1_POWER  0x40
41#define BCSR8_PHY2_ENABLE 0x20
42#define BCSR8_PHY2_POWER  0x10
43#define BCSR8_MDIO_READ   0x04
44#define BCSR8_MDIO_CLOCK  0x02
45#define BCSR8_MDIO_DATA   0x01
46
47#define BCSR9_USB_ENABLE  0x80
48#define BCSR9_USB_POWER   0x40
49#define BCSR9_USB_HOST    0x20
50#define BCSR9_USB_FULL_SPEED_TARGET 0x10
51
52static void __init ep8248e_pic_init(void)
53{
54	struct device_node *np = of_find_compatible_node(NULL, NULL, "fsl,pq2-pic");
55	if (!np) {
56		printk(KERN_ERR "PIC init: can not find cpm-pic node\n");
57		return;
58	}
59
60	cpm2_pic_init(np);
61	of_node_put(np);
62}
63
64static void ep8248e_set_mdc(struct mdiobb_ctrl *ctrl, int level)
65{
66	if (level)
67		setbits8(&ep8248e_bcsr[8], BCSR8_MDIO_CLOCK);
68	else
69		clrbits8(&ep8248e_bcsr[8], BCSR8_MDIO_CLOCK);
70
71	/* Read back to flush the write. */
72	in_8(&ep8248e_bcsr[8]);
73}
74
75static void ep8248e_set_mdio_dir(struct mdiobb_ctrl *ctrl, int output)
76{
77	if (output)
78		clrbits8(&ep8248e_bcsr[8], BCSR8_MDIO_READ);
79	else
80		setbits8(&ep8248e_bcsr[8], BCSR8_MDIO_READ);
81
82	/* Read back to flush the write. */
83	in_8(&ep8248e_bcsr[8]);
84}
85
86static void ep8248e_set_mdio_data(struct mdiobb_ctrl *ctrl, int data)
87{
88	if (data)
89		setbits8(&ep8248e_bcsr[8], BCSR8_MDIO_DATA);
90	else
91		clrbits8(&ep8248e_bcsr[8], BCSR8_MDIO_DATA);
92
93	/* Read back to flush the write. */
94	in_8(&ep8248e_bcsr[8]);
95}
96
97static int ep8248e_get_mdio_data(struct mdiobb_ctrl *ctrl)
98{
99	return in_8(&ep8248e_bcsr[8]) & BCSR8_MDIO_DATA;
100}
101
102static const struct mdiobb_ops ep8248e_mdio_ops = {
103	.set_mdc = ep8248e_set_mdc,
104	.set_mdio_dir = ep8248e_set_mdio_dir,
105	.set_mdio_data = ep8248e_set_mdio_data,
106	.get_mdio_data = ep8248e_get_mdio_data,
107	.owner = THIS_MODULE,
108};
109
110static struct mdiobb_ctrl ep8248e_mdio_ctrl = {
111	.ops = &ep8248e_mdio_ops,
112};
113
114static int ep8248e_mdio_probe(struct platform_device *ofdev)
115{
116	struct mii_bus *bus;
117	struct resource res;
118	struct device_node *node;
119	int ret;
120
121	node = of_get_parent(ofdev->dev.of_node);
122	of_node_put(node);
123	if (node != ep8248e_bcsr_node)
124		return -ENODEV;
125
126	ret = of_address_to_resource(ofdev->dev.of_node, 0, &res);
127	if (ret)
128		return ret;
129
130	bus = alloc_mdio_bitbang(&ep8248e_mdio_ctrl);
131	if (!bus)
132		return -ENOMEM;
133
134	bus->irq = kmalloc(sizeof(int) * PHY_MAX_ADDR, GFP_KERNEL);
135	if (bus->irq == NULL) {
136		ret = -ENOMEM;
137		goto err_free_bus;
138	}
139
140	bus->name = "ep8248e-mdio-bitbang";
141	bus->parent = &ofdev->dev;
142	snprintf(bus->id, MII_BUS_ID_SIZE, "%x", res.start);
143
144	ret = of_mdiobus_register(bus, ofdev->dev.of_node);
145	if (ret)
146		goto err_free_irq;
147
148	return 0;
149err_free_irq:
150	kfree(bus->irq);
151err_free_bus:
152	free_mdio_bitbang(bus);
153	return ret;
154}
155
156static int ep8248e_mdio_remove(struct platform_device *ofdev)
157{
158	BUG();
159	return 0;
160}
161
162static const struct of_device_id ep8248e_mdio_match[] = {
163	{
164		.compatible = "fsl,ep8248e-mdio-bitbang",
165	},
166	{},
167};
168
169static struct platform_driver ep8248e_mdio_driver = {
170	.driver = {
171		.name = "ep8248e-mdio-bitbang",
172		.of_match_table = ep8248e_mdio_match,
173	},
174	.probe = ep8248e_mdio_probe,
175	.remove = ep8248e_mdio_remove,
176};
177
178struct cpm_pin {
179	int port, pin, flags;
180};
181
182static __initdata struct cpm_pin ep8248e_pins[] = {
183	/* SMC1 */
184	{2, 4, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
185	{2, 5, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
186
187	/* SCC1 */
188	{2, 14, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
189	{2, 15, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
190	{3, 29, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
191	{3, 30, CPM_PIN_OUTPUT | CPM_PIN_SECONDARY},
192	{3, 31, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
193
194	/* FCC1 */
195	{0, 14, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
196	{0, 15, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
197	{0, 16, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
198	{0, 17, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
199	{0, 18, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
200	{0, 19, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
201	{0, 20, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
202	{0, 21, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
203	{0, 26, CPM_PIN_INPUT | CPM_PIN_SECONDARY},
204	{0, 27, CPM_PIN_INPUT | CPM_PIN_SECONDARY},
205	{0, 28, CPM_PIN_OUTPUT | CPM_PIN_SECONDARY},
206	{0, 29, CPM_PIN_OUTPUT | CPM_PIN_SECONDARY},
207	{0, 30, CPM_PIN_INPUT | CPM_PIN_SECONDARY},
208	{0, 31, CPM_PIN_INPUT | CPM_PIN_SECONDARY},
209	{2, 21, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
210	{2, 22, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
211
212	/* FCC2 */
213	{1, 18, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
214	{1, 19, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
215	{1, 20, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
216	{1, 21, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
217	{1, 22, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
218	{1, 23, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
219	{1, 24, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
220	{1, 25, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
221	{1, 26, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
222	{1, 27, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
223	{1, 28, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
224	{1, 29, CPM_PIN_OUTPUT | CPM_PIN_SECONDARY},
225	{1, 30, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
226	{1, 31, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
227	{2, 18, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
228	{2, 19, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
229
230	/* I2C */
231	{4, 14, CPM_PIN_INPUT | CPM_PIN_SECONDARY},
232	{4, 15, CPM_PIN_INPUT | CPM_PIN_SECONDARY},
233
234	/* USB */
235	{2, 10, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
236	{2, 11, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
237	{2, 20, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
238	{2, 24, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
239	{3, 23, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
240	{3, 24, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
241	{3, 25, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
242};
243
244static void __init init_ioports(void)
245{
246	int i;
247
248	for (i = 0; i < ARRAY_SIZE(ep8248e_pins); i++) {
249		const struct cpm_pin *pin = &ep8248e_pins[i];
250		cpm2_set_pin(pin->port, pin->pin, pin->flags);
251	}
252
253	cpm2_smc_clk_setup(CPM_CLK_SMC1, CPM_BRG7);
254	cpm2_clk_setup(CPM_CLK_SCC1, CPM_BRG1, CPM_CLK_RX);
255	cpm2_clk_setup(CPM_CLK_SCC1, CPM_BRG1, CPM_CLK_TX);
256	cpm2_clk_setup(CPM_CLK_SCC3, CPM_CLK8, CPM_CLK_TX); /* USB */
257	cpm2_clk_setup(CPM_CLK_FCC1, CPM_CLK11, CPM_CLK_RX);
258	cpm2_clk_setup(CPM_CLK_FCC1, CPM_CLK10, CPM_CLK_TX);
259	cpm2_clk_setup(CPM_CLK_FCC2, CPM_CLK13, CPM_CLK_RX);
260	cpm2_clk_setup(CPM_CLK_FCC2, CPM_CLK14, CPM_CLK_TX);
261}
262
263static void __init ep8248e_setup_arch(void)
264{
265	if (ppc_md.progress)
266		ppc_md.progress("ep8248e_setup_arch()", 0);
267
268	cpm2_reset();
269
270	/* When this is set, snooping CPM DMA from RAM causes
271	 * machine checks.  See erratum SIU18.
272	 */
273	clrbits32(&cpm2_immr->im_siu_conf.siu_82xx.sc_bcr, MPC82XX_BCR_PLDP);
274
275	ep8248e_bcsr_node =
276		of_find_compatible_node(NULL, NULL, "fsl,ep8248e-bcsr");
277	if (!ep8248e_bcsr_node) {
278		printk(KERN_ERR "No bcsr in device tree\n");
279		return;
280	}
281
282	ep8248e_bcsr = of_iomap(ep8248e_bcsr_node, 0);
283	if (!ep8248e_bcsr) {
284		printk(KERN_ERR "Cannot map BCSR registers\n");
285		of_node_put(ep8248e_bcsr_node);
286		ep8248e_bcsr_node = NULL;
287		return;
288	}
289
290	setbits8(&ep8248e_bcsr[7], BCSR7_SCC2_ENABLE);
291	setbits8(&ep8248e_bcsr[8], BCSR8_PHY1_ENABLE | BCSR8_PHY1_POWER |
292	                           BCSR8_PHY2_ENABLE | BCSR8_PHY2_POWER);
293
294	init_ioports();
295
296	if (ppc_md.progress)
297		ppc_md.progress("ep8248e_setup_arch(), finish", 0);
298}
299
300static const struct of_device_id of_bus_ids[] __initconst = {
301	{ .compatible = "simple-bus", },
302	{ .compatible = "fsl,ep8248e-bcsr", },
303	{},
304};
305
306static int __init declare_of_platform_devices(void)
307{
308	of_platform_bus_probe(NULL, of_bus_ids, NULL);
309	platform_driver_register(&ep8248e_mdio_driver);
310
311	return 0;
312}
313machine_device_initcall(ep8248e, declare_of_platform_devices);
314
315/*
316 * Called very early, device-tree isn't unflattened
317 */
318static int __init ep8248e_probe(void)
319{
320	unsigned long root = of_get_flat_dt_root();
321	return of_flat_dt_is_compatible(root, "fsl,ep8248e");
322}
323
324define_machine(ep8248e)
325{
326	.name = "Embedded Planet EP8248E",
327	.probe = ep8248e_probe,
328	.setup_arch = ep8248e_setup_arch,
329	.init_IRQ = ep8248e_pic_init,
330	.get_irq = cpm2_get_irq,
331	.calibrate_decr = generic_calibrate_decr,
332	.restart = pq2_restart,
333	.progress = udbg_progress,
334};
335