1/*
2 * This program is free software; you can redistribute it and/or modify
3 * it under the terms of the GNU General Public License, version 2, as
4 * published by the Free Software Foundation.
5 *
6 * This program is distributed in the hope that it will be useful,
7 * but WITHOUT ANY WARRANTY; without even the implied warranty of
8 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
9 * GNU General Public License for more details.
10 *
11 * You should have received a copy of the GNU General Public License
12 * along with this program; if not, write to the Free Software
13 * Foundation, 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.
14 *
15 * Copyright SUSE Linux Products GmbH 2009
16 *
17 * Authors: Alexander Graf <agraf@suse.de>
18 */
19
20#include <linux/types.h>
21#include <linux/string.h>
22#include <linux/kvm.h>
23#include <linux/kvm_host.h>
24#include <linux/highmem.h>
25
26#include <asm/tlbflush.h>
27#include <asm/kvm_ppc.h>
28#include <asm/kvm_book3s.h>
29#include <asm/mmu-hash64.h>
30
31/* #define DEBUG_MMU */
32
33#ifdef DEBUG_MMU
34#define dprintk(X...) printk(KERN_INFO X)
35#else
36#define dprintk(X...) do { } while(0)
37#endif
38
39static void kvmppc_mmu_book3s_64_reset_msr(struct kvm_vcpu *vcpu)
40{
41	kvmppc_set_msr(vcpu, vcpu->arch.intr_msr);
42}
43
44static struct kvmppc_slb *kvmppc_mmu_book3s_64_find_slbe(
45				struct kvm_vcpu *vcpu,
46				gva_t eaddr)
47{
48	int i;
49	u64 esid = GET_ESID(eaddr);
50	u64 esid_1t = GET_ESID_1T(eaddr);
51
52	for (i = 0; i < vcpu->arch.slb_nr; i++) {
53		u64 cmp_esid = esid;
54
55		if (!vcpu->arch.slb[i].valid)
56			continue;
57
58		if (vcpu->arch.slb[i].tb)
59			cmp_esid = esid_1t;
60
61		if (vcpu->arch.slb[i].esid == cmp_esid)
62			return &vcpu->arch.slb[i];
63	}
64
65	dprintk("KVM: No SLB entry found for 0x%lx [%llx | %llx]\n",
66		eaddr, esid, esid_1t);
67	for (i = 0; i < vcpu->arch.slb_nr; i++) {
68	    if (vcpu->arch.slb[i].vsid)
69		dprintk("  %d: %c%c%c %llx %llx\n", i,
70			vcpu->arch.slb[i].valid ? 'v' : ' ',
71			vcpu->arch.slb[i].large ? 'l' : ' ',
72			vcpu->arch.slb[i].tb    ? 't' : ' ',
73			vcpu->arch.slb[i].esid,
74			vcpu->arch.slb[i].vsid);
75	}
76
77	return NULL;
78}
79
80static int kvmppc_slb_sid_shift(struct kvmppc_slb *slbe)
81{
82	return slbe->tb ? SID_SHIFT_1T : SID_SHIFT;
83}
84
85static u64 kvmppc_slb_offset_mask(struct kvmppc_slb *slbe)
86{
87	return (1ul << kvmppc_slb_sid_shift(slbe)) - 1;
88}
89
90static u64 kvmppc_slb_calc_vpn(struct kvmppc_slb *slb, gva_t eaddr)
91{
92	eaddr &= kvmppc_slb_offset_mask(slb);
93
94	return (eaddr >> VPN_SHIFT) |
95		((slb->vsid) << (kvmppc_slb_sid_shift(slb) - VPN_SHIFT));
96}
97
98static u64 kvmppc_mmu_book3s_64_ea_to_vp(struct kvm_vcpu *vcpu, gva_t eaddr,
99					 bool data)
100{
101	struct kvmppc_slb *slb;
102
103	slb = kvmppc_mmu_book3s_64_find_slbe(vcpu, eaddr);
104	if (!slb)
105		return 0;
106
107	return kvmppc_slb_calc_vpn(slb, eaddr);
108}
109
110static int mmu_pagesize(int mmu_pg)
111{
112	switch (mmu_pg) {
113	case MMU_PAGE_64K:
114		return 16;
115	case MMU_PAGE_16M:
116		return 24;
117	}
118	return 12;
119}
120
121static int kvmppc_mmu_book3s_64_get_pagesize(struct kvmppc_slb *slbe)
122{
123	return mmu_pagesize(slbe->base_page_size);
124}
125
126static u32 kvmppc_mmu_book3s_64_get_page(struct kvmppc_slb *slbe, gva_t eaddr)
127{
128	int p = kvmppc_mmu_book3s_64_get_pagesize(slbe);
129
130	return ((eaddr & kvmppc_slb_offset_mask(slbe)) >> p);
131}
132
133static hva_t kvmppc_mmu_book3s_64_get_pteg(struct kvm_vcpu *vcpu,
134				struct kvmppc_slb *slbe, gva_t eaddr,
135				bool second)
136{
137	struct kvmppc_vcpu_book3s *vcpu_book3s = to_book3s(vcpu);
138	u64 hash, pteg, htabsize;
139	u32 ssize;
140	hva_t r;
141	u64 vpn;
142
143	htabsize = ((1 << ((vcpu_book3s->sdr1 & 0x1f) + 11)) - 1);
144
145	vpn = kvmppc_slb_calc_vpn(slbe, eaddr);
146	ssize = slbe->tb ? MMU_SEGSIZE_1T : MMU_SEGSIZE_256M;
147	hash = hpt_hash(vpn, kvmppc_mmu_book3s_64_get_pagesize(slbe), ssize);
148	if (second)
149		hash = ~hash;
150	hash &= ((1ULL << 39ULL) - 1ULL);
151	hash &= htabsize;
152	hash <<= 7ULL;
153
154	pteg = vcpu_book3s->sdr1 & 0xfffffffffffc0000ULL;
155	pteg |= hash;
156
157	dprintk("MMU: page=0x%x sdr1=0x%llx pteg=0x%llx vsid=0x%llx\n",
158		page, vcpu_book3s->sdr1, pteg, slbe->vsid);
159
160	/* When running a PAPR guest, SDR1 contains a HVA address instead
161           of a GPA */
162	if (vcpu->arch.papr_enabled)
163		r = pteg;
164	else
165		r = gfn_to_hva(vcpu->kvm, pteg >> PAGE_SHIFT);
166
167	if (kvm_is_error_hva(r))
168		return r;
169	return r | (pteg & ~PAGE_MASK);
170}
171
172static u64 kvmppc_mmu_book3s_64_get_avpn(struct kvmppc_slb *slbe, gva_t eaddr)
173{
174	int p = kvmppc_mmu_book3s_64_get_pagesize(slbe);
175	u64 avpn;
176
177	avpn = kvmppc_mmu_book3s_64_get_page(slbe, eaddr);
178	avpn |= slbe->vsid << (kvmppc_slb_sid_shift(slbe) - p);
179
180	if (p < 16)
181		avpn >>= ((80 - p) - 56) - 8;	/* 16 - p */
182	else
183		avpn <<= p - 16;
184
185	return avpn;
186}
187
188/*
189 * Return page size encoded in the second word of a HPTE, or
190 * -1 for an invalid encoding for the base page size indicated by
191 * the SLB entry.  This doesn't handle mixed pagesize segments yet.
192 */
193static int decode_pagesize(struct kvmppc_slb *slbe, u64 r)
194{
195	switch (slbe->base_page_size) {
196	case MMU_PAGE_64K:
197		if ((r & 0xf000) == 0x1000)
198			return MMU_PAGE_64K;
199		break;
200	case MMU_PAGE_16M:
201		if ((r & 0xff000) == 0)
202			return MMU_PAGE_16M;
203		break;
204	}
205	return -1;
206}
207
208static int kvmppc_mmu_book3s_64_xlate(struct kvm_vcpu *vcpu, gva_t eaddr,
209				      struct kvmppc_pte *gpte, bool data,
210				      bool iswrite)
211{
212	struct kvmppc_slb *slbe;
213	hva_t ptegp;
214	u64 pteg[16];
215	u64 avpn = 0;
216	u64 v, r;
217	u64 v_val, v_mask;
218	u64 eaddr_mask;
219	int i;
220	u8 pp, key = 0;
221	bool found = false;
222	bool second = false;
223	int pgsize;
224	ulong mp_ea = vcpu->arch.magic_page_ea;
225
226	/* Magic page override */
227	if (unlikely(mp_ea) &&
228	    unlikely((eaddr & ~0xfffULL) == (mp_ea & ~0xfffULL)) &&
229	    !(kvmppc_get_msr(vcpu) & MSR_PR)) {
230		gpte->eaddr = eaddr;
231		gpte->vpage = kvmppc_mmu_book3s_64_ea_to_vp(vcpu, eaddr, data);
232		gpte->raddr = vcpu->arch.magic_page_pa | (gpte->raddr & 0xfff);
233		gpte->raddr &= KVM_PAM;
234		gpte->may_execute = true;
235		gpte->may_read = true;
236		gpte->may_write = true;
237		gpte->page_size = MMU_PAGE_4K;
238
239		return 0;
240	}
241
242	slbe = kvmppc_mmu_book3s_64_find_slbe(vcpu, eaddr);
243	if (!slbe)
244		goto no_seg_found;
245
246	avpn = kvmppc_mmu_book3s_64_get_avpn(slbe, eaddr);
247	v_val = avpn & HPTE_V_AVPN;
248
249	if (slbe->tb)
250		v_val |= SLB_VSID_B_1T;
251	if (slbe->large)
252		v_val |= HPTE_V_LARGE;
253	v_val |= HPTE_V_VALID;
254
255	v_mask = SLB_VSID_B | HPTE_V_AVPN | HPTE_V_LARGE | HPTE_V_VALID |
256		HPTE_V_SECONDARY;
257
258	pgsize = slbe->large ? MMU_PAGE_16M : MMU_PAGE_4K;
259
260	mutex_lock(&vcpu->kvm->arch.hpt_mutex);
261
262do_second:
263	ptegp = kvmppc_mmu_book3s_64_get_pteg(vcpu, slbe, eaddr, second);
264	if (kvm_is_error_hva(ptegp))
265		goto no_page_found;
266
267	if(copy_from_user(pteg, (void __user *)ptegp, sizeof(pteg))) {
268		printk(KERN_ERR "KVM can't copy data from 0x%lx!\n", ptegp);
269		goto no_page_found;
270	}
271
272	if ((kvmppc_get_msr(vcpu) & MSR_PR) && slbe->Kp)
273		key = 4;
274	else if (!(kvmppc_get_msr(vcpu) & MSR_PR) && slbe->Ks)
275		key = 4;
276
277	for (i=0; i<16; i+=2) {
278		u64 pte0 = be64_to_cpu(pteg[i]);
279		u64 pte1 = be64_to_cpu(pteg[i + 1]);
280
281		/* Check all relevant fields of 1st dword */
282		if ((pte0 & v_mask) == v_val) {
283			/* If large page bit is set, check pgsize encoding */
284			if (slbe->large &&
285			    (vcpu->arch.hflags & BOOK3S_HFLAG_MULTI_PGSIZE)) {
286				pgsize = decode_pagesize(slbe, pte1);
287				if (pgsize < 0)
288					continue;
289			}
290			found = true;
291			break;
292		}
293	}
294
295	if (!found) {
296		if (second)
297			goto no_page_found;
298		v_val |= HPTE_V_SECONDARY;
299		second = true;
300		goto do_second;
301	}
302
303	v = be64_to_cpu(pteg[i]);
304	r = be64_to_cpu(pteg[i+1]);
305	pp = (r & HPTE_R_PP) | key;
306	if (r & HPTE_R_PP0)
307		pp |= 8;
308
309	gpte->eaddr = eaddr;
310	gpte->vpage = kvmppc_mmu_book3s_64_ea_to_vp(vcpu, eaddr, data);
311
312	eaddr_mask = (1ull << mmu_pagesize(pgsize)) - 1;
313	gpte->raddr = (r & HPTE_R_RPN & ~eaddr_mask) | (eaddr & eaddr_mask);
314	gpte->page_size = pgsize;
315	gpte->may_execute = ((r & HPTE_R_N) ? false : true);
316	if (unlikely(vcpu->arch.disable_kernel_nx) &&
317	    !(kvmppc_get_msr(vcpu) & MSR_PR))
318		gpte->may_execute = true;
319	gpte->may_read = false;
320	gpte->may_write = false;
321
322	switch (pp) {
323	case 0:
324	case 1:
325	case 2:
326	case 6:
327		gpte->may_write = true;
328		/* fall through */
329	case 3:
330	case 5:
331	case 7:
332	case 10:
333		gpte->may_read = true;
334		break;
335	}
336
337	dprintk("KVM MMU: Translated 0x%lx [0x%llx] -> 0x%llx "
338		"-> 0x%lx\n",
339		eaddr, avpn, gpte->vpage, gpte->raddr);
340
341	/* Update PTE R and C bits, so the guest's swapper knows we used the
342	 * page */
343	if (gpte->may_read && !(r & HPTE_R_R)) {
344		/*
345		 * Set the accessed flag.
346		 * We have to write this back with a single byte write
347		 * because another vcpu may be accessing this on
348		 * non-PAPR platforms such as mac99, and this is
349		 * what real hardware does.
350		 */
351                char __user *addr = (char __user *) (ptegp + (i + 1) * sizeof(u64));
352		r |= HPTE_R_R;
353		put_user(r >> 8, addr + 6);
354	}
355	if (iswrite && gpte->may_write && !(r & HPTE_R_C)) {
356		/* Set the dirty flag */
357		/* Use a single byte write */
358                char __user *addr = (char __user *) (ptegp + (i + 1) * sizeof(u64));
359		r |= HPTE_R_C;
360		put_user(r, addr + 7);
361	}
362
363	mutex_unlock(&vcpu->kvm->arch.hpt_mutex);
364
365	if (!gpte->may_read || (iswrite && !gpte->may_write))
366		return -EPERM;
367	return 0;
368
369no_page_found:
370	mutex_unlock(&vcpu->kvm->arch.hpt_mutex);
371	return -ENOENT;
372
373no_seg_found:
374	dprintk("KVM MMU: Trigger segment fault\n");
375	return -EINVAL;
376}
377
378static void kvmppc_mmu_book3s_64_slbmte(struct kvm_vcpu *vcpu, u64 rs, u64 rb)
379{
380	struct kvmppc_vcpu_book3s *vcpu_book3s;
381	u64 esid, esid_1t;
382	int slb_nr;
383	struct kvmppc_slb *slbe;
384
385	dprintk("KVM MMU: slbmte(0x%llx, 0x%llx)\n", rs, rb);
386
387	vcpu_book3s = to_book3s(vcpu);
388
389	esid = GET_ESID(rb);
390	esid_1t = GET_ESID_1T(rb);
391	slb_nr = rb & 0xfff;
392
393	if (slb_nr > vcpu->arch.slb_nr)
394		return;
395
396	slbe = &vcpu->arch.slb[slb_nr];
397
398	slbe->large = (rs & SLB_VSID_L) ? 1 : 0;
399	slbe->tb    = (rs & SLB_VSID_B_1T) ? 1 : 0;
400	slbe->esid  = slbe->tb ? esid_1t : esid;
401	slbe->vsid  = (rs & ~SLB_VSID_B) >> (kvmppc_slb_sid_shift(slbe) - 16);
402	slbe->valid = (rb & SLB_ESID_V) ? 1 : 0;
403	slbe->Ks    = (rs & SLB_VSID_KS) ? 1 : 0;
404	slbe->Kp    = (rs & SLB_VSID_KP) ? 1 : 0;
405	slbe->nx    = (rs & SLB_VSID_N) ? 1 : 0;
406	slbe->class = (rs & SLB_VSID_C) ? 1 : 0;
407
408	slbe->base_page_size = MMU_PAGE_4K;
409	if (slbe->large) {
410		if (vcpu->arch.hflags & BOOK3S_HFLAG_MULTI_PGSIZE) {
411			switch (rs & SLB_VSID_LP) {
412			case SLB_VSID_LP_00:
413				slbe->base_page_size = MMU_PAGE_16M;
414				break;
415			case SLB_VSID_LP_01:
416				slbe->base_page_size = MMU_PAGE_64K;
417				break;
418			}
419		} else
420			slbe->base_page_size = MMU_PAGE_16M;
421	}
422
423	slbe->orige = rb & (ESID_MASK | SLB_ESID_V);
424	slbe->origv = rs;
425
426	/* Map the new segment */
427	kvmppc_mmu_map_segment(vcpu, esid << SID_SHIFT);
428}
429
430static u64 kvmppc_mmu_book3s_64_slbmfee(struct kvm_vcpu *vcpu, u64 slb_nr)
431{
432	struct kvmppc_slb *slbe;
433
434	if (slb_nr > vcpu->arch.slb_nr)
435		return 0;
436
437	slbe = &vcpu->arch.slb[slb_nr];
438
439	return slbe->orige;
440}
441
442static u64 kvmppc_mmu_book3s_64_slbmfev(struct kvm_vcpu *vcpu, u64 slb_nr)
443{
444	struct kvmppc_slb *slbe;
445
446	if (slb_nr > vcpu->arch.slb_nr)
447		return 0;
448
449	slbe = &vcpu->arch.slb[slb_nr];
450
451	return slbe->origv;
452}
453
454static void kvmppc_mmu_book3s_64_slbie(struct kvm_vcpu *vcpu, u64 ea)
455{
456	struct kvmppc_slb *slbe;
457	u64 seg_size;
458
459	dprintk("KVM MMU: slbie(0x%llx)\n", ea);
460
461	slbe = kvmppc_mmu_book3s_64_find_slbe(vcpu, ea);
462
463	if (!slbe)
464		return;
465
466	dprintk("KVM MMU: slbie(0x%llx, 0x%llx)\n", ea, slbe->esid);
467
468	slbe->valid = false;
469	slbe->orige = 0;
470	slbe->origv = 0;
471
472	seg_size = 1ull << kvmppc_slb_sid_shift(slbe);
473	kvmppc_mmu_flush_segment(vcpu, ea & ~(seg_size - 1), seg_size);
474}
475
476static void kvmppc_mmu_book3s_64_slbia(struct kvm_vcpu *vcpu)
477{
478	int i;
479
480	dprintk("KVM MMU: slbia()\n");
481
482	for (i = 1; i < vcpu->arch.slb_nr; i++) {
483		vcpu->arch.slb[i].valid = false;
484		vcpu->arch.slb[i].orige = 0;
485		vcpu->arch.slb[i].origv = 0;
486	}
487
488	if (kvmppc_get_msr(vcpu) & MSR_IR) {
489		kvmppc_mmu_flush_segments(vcpu);
490		kvmppc_mmu_map_segment(vcpu, kvmppc_get_pc(vcpu));
491	}
492}
493
494static void kvmppc_mmu_book3s_64_mtsrin(struct kvm_vcpu *vcpu, u32 srnum,
495					ulong value)
496{
497	u64 rb = 0, rs = 0;
498
499	/*
500	 * According to Book3 2.01 mtsrin is implemented as:
501	 *
502	 * The SLB entry specified by (RB)32:35 is loaded from register
503	 * RS, as follows.
504	 *
505	 * SLBE Bit	Source			SLB Field
506	 *
507	 * 0:31		0x0000_0000		ESID-0:31
508	 * 32:35	(RB)32:35		ESID-32:35
509	 * 36		0b1			V
510	 * 37:61	0x00_0000|| 0b0		VSID-0:24
511	 * 62:88	(RS)37:63		VSID-25:51
512	 * 89:91	(RS)33:35		Ks Kp N
513	 * 92		(RS)36			L ((RS)36 must be 0b0)
514	 * 93		0b0			C
515	 */
516
517	dprintk("KVM MMU: mtsrin(0x%x, 0x%lx)\n", srnum, value);
518
519	/* ESID = srnum */
520	rb |= (srnum & 0xf) << 28;
521	/* Set the valid bit */
522	rb |= 1 << 27;
523	/* Index = ESID */
524	rb |= srnum;
525
526	/* VSID = VSID */
527	rs |= (value & 0xfffffff) << 12;
528	/* flags = flags */
529	rs |= ((value >> 28) & 0x7) << 9;
530
531	kvmppc_mmu_book3s_64_slbmte(vcpu, rs, rb);
532}
533
534static void kvmppc_mmu_book3s_64_tlbie(struct kvm_vcpu *vcpu, ulong va,
535				       bool large)
536{
537	u64 mask = 0xFFFFFFFFFULL;
538	long i;
539	struct kvm_vcpu *v;
540
541	dprintk("KVM MMU: tlbie(0x%lx)\n", va);
542
543	/*
544	 * The tlbie instruction changed behaviour starting with
545	 * POWER6.  POWER6 and later don't have the large page flag
546	 * in the instruction but in the RB value, along with bits
547	 * indicating page and segment sizes.
548	 */
549	if (vcpu->arch.hflags & BOOK3S_HFLAG_NEW_TLBIE) {
550		/* POWER6 or later */
551		if (va & 1) {		/* L bit */
552			if ((va & 0xf000) == 0x1000)
553				mask = 0xFFFFFFFF0ULL;	/* 64k page */
554			else
555				mask = 0xFFFFFF000ULL;	/* 16M page */
556		}
557	} else {
558		/* older processors, e.g. PPC970 */
559		if (large)
560			mask = 0xFFFFFF000ULL;
561	}
562	/* flush this VA on all vcpus */
563	kvm_for_each_vcpu(i, v, vcpu->kvm)
564		kvmppc_mmu_pte_vflush(v, va >> 12, mask);
565}
566
567#ifdef CONFIG_PPC_64K_PAGES
568static int segment_contains_magic_page(struct kvm_vcpu *vcpu, ulong esid)
569{
570	ulong mp_ea = vcpu->arch.magic_page_ea;
571
572	return mp_ea && !(kvmppc_get_msr(vcpu) & MSR_PR) &&
573		(mp_ea >> SID_SHIFT) == esid;
574}
575#endif
576
577static int kvmppc_mmu_book3s_64_esid_to_vsid(struct kvm_vcpu *vcpu, ulong esid,
578					     u64 *vsid)
579{
580	ulong ea = esid << SID_SHIFT;
581	struct kvmppc_slb *slb;
582	u64 gvsid = esid;
583	ulong mp_ea = vcpu->arch.magic_page_ea;
584	int pagesize = MMU_PAGE_64K;
585	u64 msr = kvmppc_get_msr(vcpu);
586
587	if (msr & (MSR_DR|MSR_IR)) {
588		slb = kvmppc_mmu_book3s_64_find_slbe(vcpu, ea);
589		if (slb) {
590			gvsid = slb->vsid;
591			pagesize = slb->base_page_size;
592			if (slb->tb) {
593				gvsid <<= SID_SHIFT_1T - SID_SHIFT;
594				gvsid |= esid & ((1ul << (SID_SHIFT_1T - SID_SHIFT)) - 1);
595				gvsid |= VSID_1T;
596			}
597		}
598	}
599
600	switch (msr & (MSR_DR|MSR_IR)) {
601	case 0:
602		gvsid = VSID_REAL | esid;
603		break;
604	case MSR_IR:
605		gvsid |= VSID_REAL_IR;
606		break;
607	case MSR_DR:
608		gvsid |= VSID_REAL_DR;
609		break;
610	case MSR_DR|MSR_IR:
611		if (!slb)
612			goto no_slb;
613
614		break;
615	default:
616		BUG();
617		break;
618	}
619
620#ifdef CONFIG_PPC_64K_PAGES
621	/*
622	 * Mark this as a 64k segment if the host is using
623	 * 64k pages, the host MMU supports 64k pages and
624	 * the guest segment page size is >= 64k,
625	 * but not if this segment contains the magic page.
626	 */
627	if (pagesize >= MMU_PAGE_64K &&
628	    mmu_psize_defs[MMU_PAGE_64K].shift &&
629	    !segment_contains_magic_page(vcpu, esid))
630		gvsid |= VSID_64K;
631#endif
632
633	if (kvmppc_get_msr(vcpu) & MSR_PR)
634		gvsid |= VSID_PR;
635
636	*vsid = gvsid;
637	return 0;
638
639no_slb:
640	/* Catch magic page case */
641	if (unlikely(mp_ea) &&
642	    unlikely(esid == (mp_ea >> SID_SHIFT)) &&
643	    !(kvmppc_get_msr(vcpu) & MSR_PR)) {
644		*vsid = VSID_REAL | esid;
645		return 0;
646	}
647
648	return -EINVAL;
649}
650
651static bool kvmppc_mmu_book3s_64_is_dcbz32(struct kvm_vcpu *vcpu)
652{
653	return (to_book3s(vcpu)->hid[5] & 0x80);
654}
655
656void kvmppc_mmu_book3s_64_init(struct kvm_vcpu *vcpu)
657{
658	struct kvmppc_mmu *mmu = &vcpu->arch.mmu;
659
660	mmu->mfsrin = NULL;
661	mmu->mtsrin = kvmppc_mmu_book3s_64_mtsrin;
662	mmu->slbmte = kvmppc_mmu_book3s_64_slbmte;
663	mmu->slbmfee = kvmppc_mmu_book3s_64_slbmfee;
664	mmu->slbmfev = kvmppc_mmu_book3s_64_slbmfev;
665	mmu->slbie = kvmppc_mmu_book3s_64_slbie;
666	mmu->slbia = kvmppc_mmu_book3s_64_slbia;
667	mmu->xlate = kvmppc_mmu_book3s_64_xlate;
668	mmu->reset_msr = kvmppc_mmu_book3s_64_reset_msr;
669	mmu->tlbie = kvmppc_mmu_book3s_64_tlbie;
670	mmu->esid_to_vsid = kvmppc_mmu_book3s_64_esid_to_vsid;
671	mmu->ea_to_vp = kvmppc_mmu_book3s_64_ea_to_vp;
672	mmu->is_dcbz32 = kvmppc_mmu_book3s_64_is_dcbz32;
673
674	vcpu->arch.hflags |= BOOK3S_HFLAG_SLB;
675}
676